diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/subdev/clock/nv84.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/subdev/clock/nv84.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/clock/nv84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/clock/nv84.c new file mode 100644 index 000000000000..b0b7c1437f10 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/clock/nv84.c | |||
| @@ -0,0 +1,48 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2013 Red Hat Inc. | ||
| 3 | * | ||
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
| 5 | * copy of this software and associated documentation files (the "Software"), | ||
| 6 | * to deal in the Software without restriction, including without limitation | ||
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
| 9 | * Software is furnished to do so, subject to the following conditions: | ||
| 10 | * | ||
| 11 | * The above copyright notice and this permission notice shall be included in | ||
| 12 | * all copies or substantial portions of the Software. | ||
| 13 | * | ||
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
| 20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
| 21 | * | ||
| 22 | * Authors: Ben Skeggs <bskeggs@redhat.com> | ||
| 23 | */ | ||
| 24 | |||
| 25 | #include "nv50.h" | ||
| 26 | |||
| 27 | static struct nouveau_clocks | ||
| 28 | nv84_domains[] = { | ||
| 29 | { nv_clk_src_crystal, 0xff }, | ||
| 30 | { nv_clk_src_href , 0xff }, | ||
| 31 | { nv_clk_src_core , 0xff, 0, "core", 1000 }, | ||
| 32 | { nv_clk_src_shader , 0xff, 0, "shader", 1000 }, | ||
| 33 | { nv_clk_src_mem , 0xff, 0, "memory", 1000 }, | ||
| 34 | { nv_clk_src_vdec , 0xff }, | ||
| 35 | { nv_clk_src_max } | ||
| 36 | }; | ||
| 37 | |||
| 38 | struct nouveau_oclass * | ||
| 39 | nv84_clock_oclass = &(struct nv50_clock_oclass) { | ||
| 40 | .base.handle = NV_SUBDEV(CLOCK, 0x84), | ||
| 41 | .base.ofuncs = &(struct nouveau_ofuncs) { | ||
| 42 | .ctor = nv50_clock_ctor, | ||
| 43 | .dtor = _nouveau_clock_dtor, | ||
| 44 | .init = _nouveau_clock_init, | ||
| 45 | .fini = _nouveau_clock_fini, | ||
| 46 | }, | ||
| 47 | .domains = nv84_domains, | ||
| 48 | }.base; | ||
