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path: root/drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c137
1 files changed, 137 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
new file mode 100644
index 000000000000..b142a510e89f
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c
@@ -0,0 +1,137 @@
1/*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <subdev/bios.h>
26#include <subdev/bios/bit.h>
27#include <subdev/bios/M0209.h>
28
29u32
30nvbios_M0209Te(struct nouveau_bios *bios,
31 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
32{
33 struct bit_entry bit_M;
34 u32 data = 0x00000000;
35
36 if (!bit_entry(bios, 'M', &bit_M)) {
37 if (bit_M.version == 2 && bit_M.length > 0x0c)
38 data = nv_ro32(bios, bit_M.offset + 0x09);
39 if (data) {
40 *ver = nv_ro08(bios, data + 0x00);
41 switch (*ver) {
42 case 0x10:
43 *hdr = nv_ro08(bios, data + 0x01);
44 *len = nv_ro08(bios, data + 0x02);
45 *ssz = nv_ro08(bios, data + 0x03);
46 *snr = 1;
47 *cnt = nv_ro08(bios, data + 0x04);
48 return data;
49 default:
50 break;
51 }
52 }
53 }
54
55 return 0x00000000;
56}
57
58u32
59nvbios_M0209Ee(struct nouveau_bios *bios, int idx,
60 u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
61{
62 u8 snr, ssz;
63 u32 data = nvbios_M0209Te(bios, ver, hdr, cnt, len, &snr, &ssz);
64 if (data && idx < *cnt) {
65 data = data + *hdr + idx * (*len + (snr * ssz));
66 *hdr = *len;
67 *cnt = snr;
68 *len = ssz;
69 return data;
70 }
71 return 0x00000000;
72}
73
74u32
75nvbios_M0209Ep(struct nouveau_bios *bios, int idx,
76 u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
77 struct nvbios_M0209E *info)
78{
79 u32 data = nvbios_M0209Ee(bios, idx, ver, hdr, cnt, len);
80 memset(info, 0x00, sizeof(*info));
81 switch (!!data * *ver) {
82 case 0x10:
83 info->v00_40 = (nv_ro08(bios, data + 0x00) & 0x40) >> 6;
84 info->bits = nv_ro08(bios, data + 0x00) & 0x3f;
85 info->modulo = nv_ro08(bios, data + 0x01);
86 info->v02_40 = (nv_ro08(bios, data + 0x02) & 0x40) >> 6;
87 info->v02_07 = nv_ro08(bios, data + 0x02) & 0x07;
88 info->v03 = nv_ro08(bios, data + 0x03);
89 return data;
90 default:
91 break;
92 }
93 return 0x00000000;
94}
95
96u32
97nvbios_M0209Se(struct nouveau_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
98{
99
100 u8 cnt, len;
101 u32 data = nvbios_M0209Ee(bios, ent, ver, hdr, &cnt, &len);
102 if (data && idx < cnt) {
103 data = data + *hdr + idx * len;
104 *hdr = len;
105 return data;
106 }
107 return 0x00000000;
108}
109
110u32
111nvbios_M0209Sp(struct nouveau_bios *bios, int ent, int idx, u8 *ver, u8 *hdr,
112 struct nvbios_M0209S *info)
113{
114 struct nvbios_M0209E M0209E;
115 u8 cnt, len;
116 u32 data = nvbios_M0209Ep(bios, ent, ver, hdr, &cnt, &len, &M0209E);
117 if (data) {
118 u32 i, data = nvbios_M0209Se(bios, ent, idx, ver, hdr);
119 memset(info, 0x00, sizeof(*info));
120 switch (!!data * *ver) {
121 case 0x10:
122 for (i = 0; i < ARRAY_SIZE(info->data); i++) {
123 u32 bits = (i % M0209E.modulo) * M0209E.bits;
124 u32 mask = (1ULL << M0209E.bits) - 1;
125 u16 off = bits / 8;
126 u8 mod = bits % 8;
127 info->data[i] = nv_ro32(bios, data + off);
128 info->data[i] = info->data[i] >> mod;
129 info->data[i] = info->data[i] & mask;
130 }
131 return data;
132 default:
133 break;
134 }
135 }
136 return 0x00000000;
137}