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path: root/drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c')
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c172
1 files changed, 172 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c b/drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c
new file mode 100644
index 000000000000..abe324993eaf
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/copy/nvc0.c
@@ -0,0 +1,172 @@
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <engine/falcon.h>
26#include <engine/fifo.h>
27#include <engine/copy.h>
28
29#include <core/enum.h>
30#include <core/enum.h>
31
32#include "fuc/nvc0.fuc3.h"
33
34struct nvc0_copy_priv {
35 struct nouveau_falcon base;
36};
37
38/*******************************************************************************
39 * Copy object classes
40 ******************************************************************************/
41
42static struct nouveau_oclass
43nvc0_copy0_sclass[] = {
44 { 0x90b5, &nouveau_object_ofuncs },
45 {},
46};
47
48static struct nouveau_oclass
49nvc0_copy1_sclass[] = {
50 { 0x90b8, &nouveau_object_ofuncs },
51 {},
52};
53
54/*******************************************************************************
55 * PCOPY context
56 ******************************************************************************/
57
58static struct nouveau_ofuncs
59nvc0_copy_context_ofuncs = {
60 .ctor = _nouveau_falcon_context_ctor,
61 .dtor = _nouveau_falcon_context_dtor,
62 .init = _nouveau_falcon_context_init,
63 .fini = _nouveau_falcon_context_fini,
64 .rd32 = _nouveau_falcon_context_rd32,
65 .wr32 = _nouveau_falcon_context_wr32,
66};
67
68static struct nouveau_oclass
69nvc0_copy0_cclass = {
70 .handle = NV_ENGCTX(COPY0, 0xc0),
71 .ofuncs = &nvc0_copy_context_ofuncs,
72};
73
74static struct nouveau_oclass
75nvc0_copy1_cclass = {
76 .handle = NV_ENGCTX(COPY1, 0xc0),
77 .ofuncs = &nvc0_copy_context_ofuncs,
78};
79
80/*******************************************************************************
81 * PCOPY engine/subdev functions
82 ******************************************************************************/
83
84static int
85nvc0_copy_init(struct nouveau_object *object)
86{
87 struct nvc0_copy_priv *priv = (void *)object;
88 int ret;
89
90 ret = nouveau_falcon_init(&priv->base);
91 if (ret)
92 return ret;
93
94 nv_wo32(priv, 0x084, nv_engidx(&priv->base.base) - NVDEV_ENGINE_COPY0);
95 return 0;
96}
97
98static int
99nvc0_copy0_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
100 struct nouveau_oclass *oclass, void *data, u32 size,
101 struct nouveau_object **pobject)
102{
103 struct nvc0_copy_priv *priv;
104 int ret;
105
106 ret = nouveau_falcon_create(parent, engine, oclass, 0x104000, true,
107 "PCE0", "copy0", &priv);
108 *pobject = nv_object(priv);
109 if (ret)
110 return ret;
111
112 nv_subdev(priv)->unit = 0x00000040;
113 nv_subdev(priv)->intr = nva3_copy_intr;
114 nv_engine(priv)->cclass = &nvc0_copy0_cclass;
115 nv_engine(priv)->sclass = nvc0_copy0_sclass;
116 nv_falcon(priv)->code.data = nvc0_pcopy_code;
117 nv_falcon(priv)->code.size = sizeof(nvc0_pcopy_code);
118 nv_falcon(priv)->data.data = nvc0_pcopy_data;
119 nv_falcon(priv)->data.size = sizeof(nvc0_pcopy_data);
120 return 0;
121}
122
123static int
124nvc0_copy1_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
125 struct nouveau_oclass *oclass, void *data, u32 size,
126 struct nouveau_object **pobject)
127{
128 struct nvc0_copy_priv *priv;
129 int ret;
130
131 ret = nouveau_falcon_create(parent, engine, oclass, 0x105000, true,
132 "PCE1", "copy1", &priv);
133 *pobject = nv_object(priv);
134 if (ret)
135 return ret;
136
137 nv_subdev(priv)->unit = 0x00000080;
138 nv_subdev(priv)->intr = nva3_copy_intr;
139 nv_engine(priv)->cclass = &nvc0_copy1_cclass;
140 nv_engine(priv)->sclass = nvc0_copy1_sclass;
141 nv_falcon(priv)->code.data = nvc0_pcopy_code;
142 nv_falcon(priv)->code.size = sizeof(nvc0_pcopy_code);
143 nv_falcon(priv)->data.data = nvc0_pcopy_data;
144 nv_falcon(priv)->data.size = sizeof(nvc0_pcopy_data);
145 return 0;
146}
147
148struct nouveau_oclass
149nvc0_copy0_oclass = {
150 .handle = NV_ENGINE(COPY0, 0xc0),
151 .ofuncs = &(struct nouveau_ofuncs) {
152 .ctor = nvc0_copy0_ctor,
153 .dtor = _nouveau_falcon_dtor,
154 .init = nvc0_copy_init,
155 .fini = _nouveau_falcon_fini,
156 .rd32 = _nouveau_falcon_rd32,
157 .wr32 = _nouveau_falcon_wr32,
158 },
159};
160
161struct nouveau_oclass
162nvc0_copy1_oclass = {
163 .handle = NV_ENGINE(COPY1, 0xc0),
164 .ofuncs = &(struct nouveau_ofuncs) {
165 .ctor = nvc0_copy1_ctor,
166 .dtor = _nouveau_falcon_dtor,
167 .init = nvc0_copy_init,
168 .fini = _nouveau_falcon_fini,
169 .rd32 = _nouveau_falcon_rd32,
170 .wr32 = _nouveau_falcon_wr32,
171 },
172};