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path: root/drivers/gpu/drm/nouveau/nv84_fence.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nv84_fence.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv84_fence.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c
index b0d147a675c4..c686650584b6 100644
--- a/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -31,6 +31,8 @@
31#include "nouveau_dma.h" 31#include "nouveau_dma.h"
32#include "nouveau_fence.h" 32#include "nouveau_fence.h"
33 33
34#include "nv50_display.h"
35
34struct nv84_fence_chan { 36struct nv84_fence_chan {
35 struct nouveau_fence_chan base; 37 struct nouveau_fence_chan base;
36}; 38};
@@ -99,6 +101,7 @@ nv84_fence_context_del(struct nouveau_channel *chan)
99static int 101static int
100nv84_fence_context_new(struct nouveau_channel *chan) 102nv84_fence_context_new(struct nouveau_channel *chan)
101{ 103{
104 struct drm_device *dev = chan->drm->dev;
102 struct nouveau_fifo_chan *fifo = (void *)chan->object; 105 struct nouveau_fifo_chan *fifo = (void *)chan->object;
103 struct nv84_fence_priv *priv = chan->drm->fence; 106 struct nv84_fence_priv *priv = chan->drm->fence;
104 struct nv84_fence_chan *fctx; 107 struct nv84_fence_chan *fctx;
@@ -123,8 +126,8 @@ nv84_fence_context_new(struct nouveau_channel *chan)
123 &object); 126 &object);
124 127
125 /* dma objects for display sync channel semaphore blocks */ 128 /* dma objects for display sync channel semaphore blocks */
126 for (i = 0; !ret && i < chan->drm->dev->mode_config.num_crtc; i++) { 129 for (i = 0; !ret && i < dev->mode_config.num_crtc; i++) {
127 struct nouveau_bo *bo = nv50sema(chan->drm->dev, i); 130 struct nouveau_bo *bo = nv50_display_crtc_sema(dev, i);
128 131
129 ret = nouveau_object_new(nv_object(chan->cli), chan->handle, 132 ret = nouveau_object_new(nv_object(chan->cli), chan->handle,
130 NvEvoSema0 + i, 0x003d, 133 NvEvoSema0 + i, 0x003d,