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path: root/drivers/gpu/drm/nouveau/nv50_instmem.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_instmem.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv50_instmem.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c
index b773229b7647..0651e7629235 100644
--- a/drivers/gpu/drm/nouveau/nv50_instmem.c
+++ b/drivers/gpu/drm/nouveau/nv50_instmem.c
@@ -131,10 +131,10 @@ nv50_instmem_init(struct drm_device *dev)
131 } 131 }
132 132
133 /* we need a channel to plug into the hw to control the BARs */ 133 /* we need a channel to plug into the hw to control the BARs */
134 ret = nv50_channel_new(dev, 128*1024, &dev_priv->fifos[0]); 134 ret = nv50_channel_new(dev, 128*1024, &dev_priv->channels.ptr[0]);
135 if (ret) 135 if (ret)
136 return ret; 136 return ret;
137 chan = dev_priv->fifos[127] = dev_priv->fifos[0]; 137 chan = dev_priv->channels.ptr[127] = dev_priv->channels.ptr[0];
138 138
139 /* allocate page table for PRAMIN BAR */ 139 /* allocate page table for PRAMIN BAR */
140 ret = nouveau_gpuobj_new(dev, chan, (dev_priv->ramin_size >> 12) * 8, 140 ret = nouveau_gpuobj_new(dev, chan, (dev_priv->ramin_size >> 12) * 8,
@@ -240,7 +240,7 @@ nv50_instmem_takedown(struct drm_device *dev)
240{ 240{
241 struct drm_nouveau_private *dev_priv = dev->dev_private; 241 struct drm_nouveau_private *dev_priv = dev->dev_private;
242 struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv; 242 struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
243 struct nouveau_channel *chan = dev_priv->fifos[0]; 243 struct nouveau_channel *chan = dev_priv->channels.ptr[0];
244 int i; 244 int i;
245 245
246 NV_DEBUG(dev, "\n"); 246 NV_DEBUG(dev, "\n");
@@ -264,8 +264,8 @@ nv50_instmem_takedown(struct drm_device *dev)
264 nouveau_gpuobj_ref(NULL, &chan->vm_vram_pt[i]); 264 nouveau_gpuobj_ref(NULL, &chan->vm_vram_pt[i]);
265 dev_priv->vm_vram_pt_nr = 0; 265 dev_priv->vm_vram_pt_nr = 0;
266 266
267 nv50_channel_del(&dev_priv->fifos[0]); 267 nv50_channel_del(&dev_priv->channels.ptr[0]);
268 dev_priv->fifos[127] = NULL; 268 dev_priv->channels.ptr[127] = NULL;
269 } 269 }
270 270
271 dev_priv->engine.instmem.priv = NULL; 271 dev_priv->engine.instmem.priv = NULL;
@@ -276,7 +276,7 @@ int
276nv50_instmem_suspend(struct drm_device *dev) 276nv50_instmem_suspend(struct drm_device *dev)
277{ 277{
278 struct drm_nouveau_private *dev_priv = dev->dev_private; 278 struct drm_nouveau_private *dev_priv = dev->dev_private;
279 struct nouveau_channel *chan = dev_priv->fifos[0]; 279 struct nouveau_channel *chan = dev_priv->channels.ptr[0];
280 struct nouveau_gpuobj *ramin = chan->ramin; 280 struct nouveau_gpuobj *ramin = chan->ramin;
281 int i; 281 int i;
282 282
@@ -294,7 +294,7 @@ nv50_instmem_resume(struct drm_device *dev)
294{ 294{
295 struct drm_nouveau_private *dev_priv = dev->dev_private; 295 struct drm_nouveau_private *dev_priv = dev->dev_private;
296 struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv; 296 struct nv50_instmem_priv *priv = dev_priv->engine.instmem.priv;
297 struct nouveau_channel *chan = dev_priv->fifos[0]; 297 struct nouveau_channel *chan = dev_priv->channels.ptr[0];
298 struct nouveau_gpuobj *ramin = chan->ramin; 298 struct nouveau_gpuobj *ramin = chan->ramin;
299 int i; 299 int i;
300 300