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path: root/drivers/gpu/drm/nouveau/nouveau_state.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_state.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c18
1 files changed, 6 insertions, 12 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 6fd99f10eed6..67ee32fbba9d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -54,8 +54,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
54 engine->instmem.clear = nv04_instmem_clear; 54 engine->instmem.clear = nv04_instmem_clear;
55 engine->instmem.bind = nv04_instmem_bind; 55 engine->instmem.bind = nv04_instmem_bind;
56 engine->instmem.unbind = nv04_instmem_unbind; 56 engine->instmem.unbind = nv04_instmem_unbind;
57 engine->instmem.prepare_access = nv04_instmem_prepare_access; 57 engine->instmem.flush = nv04_instmem_flush;
58 engine->instmem.finish_access = nv04_instmem_finish_access;
59 engine->mc.init = nv04_mc_init; 58 engine->mc.init = nv04_mc_init;
60 engine->mc.takedown = nv04_mc_takedown; 59 engine->mc.takedown = nv04_mc_takedown;
61 engine->timer.init = nv04_timer_init; 60 engine->timer.init = nv04_timer_init;
@@ -95,8 +94,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
95 engine->instmem.clear = nv04_instmem_clear; 94 engine->instmem.clear = nv04_instmem_clear;
96 engine->instmem.bind = nv04_instmem_bind; 95 engine->instmem.bind = nv04_instmem_bind;
97 engine->instmem.unbind = nv04_instmem_unbind; 96 engine->instmem.unbind = nv04_instmem_unbind;
98 engine->instmem.prepare_access = nv04_instmem_prepare_access; 97 engine->instmem.flush = nv04_instmem_flush;
99 engine->instmem.finish_access = nv04_instmem_finish_access;
100 engine->mc.init = nv04_mc_init; 98 engine->mc.init = nv04_mc_init;
101 engine->mc.takedown = nv04_mc_takedown; 99 engine->mc.takedown = nv04_mc_takedown;
102 engine->timer.init = nv04_timer_init; 100 engine->timer.init = nv04_timer_init;
@@ -138,8 +136,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
138 engine->instmem.clear = nv04_instmem_clear; 136 engine->instmem.clear = nv04_instmem_clear;
139 engine->instmem.bind = nv04_instmem_bind; 137 engine->instmem.bind = nv04_instmem_bind;
140 engine->instmem.unbind = nv04_instmem_unbind; 138 engine->instmem.unbind = nv04_instmem_unbind;
141 engine->instmem.prepare_access = nv04_instmem_prepare_access; 139 engine->instmem.flush = nv04_instmem_flush;
142 engine->instmem.finish_access = nv04_instmem_finish_access;
143 engine->mc.init = nv04_mc_init; 140 engine->mc.init = nv04_mc_init;
144 engine->mc.takedown = nv04_mc_takedown; 141 engine->mc.takedown = nv04_mc_takedown;
145 engine->timer.init = nv04_timer_init; 142 engine->timer.init = nv04_timer_init;
@@ -181,8 +178,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
181 engine->instmem.clear = nv04_instmem_clear; 178 engine->instmem.clear = nv04_instmem_clear;
182 engine->instmem.bind = nv04_instmem_bind; 179 engine->instmem.bind = nv04_instmem_bind;
183 engine->instmem.unbind = nv04_instmem_unbind; 180 engine->instmem.unbind = nv04_instmem_unbind;
184 engine->instmem.prepare_access = nv04_instmem_prepare_access; 181 engine->instmem.flush = nv04_instmem_flush;
185 engine->instmem.finish_access = nv04_instmem_finish_access;
186 engine->mc.init = nv04_mc_init; 182 engine->mc.init = nv04_mc_init;
187 engine->mc.takedown = nv04_mc_takedown; 183 engine->mc.takedown = nv04_mc_takedown;
188 engine->timer.init = nv04_timer_init; 184 engine->timer.init = nv04_timer_init;
@@ -225,8 +221,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
225 engine->instmem.clear = nv04_instmem_clear; 221 engine->instmem.clear = nv04_instmem_clear;
226 engine->instmem.bind = nv04_instmem_bind; 222 engine->instmem.bind = nv04_instmem_bind;
227 engine->instmem.unbind = nv04_instmem_unbind; 223 engine->instmem.unbind = nv04_instmem_unbind;
228 engine->instmem.prepare_access = nv04_instmem_prepare_access; 224 engine->instmem.flush = nv04_instmem_flush;
229 engine->instmem.finish_access = nv04_instmem_finish_access;
230 engine->mc.init = nv40_mc_init; 225 engine->mc.init = nv40_mc_init;
231 engine->mc.takedown = nv40_mc_takedown; 226 engine->mc.takedown = nv40_mc_takedown;
232 engine->timer.init = nv04_timer_init; 227 engine->timer.init = nv04_timer_init;
@@ -271,8 +266,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
271 engine->instmem.clear = nv50_instmem_clear; 266 engine->instmem.clear = nv50_instmem_clear;
272 engine->instmem.bind = nv50_instmem_bind; 267 engine->instmem.bind = nv50_instmem_bind;
273 engine->instmem.unbind = nv50_instmem_unbind; 268 engine->instmem.unbind = nv50_instmem_unbind;
274 engine->instmem.prepare_access = nv50_instmem_prepare_access; 269 engine->instmem.flush = nv50_instmem_flush;
275 engine->instmem.finish_access = nv50_instmem_finish_access;
276 engine->mc.init = nv50_mc_init; 270 engine->mc.init = nv50_mc_init;
277 engine->mc.takedown = nv50_mc_takedown; 271 engine->mc.takedown = nv50_mc_takedown;
278 engine->timer.init = nv04_timer_init; 272 engine->timer.init = nv04_timer_init;