diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_reg.h')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_reg.h | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h b/drivers/gpu/drm/nouveau/nouveau_reg.h index d0ce86c24ebf..b6384d36d5d0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_reg.h +++ b/drivers/gpu/drm/nouveau/nouveau_reg.h | |||
| @@ -715,20 +715,21 @@ | |||
| 715 | #define NV50_PDISPLAY_INTR_1_CLK_UNK10 0x00000010 | 715 | #define NV50_PDISPLAY_INTR_1_CLK_UNK10 0x00000010 |
| 716 | #define NV50_PDISPLAY_INTR_1_CLK_UNK20 0x00000020 | 716 | #define NV50_PDISPLAY_INTR_1_CLK_UNK20 0x00000020 |
| 717 | #define NV50_PDISPLAY_INTR_1_CLK_UNK40 0x00000040 | 717 | #define NV50_PDISPLAY_INTR_1_CLK_UNK40 0x00000040 |
| 718 | #define NV50_PDISPLAY_INTR_EN 0x0061002c | 718 | #define NV50_PDISPLAY_INTR_EN_0 0x00610028 |
| 719 | #define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC 0x0000000c | 719 | #define NV50_PDISPLAY_INTR_EN_1 0x0061002c |
| 720 | #define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC_(n) (1 << ((n) + 2)) | 720 | #define NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC 0x0000000c |
| 721 | #define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC_0 0x00000004 | 721 | #define NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_(n) (1 << ((n) + 2)) |
| 722 | #define NV50_PDISPLAY_INTR_EN_VBLANK_CRTC_1 0x00000008 | 722 | #define NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_0 0x00000004 |
| 723 | #define NV50_PDISPLAY_INTR_EN_CLK_UNK10 0x00000010 | 723 | #define NV50_PDISPLAY_INTR_EN_1_VBLANK_CRTC_1 0x00000008 |
| 724 | #define NV50_PDISPLAY_INTR_EN_CLK_UNK20 0x00000020 | 724 | #define NV50_PDISPLAY_INTR_EN_1_CLK_UNK10 0x00000010 |
| 725 | #define NV50_PDISPLAY_INTR_EN_CLK_UNK40 0x00000040 | 725 | #define NV50_PDISPLAY_INTR_EN_1_CLK_UNK20 0x00000020 |
| 726 | #define NV50_PDISPLAY_INTR_EN_1_CLK_UNK40 0x00000040 | ||
| 726 | #define NV50_PDISPLAY_UNK30_CTRL 0x00610030 | 727 | #define NV50_PDISPLAY_UNK30_CTRL 0x00610030 |
| 727 | #define NV50_PDISPLAY_UNK30_CTRL_UPDATE_VCLK0 0x00000200 | 728 | #define NV50_PDISPLAY_UNK30_CTRL_UPDATE_VCLK0 0x00000200 |
| 728 | #define NV50_PDISPLAY_UNK30_CTRL_UPDATE_VCLK1 0x00000400 | 729 | #define NV50_PDISPLAY_UNK30_CTRL_UPDATE_VCLK1 0x00000400 |
| 729 | #define NV50_PDISPLAY_UNK30_CTRL_PENDING 0x80000000 | 730 | #define NV50_PDISPLAY_UNK30_CTRL_PENDING 0x80000000 |
| 730 | #define NV50_PDISPLAY_TRAPPED_ADDR 0x00610080 | 731 | #define NV50_PDISPLAY_TRAPPED_ADDR(i) ((i) * 0x08 + 0x00610080) |
| 731 | #define NV50_PDISPLAY_TRAPPED_DATA 0x00610084 | 732 | #define NV50_PDISPLAY_TRAPPED_DATA(i) ((i) * 0x08 + 0x00610084) |
| 732 | #define NV50_PDISPLAY_EVO_CTRL(i) ((i) * 0x10 + 0x00610200) | 733 | #define NV50_PDISPLAY_EVO_CTRL(i) ((i) * 0x10 + 0x00610200) |
| 733 | #define NV50_PDISPLAY_EVO_CTRL_DMA 0x00000010 | 734 | #define NV50_PDISPLAY_EVO_CTRL_DMA 0x00000010 |
| 734 | #define NV50_PDISPLAY_EVO_CTRL_DMA_DISABLED 0x00000000 | 735 | #define NV50_PDISPLAY_EVO_CTRL_DMA_DISABLED 0x00000000 |