diff options
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 46 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 54 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_i2c.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_sdvo.c | 2 |
8 files changed, 97 insertions, 40 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 9ebe895c17d6..a2e4953b8e8d 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -364,40 +364,64 @@ static const struct pci_device_id pciidlist[] = { /* aka */ | |||
364 | INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */ | 364 | INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */ |
365 | INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */ | 365 | INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */ |
366 | INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */ | 366 | INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */ |
367 | INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */ | 367 | INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT3 desktop */ |
368 | INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */ | 368 | INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */ |
369 | INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */ | 369 | INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */ |
370 | INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */ | 370 | INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT3 server */ |
371 | INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */ | 371 | INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */ |
372 | INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */ | 372 | INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */ |
373 | INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */ | 373 | INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */ |
374 | INTEL_VGA_DEVICE(0x040B, &intel_haswell_d_info), /* GT1 reserved */ | ||
375 | INTEL_VGA_DEVICE(0x041B, &intel_haswell_d_info), /* GT2 reserved */ | ||
376 | INTEL_VGA_DEVICE(0x042B, &intel_haswell_d_info), /* GT3 reserved */ | ||
377 | INTEL_VGA_DEVICE(0x040E, &intel_haswell_d_info), /* GT1 reserved */ | ||
378 | INTEL_VGA_DEVICE(0x041E, &intel_haswell_d_info), /* GT2 reserved */ | ||
379 | INTEL_VGA_DEVICE(0x042E, &intel_haswell_d_info), /* GT3 reserved */ | ||
374 | INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */ | 380 | INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */ |
375 | INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */ | 381 | INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */ |
376 | INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */ | 382 | INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT3 desktop */ |
377 | INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */ | 383 | INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */ |
378 | INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */ | 384 | INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */ |
379 | INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */ | 385 | INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT3 server */ |
380 | INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */ | 386 | INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */ |
381 | INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */ | 387 | INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */ |
382 | INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */ | 388 | INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT3 mobile */ |
389 | INTEL_VGA_DEVICE(0x0C0B, &intel_haswell_d_info), /* SDV GT1 reserved */ | ||
390 | INTEL_VGA_DEVICE(0x0C1B, &intel_haswell_d_info), /* SDV GT2 reserved */ | ||
391 | INTEL_VGA_DEVICE(0x0C2B, &intel_haswell_d_info), /* SDV GT3 reserved */ | ||
392 | INTEL_VGA_DEVICE(0x0C0E, &intel_haswell_d_info), /* SDV GT1 reserved */ | ||
393 | INTEL_VGA_DEVICE(0x0C1E, &intel_haswell_d_info), /* SDV GT2 reserved */ | ||
394 | INTEL_VGA_DEVICE(0x0C2E, &intel_haswell_d_info), /* SDV GT3 reserved */ | ||
383 | INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */ | 395 | INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */ |
384 | INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */ | 396 | INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */ |
385 | INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */ | 397 | INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT3 desktop */ |
386 | INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */ | 398 | INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */ |
387 | INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */ | 399 | INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */ |
388 | INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */ | 400 | INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT3 server */ |
389 | INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */ | 401 | INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */ |
390 | INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */ | 402 | INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */ |
391 | INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */ | 403 | INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT3 mobile */ |
404 | INTEL_VGA_DEVICE(0x0A0B, &intel_haswell_d_info), /* ULT GT1 reserved */ | ||
405 | INTEL_VGA_DEVICE(0x0A1B, &intel_haswell_d_info), /* ULT GT2 reserved */ | ||
406 | INTEL_VGA_DEVICE(0x0A2B, &intel_haswell_d_info), /* ULT GT3 reserved */ | ||
407 | INTEL_VGA_DEVICE(0x0A0E, &intel_haswell_m_info), /* ULT GT1 reserved */ | ||
408 | INTEL_VGA_DEVICE(0x0A1E, &intel_haswell_m_info), /* ULT GT2 reserved */ | ||
409 | INTEL_VGA_DEVICE(0x0A2E, &intel_haswell_m_info), /* ULT GT3 reserved */ | ||
392 | INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */ | 410 | INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */ |
393 | INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */ | 411 | INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */ |
394 | INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */ | 412 | INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT3 desktop */ |
395 | INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */ | 413 | INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */ |
396 | INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */ | 414 | INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */ |
397 | INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */ | 415 | INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT3 server */ |
398 | INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */ | 416 | INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */ |
399 | INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */ | 417 | INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */ |
400 | INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */ | 418 | INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT3 mobile */ |
419 | INTEL_VGA_DEVICE(0x0D0B, &intel_haswell_d_info), /* CRW GT1 reserved */ | ||
420 | INTEL_VGA_DEVICE(0x0D1B, &intel_haswell_d_info), /* CRW GT2 reserved */ | ||
421 | INTEL_VGA_DEVICE(0x0D2B, &intel_haswell_d_info), /* CRW GT3 reserved */ | ||
422 | INTEL_VGA_DEVICE(0x0D0E, &intel_haswell_d_info), /* CRW GT1 reserved */ | ||
423 | INTEL_VGA_DEVICE(0x0D1E, &intel_haswell_d_info), /* CRW GT2 reserved */ | ||
424 | INTEL_VGA_DEVICE(0x0D2E, &intel_haswell_d_info), /* CRW GT3 reserved */ | ||
401 | INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info), | 425 | INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info), |
402 | INTEL_VGA_DEVICE(0x0f31, &intel_valleyview_m_info), | 426 | INTEL_VGA_DEVICE(0x0f31, &intel_valleyview_m_info), |
403 | INTEL_VGA_DEVICE(0x0f32, &intel_valleyview_m_info), | 427 | INTEL_VGA_DEVICE(0x0f32, &intel_valleyview_m_info), |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d5dcf7fe1ee9..b9d00dcf9a2d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1943,4 +1943,19 @@ static inline void __user *to_user_ptr(u64 address) | |||
1943 | return (void __user *)(uintptr_t)address; | 1943 | return (void __user *)(uintptr_t)address; |
1944 | } | 1944 | } |
1945 | 1945 | ||
1946 | static inline unsigned long msecs_to_jiffies_timeout(const unsigned int m) | ||
1947 | { | ||
1948 | unsigned long j = msecs_to_jiffies(m); | ||
1949 | |||
1950 | return min_t(unsigned long, MAX_JIFFY_OFFSET, j + 1); | ||
1951 | } | ||
1952 | |||
1953 | static inline unsigned long | ||
1954 | timespec_to_jiffies_timeout(const struct timespec *value) | ||
1955 | { | ||
1956 | unsigned long j = timespec_to_jiffies(value); | ||
1957 | |||
1958 | return min_t(unsigned long, MAX_JIFFY_OFFSET, j + 1); | ||
1959 | } | ||
1960 | |||
1946 | #endif | 1961 | #endif |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6165535d15f0..970ad17c99ab 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -91,14 +91,11 @@ i915_gem_wait_for_error(struct i915_gpu_error *error) | |||
91 | { | 91 | { |
92 | int ret; | 92 | int ret; |
93 | 93 | ||
94 | #define EXIT_COND (!i915_reset_in_progress(error)) | 94 | #define EXIT_COND (!i915_reset_in_progress(error) || \ |
95 | i915_terminally_wedged(error)) | ||
95 | if (EXIT_COND) | 96 | if (EXIT_COND) |
96 | return 0; | 97 | return 0; |
97 | 98 | ||
98 | /* GPU is already declared terminally dead, give up. */ | ||
99 | if (i915_terminally_wedged(error)) | ||
100 | return -EIO; | ||
101 | |||
102 | /* | 99 | /* |
103 | * Only wait 10 seconds for the gpu reset to complete to avoid hanging | 100 | * Only wait 10 seconds for the gpu reset to complete to avoid hanging |
104 | * userspace. If it takes that long something really bad is going on and | 101 | * userspace. If it takes that long something really bad is going on and |
@@ -1003,7 +1000,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, | |||
1003 | wait_forever = false; | 1000 | wait_forever = false; |
1004 | } | 1001 | } |
1005 | 1002 | ||
1006 | timeout_jiffies = timespec_to_jiffies(&wait_time); | 1003 | timeout_jiffies = timespec_to_jiffies_timeout(&wait_time); |
1007 | 1004 | ||
1008 | if (WARN_ON(!ring->irq_get(ring))) | 1005 | if (WARN_ON(!ring->irq_get(ring))) |
1009 | return -ENODEV; | 1006 | return -ENODEV; |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index efe829919755..56746dcac40f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -7937,6 +7937,11 @@ intel_modeset_check_state(struct drm_device *dev) | |||
7937 | memset(&pipe_config, 0, sizeof(pipe_config)); | 7937 | memset(&pipe_config, 0, sizeof(pipe_config)); |
7938 | active = dev_priv->display.get_pipe_config(crtc, | 7938 | active = dev_priv->display.get_pipe_config(crtc, |
7939 | &pipe_config); | 7939 | &pipe_config); |
7940 | |||
7941 | /* hw state is inconsistent with the pipe A quirk */ | ||
7942 | if (crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) | ||
7943 | active = crtc->active; | ||
7944 | |||
7940 | WARN(crtc->active != active, | 7945 | WARN(crtc->active != active, |
7941 | "crtc active state doesn't match with hw state " | 7946 | "crtc active state doesn't match with hw state " |
7942 | "(expected %i, found %i)\n", crtc->active, active); | 7947 | "(expected %i, found %i)\n", crtc->active, active); |
@@ -8140,6 +8145,21 @@ static void intel_set_config_restore_state(struct drm_device *dev, | |||
8140 | } | 8145 | } |
8141 | } | 8146 | } |
8142 | 8147 | ||
8148 | static bool | ||
8149 | is_crtc_connector_off(struct drm_crtc *crtc, struct drm_connector *connectors, | ||
8150 | int num_connectors) | ||
8151 | { | ||
8152 | int i; | ||
8153 | |||
8154 | for (i = 0; i < num_connectors; i++) | ||
8155 | if (connectors[i].encoder && | ||
8156 | connectors[i].encoder->crtc == crtc && | ||
8157 | connectors[i].dpms != DRM_MODE_DPMS_ON) | ||
8158 | return true; | ||
8159 | |||
8160 | return false; | ||
8161 | } | ||
8162 | |||
8143 | static void | 8163 | static void |
8144 | intel_set_config_compute_mode_changes(struct drm_mode_set *set, | 8164 | intel_set_config_compute_mode_changes(struct drm_mode_set *set, |
8145 | struct intel_set_config *config) | 8165 | struct intel_set_config *config) |
@@ -8147,7 +8167,11 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set, | |||
8147 | 8167 | ||
8148 | /* We should be able to check here if the fb has the same properties | 8168 | /* We should be able to check here if the fb has the same properties |
8149 | * and then just flip_or_move it */ | 8169 | * and then just flip_or_move it */ |
8150 | if (set->crtc->fb != set->fb) { | 8170 | if (set->connectors != NULL && |
8171 | is_crtc_connector_off(set->crtc, *set->connectors, | ||
8172 | set->num_connectors)) { | ||
8173 | config->mode_changed = true; | ||
8174 | } else if (set->crtc->fb != set->fb) { | ||
8151 | /* If we have no fb then treat it as a full mode set */ | 8175 | /* If we have no fb then treat it as a full mode set */ |
8152 | if (set->crtc->fb == NULL) { | 8176 | if (set->crtc->fb == NULL) { |
8153 | DRM_DEBUG_KMS("crtc has no fb, full mode set\n"); | 8177 | DRM_DEBUG_KMS("crtc has no fb, full mode set\n"); |
@@ -8157,8 +8181,9 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set, | |||
8157 | } else if (set->fb->pixel_format != | 8181 | } else if (set->fb->pixel_format != |
8158 | set->crtc->fb->pixel_format) { | 8182 | set->crtc->fb->pixel_format) { |
8159 | config->mode_changed = true; | 8183 | config->mode_changed = true; |
8160 | } else | 8184 | } else { |
8161 | config->fb_changed = true; | 8185 | config->fb_changed = true; |
8186 | } | ||
8162 | } | 8187 | } |
8163 | 8188 | ||
8164 | if (set->fb && (set->x != set->crtc->x || set->y != set->crtc->y)) | 8189 | if (set->fb && (set->x != set->crtc->x || set->y != set->crtc->y)) |
@@ -8332,11 +8357,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set) | |||
8332 | 8357 | ||
8333 | ret = intel_set_mode(set->crtc, set->mode, | 8358 | ret = intel_set_mode(set->crtc, set->mode, |
8334 | set->x, set->y, set->fb); | 8359 | set->x, set->y, set->fb); |
8335 | if (ret) { | ||
8336 | DRM_ERROR("failed to set mode on [CRTC:%d], err = %d\n", | ||
8337 | set->crtc->base.id, ret); | ||
8338 | goto fail; | ||
8339 | } | ||
8340 | } else if (config->fb_changed) { | 8360 | } else if (config->fb_changed) { |
8341 | intel_crtc_wait_for_pending_flips(set->crtc); | 8361 | intel_crtc_wait_for_pending_flips(set->crtc); |
8342 | 8362 | ||
@@ -8344,18 +8364,18 @@ static int intel_crtc_set_config(struct drm_mode_set *set) | |||
8344 | set->x, set->y, set->fb); | 8364 | set->x, set->y, set->fb); |
8345 | } | 8365 | } |
8346 | 8366 | ||
8347 | intel_set_config_free(config); | 8367 | if (ret) { |
8348 | 8368 | DRM_ERROR("failed to set mode on [CRTC:%d], err = %d\n", | |
8349 | return 0; | 8369 | set->crtc->base.id, ret); |
8350 | |||
8351 | fail: | 8370 | fail: |
8352 | intel_set_config_restore_state(dev, config); | 8371 | intel_set_config_restore_state(dev, config); |
8353 | 8372 | ||
8354 | /* Try to restore the config */ | 8373 | /* Try to restore the config */ |
8355 | if (config->mode_changed && | 8374 | if (config->mode_changed && |
8356 | intel_set_mode(save_set.crtc, save_set.mode, | 8375 | intel_set_mode(save_set.crtc, save_set.mode, |
8357 | save_set.x, save_set.y, save_set.fb)) | 8376 | save_set.x, save_set.y, save_set.fb)) |
8358 | DRM_ERROR("failed to restore config after modeset failure\n"); | 8377 | DRM_ERROR("failed to restore config after modeset failure\n"); |
8378 | } | ||
8359 | 8379 | ||
8360 | out_config: | 8380 | out_config: |
8361 | intel_set_config_free(config); | 8381 | intel_set_config_free(config); |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 3d704b706a8d..70789b1b5642 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -303,7 +303,7 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq) | |||
303 | #define C (((status = I915_READ_NOTRACE(ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) | 303 | #define C (((status = I915_READ_NOTRACE(ch_ctl)) & DP_AUX_CH_CTL_SEND_BUSY) == 0) |
304 | if (has_aux_irq) | 304 | if (has_aux_irq) |
305 | done = wait_event_timeout(dev_priv->gmbus_wait_queue, C, | 305 | done = wait_event_timeout(dev_priv->gmbus_wait_queue, C, |
306 | msecs_to_jiffies(10)); | 306 | msecs_to_jiffies_timeout(10)); |
307 | else | 307 | else |
308 | done = wait_for_atomic(C, 10) == 0; | 308 | done = wait_for_atomic(C, 10) == 0; |
309 | if (!done) | 309 | if (!done) |
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 5d245031e391..639fe192997c 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c | |||
@@ -228,7 +228,7 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv, | |||
228 | * need to wake up periodically and check that ourselves. */ | 228 | * need to wake up periodically and check that ourselves. */ |
229 | I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en); | 229 | I915_WRITE(GMBUS4 + reg_offset, gmbus4_irq_en); |
230 | 230 | ||
231 | for (i = 0; i < msecs_to_jiffies(50) + 1; i++) { | 231 | for (i = 0; i < msecs_to_jiffies_timeout(50); i++) { |
232 | prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait, | 232 | prepare_to_wait(&dev_priv->gmbus_wait_queue, &wait, |
233 | TASK_UNINTERRUPTIBLE); | 233 | TASK_UNINTERRUPTIBLE); |
234 | 234 | ||
@@ -263,7 +263,8 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv) | |||
263 | /* Important: The hw handles only the first bit, so set only one! */ | 263 | /* Important: The hw handles only the first bit, so set only one! */ |
264 | I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN); | 264 | I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN); |
265 | 265 | ||
266 | ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C, 10); | 266 | ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C, |
267 | msecs_to_jiffies_timeout(10)); | ||
267 | 268 | ||
268 | I915_WRITE(GMBUS4 + reg_offset, 0); | 269 | I915_WRITE(GMBUS4 + reg_offset, 0); |
269 | 270 | ||
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index f36f1baabd5a..29412cc89c7a 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -815,10 +815,10 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
815 | }, | 815 | }, |
816 | { | 816 | { |
817 | .callback = intel_no_lvds_dmi_callback, | 817 | .callback = intel_no_lvds_dmi_callback, |
818 | .ident = "Hewlett-Packard HP t5740e Thin Client", | 818 | .ident = "Hewlett-Packard HP t5740", |
819 | .matches = { | 819 | .matches = { |
820 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | 820 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
821 | DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"), | 821 | DMI_MATCH(DMI_PRODUCT_NAME, " t5740"), |
822 | }, | 822 | }, |
823 | }, | 823 | }, |
824 | { | 824 | { |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index d15428404b9a..4c47b449b775 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -1776,7 +1776,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) | |||
1776 | * Assume that the preferred modes are | 1776 | * Assume that the preferred modes are |
1777 | * arranged in priority order. | 1777 | * arranged in priority order. |
1778 | */ | 1778 | */ |
1779 | intel_ddc_get_modes(connector, intel_sdvo->i2c); | 1779 | intel_ddc_get_modes(connector, &intel_sdvo->ddc); |
1780 | if (list_empty(&connector->probed_modes) == false) | 1780 | if (list_empty(&connector->probed_modes) == false) |
1781 | goto end; | 1781 | goto end; |
1782 | 1782 | ||