diff options
Diffstat (limited to 'drivers/gpu/drm/i915')
23 files changed, 974 insertions, 952 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 1376dfe44c95..a0b8447b06e7 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -28,6 +28,7 @@ | |||
28 | 28 | ||
29 | #include <linux/seq_file.h> | 29 | #include <linux/seq_file.h> |
30 | #include <linux/debugfs.h> | 30 | #include <linux/debugfs.h> |
31 | #include <linux/slab.h> | ||
31 | #include "drmP.h" | 32 | #include "drmP.h" |
32 | #include "drm.h" | 33 | #include "drm.h" |
33 | #include "i915_drm.h" | 34 | #include "i915_drm.h" |
@@ -225,7 +226,7 @@ static int i915_gem_fence_regs_info(struct seq_file *m, void *data) | |||
225 | } else { | 226 | } else { |
226 | struct drm_i915_gem_object *obj_priv; | 227 | struct drm_i915_gem_object *obj_priv; |
227 | 228 | ||
228 | obj_priv = obj->driver_private; | 229 | obj_priv = to_intel_bo(obj); |
229 | seq_printf(m, "Fenced object[%2d] = %p: %s " | 230 | seq_printf(m, "Fenced object[%2d] = %p: %s " |
230 | "%08x %08zx %08x %s %08x %08x %d", | 231 | "%08x %08zx %08x %s %08x %08x %d", |
231 | i, obj, get_pin_flag(obj_priv), | 232 | i, obj, get_pin_flag(obj_priv), |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 8bfc0bbf13e6..2dc93939507d 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <linux/acpi.h> | 38 | #include <linux/acpi.h> |
39 | #include <linux/pnp.h> | 39 | #include <linux/pnp.h> |
40 | #include <linux/vga_switcheroo.h> | 40 | #include <linux/vga_switcheroo.h> |
41 | #include <linux/slab.h> | ||
41 | 42 | ||
42 | /* Really want an OS-independent resettable timer. Would like to have | 43 | /* Really want an OS-independent resettable timer. Would like to have |
43 | * this loop run for (eg) 3 sec, but have the timer reset every time | 44 | * this loop run for (eg) 3 sec, but have the timer reset every time |
@@ -1881,29 +1882,29 @@ struct drm_ioctl_desc i915_ioctls[] = { | |||
1881 | DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH ), | 1882 | DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH ), |
1882 | DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH), | 1883 | DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH), |
1883 | DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1884 | DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1884 | DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1885 | DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1885 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH), | 1886 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED), |
1886 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH), | 1887 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED), |
1887 | DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), | 1888 | DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1888 | DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), | 1889 | DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1889 | DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH), | 1890 | DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED), |
1890 | DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH), | 1891 | DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED), |
1891 | DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1892 | DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1892 | DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1893 | DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1893 | DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, 0), | 1894 | DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED), |
1894 | DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, 0), | 1895 | DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED), |
1895 | DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, 0), | 1896 | DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED), |
1896 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, 0), | 1897 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED), |
1897 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, 0), | 1898 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED), |
1898 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, 0), | 1899 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED), |
1899 | DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0), | 1900 | DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED), |
1900 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), | 1901 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED), |
1901 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), | 1902 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED), |
1902 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), | 1903 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED), |
1903 | DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0), | 1904 | DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, DRM_UNLOCKED), |
1904 | DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, 0), | 1905 | DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED), |
1905 | DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW), | 1906 | DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), |
1906 | DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW), | 1907 | DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), |
1907 | }; | 1908 | }; |
1908 | 1909 | ||
1909 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); | 1910 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 1b2e95455c05..0af3dcc85ce9 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -80,14 +80,14 @@ const static struct intel_device_info intel_i915g_info = { | |||
80 | .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1, | 80 | .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1, |
81 | }; | 81 | }; |
82 | const static struct intel_device_info intel_i915gm_info = { | 82 | const static struct intel_device_info intel_i915gm_info = { |
83 | .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1, | 83 | .is_i9xx = 1, .is_mobile = 1, |
84 | .cursor_needs_physical = 1, | 84 | .cursor_needs_physical = 1, |
85 | }; | 85 | }; |
86 | const static struct intel_device_info intel_i945g_info = { | 86 | const static struct intel_device_info intel_i945g_info = { |
87 | .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1, | 87 | .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1, |
88 | }; | 88 | }; |
89 | const static struct intel_device_info intel_i945gm_info = { | 89 | const static struct intel_device_info intel_i945gm_info = { |
90 | .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1, | 90 | .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, |
91 | .has_hotplug = 1, .cursor_needs_physical = 1, | 91 | .has_hotplug = 1, .cursor_needs_physical = 1, |
92 | }; | 92 | }; |
93 | 93 | ||
@@ -139,12 +139,12 @@ const static struct intel_device_info intel_ironlake_m_info = { | |||
139 | 139 | ||
140 | const static struct intel_device_info intel_sandybridge_d_info = { | 140 | const static struct intel_device_info intel_sandybridge_d_info = { |
141 | .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1, | 141 | .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1, |
142 | .has_hotplug = 1, | 142 | .has_hotplug = 1, .is_gen6 = 1, |
143 | }; | 143 | }; |
144 | 144 | ||
145 | const static struct intel_device_info intel_sandybridge_m_info = { | 145 | const static struct intel_device_info intel_sandybridge_m_info = { |
146 | .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1, | 146 | .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1, |
147 | .has_hotplug = 1, | 147 | .has_hotplug = 1, .is_gen6 = 1, |
148 | }; | 148 | }; |
149 | 149 | ||
150 | const static struct pci_device_id pciidlist[] = { | 150 | const static struct pci_device_id pciidlist[] = { |
@@ -361,7 +361,7 @@ int i965_reset(struct drm_device *dev, u8 flags) | |||
361 | !dev_priv->mm.suspended) { | 361 | !dev_priv->mm.suspended) { |
362 | drm_i915_ring_buffer_t *ring = &dev_priv->ring; | 362 | drm_i915_ring_buffer_t *ring = &dev_priv->ring; |
363 | struct drm_gem_object *obj = ring->ring_obj; | 363 | struct drm_gem_object *obj = ring->ring_obj; |
364 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 364 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
365 | dev_priv->mm.suspended = 0; | 365 | dev_priv->mm.suspended = 0; |
366 | 366 | ||
367 | /* Stop the ring if it's running. */ | 367 | /* Stop the ring if it's running. */ |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 979439cfb827..6960849522f8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -205,6 +205,7 @@ struct intel_device_info { | |||
205 | u8 is_g4x : 1; | 205 | u8 is_g4x : 1; |
206 | u8 is_pineview : 1; | 206 | u8 is_pineview : 1; |
207 | u8 is_ironlake : 1; | 207 | u8 is_ironlake : 1; |
208 | u8 is_gen6 : 1; | ||
208 | u8 has_fbc : 1; | 209 | u8 has_fbc : 1; |
209 | u8 has_rc6 : 1; | 210 | u8 has_rc6 : 1; |
210 | u8 has_pipe_cxsr : 1; | 211 | u8 has_pipe_cxsr : 1; |
@@ -610,6 +611,8 @@ typedef struct drm_i915_private { | |||
610 | /* Reclocking support */ | 611 | /* Reclocking support */ |
611 | bool render_reclock_avail; | 612 | bool render_reclock_avail; |
612 | bool lvds_downclock_avail; | 613 | bool lvds_downclock_avail; |
614 | /* indicate whether the LVDS EDID is OK */ | ||
615 | bool lvds_edid_good; | ||
613 | /* indicates the reduced downclock for LVDS*/ | 616 | /* indicates the reduced downclock for LVDS*/ |
614 | int lvds_downclock; | 617 | int lvds_downclock; |
615 | struct work_struct idle_work; | 618 | struct work_struct idle_work; |
@@ -730,6 +733,8 @@ struct drm_i915_gem_object { | |||
730 | atomic_t pending_flip; | 733 | atomic_t pending_flip; |
731 | }; | 734 | }; |
732 | 735 | ||
736 | #define to_intel_bo(x) ((struct drm_i915_gem_object *) (x)->driver_private) | ||
737 | |||
733 | /** | 738 | /** |
734 | * Request queue structure. | 739 | * Request queue structure. |
735 | * | 740 | * |
@@ -1084,6 +1089,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); | |||
1084 | #define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046) | 1089 | #define IS_IRONLAKE_M(dev) ((dev)->pci_device == 0x0046) |
1085 | #define IS_IRONLAKE(dev) (INTEL_INFO(dev)->is_ironlake) | 1090 | #define IS_IRONLAKE(dev) (INTEL_INFO(dev)->is_ironlake) |
1086 | #define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx) | 1091 | #define IS_I9XX(dev) (INTEL_INFO(dev)->is_i9xx) |
1092 | #define IS_GEN6(dev) (INTEL_INFO(dev)->is_gen6) | ||
1087 | #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) | 1093 | #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) |
1088 | 1094 | ||
1089 | #define IS_GEN3(dev) (IS_I915G(dev) || \ | 1095 | #define IS_GEN3(dev) (IS_I915G(dev) || \ |
@@ -1107,8 +1113,6 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); | |||
1107 | 1113 | ||
1108 | #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) | 1114 | #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) |
1109 | 1115 | ||
1110 | #define IS_GEN6(dev) ((dev)->pci_device == 0x0102) | ||
1111 | |||
1112 | /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte | 1116 | /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte |
1113 | * rows, which changed the alignment requirements and fence programming. | 1117 | * rows, which changed the alignment requirements and fence programming. |
1114 | */ | 1118 | */ |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index fba37e9f775d..80871c62a571 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include "i915_drv.h" | 31 | #include "i915_drv.h" |
32 | #include "i915_trace.h" | 32 | #include "i915_trace.h" |
33 | #include "intel_drv.h" | 33 | #include "intel_drv.h" |
34 | #include <linux/slab.h> | ||
34 | #include <linux/swap.h> | 35 | #include <linux/swap.h> |
35 | #include <linux/pci.h> | 36 | #include <linux/pci.h> |
36 | 37 | ||
@@ -162,7 +163,7 @@ fast_shmem_read(struct page **pages, | |||
162 | static int i915_gem_object_needs_bit17_swizzle(struct drm_gem_object *obj) | 163 | static int i915_gem_object_needs_bit17_swizzle(struct drm_gem_object *obj) |
163 | { | 164 | { |
164 | drm_i915_private_t *dev_priv = obj->dev->dev_private; | 165 | drm_i915_private_t *dev_priv = obj->dev->dev_private; |
165 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 166 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
166 | 167 | ||
167 | return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 && | 168 | return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 && |
168 | obj_priv->tiling_mode != I915_TILING_NONE; | 169 | obj_priv->tiling_mode != I915_TILING_NONE; |
@@ -263,7 +264,7 @@ i915_gem_shmem_pread_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
263 | struct drm_i915_gem_pread *args, | 264 | struct drm_i915_gem_pread *args, |
264 | struct drm_file *file_priv) | 265 | struct drm_file *file_priv) |
265 | { | 266 | { |
266 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 267 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
267 | ssize_t remain; | 268 | ssize_t remain; |
268 | loff_t offset, page_base; | 269 | loff_t offset, page_base; |
269 | char __user *user_data; | 270 | char __user *user_data; |
@@ -284,7 +285,7 @@ i915_gem_shmem_pread_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
284 | if (ret != 0) | 285 | if (ret != 0) |
285 | goto fail_put_pages; | 286 | goto fail_put_pages; |
286 | 287 | ||
287 | obj_priv = obj->driver_private; | 288 | obj_priv = to_intel_bo(obj); |
288 | offset = args->offset; | 289 | offset = args->offset; |
289 | 290 | ||
290 | while (remain > 0) { | 291 | while (remain > 0) { |
@@ -353,7 +354,7 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
353 | struct drm_i915_gem_pread *args, | 354 | struct drm_i915_gem_pread *args, |
354 | struct drm_file *file_priv) | 355 | struct drm_file *file_priv) |
355 | { | 356 | { |
356 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 357 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
357 | struct mm_struct *mm = current->mm; | 358 | struct mm_struct *mm = current->mm; |
358 | struct page **user_pages; | 359 | struct page **user_pages; |
359 | ssize_t remain; | 360 | ssize_t remain; |
@@ -402,7 +403,7 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
402 | if (ret != 0) | 403 | if (ret != 0) |
403 | goto fail_put_pages; | 404 | goto fail_put_pages; |
404 | 405 | ||
405 | obj_priv = obj->driver_private; | 406 | obj_priv = to_intel_bo(obj); |
406 | offset = args->offset; | 407 | offset = args->offset; |
407 | 408 | ||
408 | while (remain > 0) { | 409 | while (remain > 0) { |
@@ -478,7 +479,7 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data, | |||
478 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 479 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
479 | if (obj == NULL) | 480 | if (obj == NULL) |
480 | return -EBADF; | 481 | return -EBADF; |
481 | obj_priv = obj->driver_private; | 482 | obj_priv = to_intel_bo(obj); |
482 | 483 | ||
483 | /* Bounds check source. | 484 | /* Bounds check source. |
484 | * | 485 | * |
@@ -580,7 +581,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
580 | struct drm_i915_gem_pwrite *args, | 581 | struct drm_i915_gem_pwrite *args, |
581 | struct drm_file *file_priv) | 582 | struct drm_file *file_priv) |
582 | { | 583 | { |
583 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 584 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
584 | drm_i915_private_t *dev_priv = dev->dev_private; | 585 | drm_i915_private_t *dev_priv = dev->dev_private; |
585 | ssize_t remain; | 586 | ssize_t remain; |
586 | loff_t offset, page_base; | 587 | loff_t offset, page_base; |
@@ -604,7 +605,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
604 | if (ret) | 605 | if (ret) |
605 | goto fail; | 606 | goto fail; |
606 | 607 | ||
607 | obj_priv = obj->driver_private; | 608 | obj_priv = to_intel_bo(obj); |
608 | offset = obj_priv->gtt_offset + args->offset; | 609 | offset = obj_priv->gtt_offset + args->offset; |
609 | 610 | ||
610 | while (remain > 0) { | 611 | while (remain > 0) { |
@@ -654,7 +655,7 @@ i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
654 | struct drm_i915_gem_pwrite *args, | 655 | struct drm_i915_gem_pwrite *args, |
655 | struct drm_file *file_priv) | 656 | struct drm_file *file_priv) |
656 | { | 657 | { |
657 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 658 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
658 | drm_i915_private_t *dev_priv = dev->dev_private; | 659 | drm_i915_private_t *dev_priv = dev->dev_private; |
659 | ssize_t remain; | 660 | ssize_t remain; |
660 | loff_t gtt_page_base, offset; | 661 | loff_t gtt_page_base, offset; |
@@ -698,7 +699,7 @@ i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
698 | if (ret) | 699 | if (ret) |
699 | goto out_unpin_object; | 700 | goto out_unpin_object; |
700 | 701 | ||
701 | obj_priv = obj->driver_private; | 702 | obj_priv = to_intel_bo(obj); |
702 | offset = obj_priv->gtt_offset + args->offset; | 703 | offset = obj_priv->gtt_offset + args->offset; |
703 | 704 | ||
704 | while (remain > 0) { | 705 | while (remain > 0) { |
@@ -760,7 +761,7 @@ i915_gem_shmem_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
760 | struct drm_i915_gem_pwrite *args, | 761 | struct drm_i915_gem_pwrite *args, |
761 | struct drm_file *file_priv) | 762 | struct drm_file *file_priv) |
762 | { | 763 | { |
763 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 764 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
764 | ssize_t remain; | 765 | ssize_t remain; |
765 | loff_t offset, page_base; | 766 | loff_t offset, page_base; |
766 | char __user *user_data; | 767 | char __user *user_data; |
@@ -780,7 +781,7 @@ i915_gem_shmem_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
780 | if (ret != 0) | 781 | if (ret != 0) |
781 | goto fail_put_pages; | 782 | goto fail_put_pages; |
782 | 783 | ||
783 | obj_priv = obj->driver_private; | 784 | obj_priv = to_intel_bo(obj); |
784 | offset = args->offset; | 785 | offset = args->offset; |
785 | obj_priv->dirty = 1; | 786 | obj_priv->dirty = 1; |
786 | 787 | ||
@@ -828,7 +829,7 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
828 | struct drm_i915_gem_pwrite *args, | 829 | struct drm_i915_gem_pwrite *args, |
829 | struct drm_file *file_priv) | 830 | struct drm_file *file_priv) |
830 | { | 831 | { |
831 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 832 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
832 | struct mm_struct *mm = current->mm; | 833 | struct mm_struct *mm = current->mm; |
833 | struct page **user_pages; | 834 | struct page **user_pages; |
834 | ssize_t remain; | 835 | ssize_t remain; |
@@ -876,7 +877,7 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
876 | if (ret != 0) | 877 | if (ret != 0) |
877 | goto fail_put_pages; | 878 | goto fail_put_pages; |
878 | 879 | ||
879 | obj_priv = obj->driver_private; | 880 | obj_priv = to_intel_bo(obj); |
880 | offset = args->offset; | 881 | offset = args->offset; |
881 | obj_priv->dirty = 1; | 882 | obj_priv->dirty = 1; |
882 | 883 | ||
@@ -951,7 +952,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, | |||
951 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 952 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
952 | if (obj == NULL) | 953 | if (obj == NULL) |
953 | return -EBADF; | 954 | return -EBADF; |
954 | obj_priv = obj->driver_private; | 955 | obj_priv = to_intel_bo(obj); |
955 | 956 | ||
956 | /* Bounds check destination. | 957 | /* Bounds check destination. |
957 | * | 958 | * |
@@ -1033,7 +1034,7 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data, | |||
1033 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 1034 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
1034 | if (obj == NULL) | 1035 | if (obj == NULL) |
1035 | return -EBADF; | 1036 | return -EBADF; |
1036 | obj_priv = obj->driver_private; | 1037 | obj_priv = to_intel_bo(obj); |
1037 | 1038 | ||
1038 | mutex_lock(&dev->struct_mutex); | 1039 | mutex_lock(&dev->struct_mutex); |
1039 | 1040 | ||
@@ -1095,7 +1096,7 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data, | |||
1095 | DRM_INFO("%s: sw_finish %d (%p %zd)\n", | 1096 | DRM_INFO("%s: sw_finish %d (%p %zd)\n", |
1096 | __func__, args->handle, obj, obj->size); | 1097 | __func__, args->handle, obj, obj->size); |
1097 | #endif | 1098 | #endif |
1098 | obj_priv = obj->driver_private; | 1099 | obj_priv = to_intel_bo(obj); |
1099 | 1100 | ||
1100 | /* Pinned buffers may be scanout, so flush the cache */ | 1101 | /* Pinned buffers may be scanout, so flush the cache */ |
1101 | if (obj_priv->pin_count) | 1102 | if (obj_priv->pin_count) |
@@ -1166,7 +1167,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |||
1166 | struct drm_gem_object *obj = vma->vm_private_data; | 1167 | struct drm_gem_object *obj = vma->vm_private_data; |
1167 | struct drm_device *dev = obj->dev; | 1168 | struct drm_device *dev = obj->dev; |
1168 | struct drm_i915_private *dev_priv = dev->dev_private; | 1169 | struct drm_i915_private *dev_priv = dev->dev_private; |
1169 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1170 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1170 | pgoff_t page_offset; | 1171 | pgoff_t page_offset; |
1171 | unsigned long pfn; | 1172 | unsigned long pfn; |
1172 | int ret = 0; | 1173 | int ret = 0; |
@@ -1233,7 +1234,7 @@ i915_gem_create_mmap_offset(struct drm_gem_object *obj) | |||
1233 | { | 1234 | { |
1234 | struct drm_device *dev = obj->dev; | 1235 | struct drm_device *dev = obj->dev; |
1235 | struct drm_gem_mm *mm = dev->mm_private; | 1236 | struct drm_gem_mm *mm = dev->mm_private; |
1236 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1237 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1237 | struct drm_map_list *list; | 1238 | struct drm_map_list *list; |
1238 | struct drm_local_map *map; | 1239 | struct drm_local_map *map; |
1239 | int ret = 0; | 1240 | int ret = 0; |
@@ -1304,7 +1305,7 @@ void | |||
1304 | i915_gem_release_mmap(struct drm_gem_object *obj) | 1305 | i915_gem_release_mmap(struct drm_gem_object *obj) |
1305 | { | 1306 | { |
1306 | struct drm_device *dev = obj->dev; | 1307 | struct drm_device *dev = obj->dev; |
1307 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1308 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1308 | 1309 | ||
1309 | if (dev->dev_mapping) | 1310 | if (dev->dev_mapping) |
1310 | unmap_mapping_range(dev->dev_mapping, | 1311 | unmap_mapping_range(dev->dev_mapping, |
@@ -1315,7 +1316,7 @@ static void | |||
1315 | i915_gem_free_mmap_offset(struct drm_gem_object *obj) | 1316 | i915_gem_free_mmap_offset(struct drm_gem_object *obj) |
1316 | { | 1317 | { |
1317 | struct drm_device *dev = obj->dev; | 1318 | struct drm_device *dev = obj->dev; |
1318 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1319 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1319 | struct drm_gem_mm *mm = dev->mm_private; | 1320 | struct drm_gem_mm *mm = dev->mm_private; |
1320 | struct drm_map_list *list; | 1321 | struct drm_map_list *list; |
1321 | 1322 | ||
@@ -1346,7 +1347,7 @@ static uint32_t | |||
1346 | i915_gem_get_gtt_alignment(struct drm_gem_object *obj) | 1347 | i915_gem_get_gtt_alignment(struct drm_gem_object *obj) |
1347 | { | 1348 | { |
1348 | struct drm_device *dev = obj->dev; | 1349 | struct drm_device *dev = obj->dev; |
1349 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1350 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1350 | int start, i; | 1351 | int start, i; |
1351 | 1352 | ||
1352 | /* | 1353 | /* |
@@ -1405,7 +1406,7 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data, | |||
1405 | 1406 | ||
1406 | mutex_lock(&dev->struct_mutex); | 1407 | mutex_lock(&dev->struct_mutex); |
1407 | 1408 | ||
1408 | obj_priv = obj->driver_private; | 1409 | obj_priv = to_intel_bo(obj); |
1409 | 1410 | ||
1410 | if (obj_priv->madv != I915_MADV_WILLNEED) { | 1411 | if (obj_priv->madv != I915_MADV_WILLNEED) { |
1411 | DRM_ERROR("Attempting to mmap a purgeable buffer\n"); | 1412 | DRM_ERROR("Attempting to mmap a purgeable buffer\n"); |
@@ -1449,7 +1450,7 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data, | |||
1449 | void | 1450 | void |
1450 | i915_gem_object_put_pages(struct drm_gem_object *obj) | 1451 | i915_gem_object_put_pages(struct drm_gem_object *obj) |
1451 | { | 1452 | { |
1452 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1453 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1453 | int page_count = obj->size / PAGE_SIZE; | 1454 | int page_count = obj->size / PAGE_SIZE; |
1454 | int i; | 1455 | int i; |
1455 | 1456 | ||
@@ -1466,9 +1467,6 @@ i915_gem_object_put_pages(struct drm_gem_object *obj) | |||
1466 | obj_priv->dirty = 0; | 1467 | obj_priv->dirty = 0; |
1467 | 1468 | ||
1468 | for (i = 0; i < page_count; i++) { | 1469 | for (i = 0; i < page_count; i++) { |
1469 | if (obj_priv->pages[i] == NULL) | ||
1470 | break; | ||
1471 | |||
1472 | if (obj_priv->dirty) | 1470 | if (obj_priv->dirty) |
1473 | set_page_dirty(obj_priv->pages[i]); | 1471 | set_page_dirty(obj_priv->pages[i]); |
1474 | 1472 | ||
@@ -1488,7 +1486,7 @@ i915_gem_object_move_to_active(struct drm_gem_object *obj, uint32_t seqno) | |||
1488 | { | 1486 | { |
1489 | struct drm_device *dev = obj->dev; | 1487 | struct drm_device *dev = obj->dev; |
1490 | drm_i915_private_t *dev_priv = dev->dev_private; | 1488 | drm_i915_private_t *dev_priv = dev->dev_private; |
1491 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1489 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1492 | 1490 | ||
1493 | /* Add a reference if we're newly entering the active list. */ | 1491 | /* Add a reference if we're newly entering the active list. */ |
1494 | if (!obj_priv->active) { | 1492 | if (!obj_priv->active) { |
@@ -1508,7 +1506,7 @@ i915_gem_object_move_to_flushing(struct drm_gem_object *obj) | |||
1508 | { | 1506 | { |
1509 | struct drm_device *dev = obj->dev; | 1507 | struct drm_device *dev = obj->dev; |
1510 | drm_i915_private_t *dev_priv = dev->dev_private; | 1508 | drm_i915_private_t *dev_priv = dev->dev_private; |
1511 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1509 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1512 | 1510 | ||
1513 | BUG_ON(!obj_priv->active); | 1511 | BUG_ON(!obj_priv->active); |
1514 | list_move_tail(&obj_priv->list, &dev_priv->mm.flushing_list); | 1512 | list_move_tail(&obj_priv->list, &dev_priv->mm.flushing_list); |
@@ -1519,7 +1517,7 @@ i915_gem_object_move_to_flushing(struct drm_gem_object *obj) | |||
1519 | static void | 1517 | static void |
1520 | i915_gem_object_truncate(struct drm_gem_object *obj) | 1518 | i915_gem_object_truncate(struct drm_gem_object *obj) |
1521 | { | 1519 | { |
1522 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1520 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1523 | struct inode *inode; | 1521 | struct inode *inode; |
1524 | 1522 | ||
1525 | inode = obj->filp->f_path.dentry->d_inode; | 1523 | inode = obj->filp->f_path.dentry->d_inode; |
@@ -1540,7 +1538,7 @@ i915_gem_object_move_to_inactive(struct drm_gem_object *obj) | |||
1540 | { | 1538 | { |
1541 | struct drm_device *dev = obj->dev; | 1539 | struct drm_device *dev = obj->dev; |
1542 | drm_i915_private_t *dev_priv = dev->dev_private; | 1540 | drm_i915_private_t *dev_priv = dev->dev_private; |
1543 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1541 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1544 | 1542 | ||
1545 | i915_verify_inactive(dev, __FILE__, __LINE__); | 1543 | i915_verify_inactive(dev, __FILE__, __LINE__); |
1546 | if (obj_priv->pin_count != 0) | 1544 | if (obj_priv->pin_count != 0) |
@@ -1967,7 +1965,7 @@ static int | |||
1967 | i915_gem_object_wait_rendering(struct drm_gem_object *obj) | 1965 | i915_gem_object_wait_rendering(struct drm_gem_object *obj) |
1968 | { | 1966 | { |
1969 | struct drm_device *dev = obj->dev; | 1967 | struct drm_device *dev = obj->dev; |
1970 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1968 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1971 | int ret; | 1969 | int ret; |
1972 | 1970 | ||
1973 | /* This function only exists to support waiting for existing rendering, | 1971 | /* This function only exists to support waiting for existing rendering, |
@@ -1999,7 +1997,7 @@ i915_gem_object_unbind(struct drm_gem_object *obj) | |||
1999 | { | 1997 | { |
2000 | struct drm_device *dev = obj->dev; | 1998 | struct drm_device *dev = obj->dev; |
2001 | drm_i915_private_t *dev_priv = dev->dev_private; | 1999 | drm_i915_private_t *dev_priv = dev->dev_private; |
2002 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2000 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2003 | int ret = 0; | 2001 | int ret = 0; |
2004 | 2002 | ||
2005 | #if WATCH_BUF | 2003 | #if WATCH_BUF |
@@ -2175,7 +2173,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size) | |||
2175 | #if WATCH_LRU | 2173 | #if WATCH_LRU |
2176 | DRM_INFO("%s: evicting %p\n", __func__, obj); | 2174 | DRM_INFO("%s: evicting %p\n", __func__, obj); |
2177 | #endif | 2175 | #endif |
2178 | obj_priv = obj->driver_private; | 2176 | obj_priv = to_intel_bo(obj); |
2179 | BUG_ON(obj_priv->pin_count != 0); | 2177 | BUG_ON(obj_priv->pin_count != 0); |
2180 | BUG_ON(obj_priv->active); | 2178 | BUG_ON(obj_priv->active); |
2181 | 2179 | ||
@@ -2227,11 +2225,6 @@ i915_gem_evict_something(struct drm_device *dev, int min_size) | |||
2227 | seqno = i915_add_request(dev, NULL, obj->write_domain); | 2225 | seqno = i915_add_request(dev, NULL, obj->write_domain); |
2228 | if (seqno == 0) | 2226 | if (seqno == 0) |
2229 | return -ENOMEM; | 2227 | return -ENOMEM; |
2230 | |||
2231 | ret = i915_wait_request(dev, seqno); | ||
2232 | if (ret) | ||
2233 | return ret; | ||
2234 | |||
2235 | continue; | 2228 | continue; |
2236 | } | 2229 | } |
2237 | } | 2230 | } |
@@ -2251,12 +2244,11 @@ int | |||
2251 | i915_gem_object_get_pages(struct drm_gem_object *obj, | 2244 | i915_gem_object_get_pages(struct drm_gem_object *obj, |
2252 | gfp_t gfpmask) | 2245 | gfp_t gfpmask) |
2253 | { | 2246 | { |
2254 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2247 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2255 | int page_count, i; | 2248 | int page_count, i; |
2256 | struct address_space *mapping; | 2249 | struct address_space *mapping; |
2257 | struct inode *inode; | 2250 | struct inode *inode; |
2258 | struct page *page; | 2251 | struct page *page; |
2259 | int ret; | ||
2260 | 2252 | ||
2261 | if (obj_priv->pages_refcount++ != 0) | 2253 | if (obj_priv->pages_refcount++ != 0) |
2262 | return 0; | 2254 | return 0; |
@@ -2279,11 +2271,9 @@ i915_gem_object_get_pages(struct drm_gem_object *obj, | |||
2279 | mapping_gfp_mask (mapping) | | 2271 | mapping_gfp_mask (mapping) | |
2280 | __GFP_COLD | | 2272 | __GFP_COLD | |
2281 | gfpmask); | 2273 | gfpmask); |
2282 | if (IS_ERR(page)) { | 2274 | if (IS_ERR(page)) |
2283 | ret = PTR_ERR(page); | 2275 | goto err_pages; |
2284 | i915_gem_object_put_pages(obj); | 2276 | |
2285 | return ret; | ||
2286 | } | ||
2287 | obj_priv->pages[i] = page; | 2277 | obj_priv->pages[i] = page; |
2288 | } | 2278 | } |
2289 | 2279 | ||
@@ -2291,6 +2281,15 @@ i915_gem_object_get_pages(struct drm_gem_object *obj, | |||
2291 | i915_gem_object_do_bit_17_swizzle(obj); | 2281 | i915_gem_object_do_bit_17_swizzle(obj); |
2292 | 2282 | ||
2293 | return 0; | 2283 | return 0; |
2284 | |||
2285 | err_pages: | ||
2286 | while (i--) | ||
2287 | page_cache_release(obj_priv->pages[i]); | ||
2288 | |||
2289 | drm_free_large(obj_priv->pages); | ||
2290 | obj_priv->pages = NULL; | ||
2291 | obj_priv->pages_refcount--; | ||
2292 | return PTR_ERR(page); | ||
2294 | } | 2293 | } |
2295 | 2294 | ||
2296 | static void sandybridge_write_fence_reg(struct drm_i915_fence_reg *reg) | 2295 | static void sandybridge_write_fence_reg(struct drm_i915_fence_reg *reg) |
@@ -2298,7 +2297,7 @@ static void sandybridge_write_fence_reg(struct drm_i915_fence_reg *reg) | |||
2298 | struct drm_gem_object *obj = reg->obj; | 2297 | struct drm_gem_object *obj = reg->obj; |
2299 | struct drm_device *dev = obj->dev; | 2298 | struct drm_device *dev = obj->dev; |
2300 | drm_i915_private_t *dev_priv = dev->dev_private; | 2299 | drm_i915_private_t *dev_priv = dev->dev_private; |
2301 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2300 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2302 | int regnum = obj_priv->fence_reg; | 2301 | int regnum = obj_priv->fence_reg; |
2303 | uint64_t val; | 2302 | uint64_t val; |
2304 | 2303 | ||
@@ -2320,7 +2319,7 @@ static void i965_write_fence_reg(struct drm_i915_fence_reg *reg) | |||
2320 | struct drm_gem_object *obj = reg->obj; | 2319 | struct drm_gem_object *obj = reg->obj; |
2321 | struct drm_device *dev = obj->dev; | 2320 | struct drm_device *dev = obj->dev; |
2322 | drm_i915_private_t *dev_priv = dev->dev_private; | 2321 | drm_i915_private_t *dev_priv = dev->dev_private; |
2323 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2322 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2324 | int regnum = obj_priv->fence_reg; | 2323 | int regnum = obj_priv->fence_reg; |
2325 | uint64_t val; | 2324 | uint64_t val; |
2326 | 2325 | ||
@@ -2340,7 +2339,7 @@ static void i915_write_fence_reg(struct drm_i915_fence_reg *reg) | |||
2340 | struct drm_gem_object *obj = reg->obj; | 2339 | struct drm_gem_object *obj = reg->obj; |
2341 | struct drm_device *dev = obj->dev; | 2340 | struct drm_device *dev = obj->dev; |
2342 | drm_i915_private_t *dev_priv = dev->dev_private; | 2341 | drm_i915_private_t *dev_priv = dev->dev_private; |
2343 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2342 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2344 | int regnum = obj_priv->fence_reg; | 2343 | int regnum = obj_priv->fence_reg; |
2345 | int tile_width; | 2344 | int tile_width; |
2346 | uint32_t fence_reg, val; | 2345 | uint32_t fence_reg, val; |
@@ -2382,7 +2381,7 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg) | |||
2382 | struct drm_gem_object *obj = reg->obj; | 2381 | struct drm_gem_object *obj = reg->obj; |
2383 | struct drm_device *dev = obj->dev; | 2382 | struct drm_device *dev = obj->dev; |
2384 | drm_i915_private_t *dev_priv = dev->dev_private; | 2383 | drm_i915_private_t *dev_priv = dev->dev_private; |
2385 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2384 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2386 | int regnum = obj_priv->fence_reg; | 2385 | int regnum = obj_priv->fence_reg; |
2387 | uint32_t val; | 2386 | uint32_t val; |
2388 | uint32_t pitch_val; | 2387 | uint32_t pitch_val; |
@@ -2426,7 +2425,7 @@ static int i915_find_fence_reg(struct drm_device *dev) | |||
2426 | if (!reg->obj) | 2425 | if (!reg->obj) |
2427 | return i; | 2426 | return i; |
2428 | 2427 | ||
2429 | obj_priv = reg->obj->driver_private; | 2428 | obj_priv = to_intel_bo(reg->obj); |
2430 | if (!obj_priv->pin_count) | 2429 | if (!obj_priv->pin_count) |
2431 | avail++; | 2430 | avail++; |
2432 | } | 2431 | } |
@@ -2481,7 +2480,7 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj) | |||
2481 | { | 2480 | { |
2482 | struct drm_device *dev = obj->dev; | 2481 | struct drm_device *dev = obj->dev; |
2483 | struct drm_i915_private *dev_priv = dev->dev_private; | 2482 | struct drm_i915_private *dev_priv = dev->dev_private; |
2484 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2483 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2485 | struct drm_i915_fence_reg *reg = NULL; | 2484 | struct drm_i915_fence_reg *reg = NULL; |
2486 | int ret; | 2485 | int ret; |
2487 | 2486 | ||
@@ -2548,7 +2547,7 @@ i915_gem_clear_fence_reg(struct drm_gem_object *obj) | |||
2548 | { | 2547 | { |
2549 | struct drm_device *dev = obj->dev; | 2548 | struct drm_device *dev = obj->dev; |
2550 | drm_i915_private_t *dev_priv = dev->dev_private; | 2549 | drm_i915_private_t *dev_priv = dev->dev_private; |
2551 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2550 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2552 | 2551 | ||
2553 | if (IS_GEN6(dev)) { | 2552 | if (IS_GEN6(dev)) { |
2554 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + | 2553 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + |
@@ -2584,7 +2583,7 @@ int | |||
2584 | i915_gem_object_put_fence_reg(struct drm_gem_object *obj) | 2583 | i915_gem_object_put_fence_reg(struct drm_gem_object *obj) |
2585 | { | 2584 | { |
2586 | struct drm_device *dev = obj->dev; | 2585 | struct drm_device *dev = obj->dev; |
2587 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2586 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2588 | 2587 | ||
2589 | if (obj_priv->fence_reg == I915_FENCE_REG_NONE) | 2588 | if (obj_priv->fence_reg == I915_FENCE_REG_NONE) |
2590 | return 0; | 2589 | return 0; |
@@ -2622,7 +2621,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment) | |||
2622 | { | 2621 | { |
2623 | struct drm_device *dev = obj->dev; | 2622 | struct drm_device *dev = obj->dev; |
2624 | drm_i915_private_t *dev_priv = dev->dev_private; | 2623 | drm_i915_private_t *dev_priv = dev->dev_private; |
2625 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2624 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2626 | struct drm_mm_node *free_space; | 2625 | struct drm_mm_node *free_space; |
2627 | gfp_t gfpmask = __GFP_NORETRY | __GFP_NOWARN; | 2626 | gfp_t gfpmask = __GFP_NORETRY | __GFP_NOWARN; |
2628 | int ret; | 2627 | int ret; |
@@ -2729,7 +2728,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment) | |||
2729 | void | 2728 | void |
2730 | i915_gem_clflush_object(struct drm_gem_object *obj) | 2729 | i915_gem_clflush_object(struct drm_gem_object *obj) |
2731 | { | 2730 | { |
2732 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2731 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2733 | 2732 | ||
2734 | /* If we don't have a page list set up, then we're not pinned | 2733 | /* If we don't have a page list set up, then we're not pinned |
2735 | * to GPU, and we can ignore the cache flush because it'll happen | 2734 | * to GPU, and we can ignore the cache flush because it'll happen |
@@ -2830,7 +2829,7 @@ i915_gem_object_flush_write_domain(struct drm_gem_object *obj) | |||
2830 | int | 2829 | int |
2831 | i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write) | 2830 | i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write) |
2832 | { | 2831 | { |
2833 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2832 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2834 | uint32_t old_write_domain, old_read_domains; | 2833 | uint32_t old_write_domain, old_read_domains; |
2835 | int ret; | 2834 | int ret; |
2836 | 2835 | ||
@@ -2880,7 +2879,7 @@ int | |||
2880 | i915_gem_object_set_to_display_plane(struct drm_gem_object *obj) | 2879 | i915_gem_object_set_to_display_plane(struct drm_gem_object *obj) |
2881 | { | 2880 | { |
2882 | struct drm_device *dev = obj->dev; | 2881 | struct drm_device *dev = obj->dev; |
2883 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2882 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2884 | uint32_t old_write_domain, old_read_domains; | 2883 | uint32_t old_write_domain, old_read_domains; |
2885 | int ret; | 2884 | int ret; |
2886 | 2885 | ||
@@ -3093,7 +3092,7 @@ static void | |||
3093 | i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj) | 3092 | i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj) |
3094 | { | 3093 | { |
3095 | struct drm_device *dev = obj->dev; | 3094 | struct drm_device *dev = obj->dev; |
3096 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3095 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3097 | uint32_t invalidate_domains = 0; | 3096 | uint32_t invalidate_domains = 0; |
3098 | uint32_t flush_domains = 0; | 3097 | uint32_t flush_domains = 0; |
3099 | uint32_t old_read_domains; | 3098 | uint32_t old_read_domains; |
@@ -3178,7 +3177,7 @@ i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj) | |||
3178 | static void | 3177 | static void |
3179 | i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj) | 3178 | i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj) |
3180 | { | 3179 | { |
3181 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3180 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3182 | 3181 | ||
3183 | if (!obj_priv->page_cpu_valid) | 3182 | if (!obj_priv->page_cpu_valid) |
3184 | return; | 3183 | return; |
@@ -3218,7 +3217,7 @@ static int | |||
3218 | i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj, | 3217 | i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj, |
3219 | uint64_t offset, uint64_t size) | 3218 | uint64_t offset, uint64_t size) |
3220 | { | 3219 | { |
3221 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3220 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3222 | uint32_t old_read_domains; | 3221 | uint32_t old_read_domains; |
3223 | int i, ret; | 3222 | int i, ret; |
3224 | 3223 | ||
@@ -3287,7 +3286,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
3287 | { | 3286 | { |
3288 | struct drm_device *dev = obj->dev; | 3287 | struct drm_device *dev = obj->dev; |
3289 | drm_i915_private_t *dev_priv = dev->dev_private; | 3288 | drm_i915_private_t *dev_priv = dev->dev_private; |
3290 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3289 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3291 | int i, ret; | 3290 | int i, ret; |
3292 | void __iomem *reloc_page; | 3291 | void __iomem *reloc_page; |
3293 | bool need_fence; | 3292 | bool need_fence; |
@@ -3338,7 +3337,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
3338 | i915_gem_object_unpin(obj); | 3337 | i915_gem_object_unpin(obj); |
3339 | return -EBADF; | 3338 | return -EBADF; |
3340 | } | 3339 | } |
3341 | target_obj_priv = target_obj->driver_private; | 3340 | target_obj_priv = to_intel_bo(target_obj); |
3342 | 3341 | ||
3343 | #if WATCH_RELOC | 3342 | #if WATCH_RELOC |
3344 | DRM_INFO("%s: obj %p offset %08x target %d " | 3343 | DRM_INFO("%s: obj %p offset %08x target %d " |
@@ -3690,7 +3689,7 @@ i915_gem_wait_for_pending_flip(struct drm_device *dev, | |||
3690 | prepare_to_wait(&dev_priv->pending_flip_queue, | 3689 | prepare_to_wait(&dev_priv->pending_flip_queue, |
3691 | &wait, TASK_INTERRUPTIBLE); | 3690 | &wait, TASK_INTERRUPTIBLE); |
3692 | for (i = 0; i < count; i++) { | 3691 | for (i = 0; i < count; i++) { |
3693 | obj_priv = object_list[i]->driver_private; | 3692 | obj_priv = to_intel_bo(object_list[i]); |
3694 | if (atomic_read(&obj_priv->pending_flip) > 0) | 3693 | if (atomic_read(&obj_priv->pending_flip) > 0) |
3695 | break; | 3694 | break; |
3696 | } | 3695 | } |
@@ -3799,7 +3798,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, | |||
3799 | goto err; | 3798 | goto err; |
3800 | } | 3799 | } |
3801 | 3800 | ||
3802 | obj_priv = object_list[i]->driver_private; | 3801 | obj_priv = to_intel_bo(object_list[i]); |
3803 | if (obj_priv->in_execbuffer) { | 3802 | if (obj_priv->in_execbuffer) { |
3804 | DRM_ERROR("Object %p appears more than once in object list\n", | 3803 | DRM_ERROR("Object %p appears more than once in object list\n", |
3805 | object_list[i]); | 3804 | object_list[i]); |
@@ -3925,7 +3924,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, | |||
3925 | 3924 | ||
3926 | for (i = 0; i < args->buffer_count; i++) { | 3925 | for (i = 0; i < args->buffer_count; i++) { |
3927 | struct drm_gem_object *obj = object_list[i]; | 3926 | struct drm_gem_object *obj = object_list[i]; |
3928 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3927 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3929 | uint32_t old_write_domain = obj->write_domain; | 3928 | uint32_t old_write_domain = obj->write_domain; |
3930 | 3929 | ||
3931 | obj->write_domain = obj->pending_write_domain; | 3930 | obj->write_domain = obj->pending_write_domain; |
@@ -4000,7 +3999,7 @@ err: | |||
4000 | 3999 | ||
4001 | for (i = 0; i < args->buffer_count; i++) { | 4000 | for (i = 0; i < args->buffer_count; i++) { |
4002 | if (object_list[i]) { | 4001 | if (object_list[i]) { |
4003 | obj_priv = object_list[i]->driver_private; | 4002 | obj_priv = to_intel_bo(object_list[i]); |
4004 | obj_priv->in_execbuffer = false; | 4003 | obj_priv->in_execbuffer = false; |
4005 | } | 4004 | } |
4006 | drm_gem_object_unreference(object_list[i]); | 4005 | drm_gem_object_unreference(object_list[i]); |
@@ -4178,7 +4177,7 @@ int | |||
4178 | i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment) | 4177 | i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment) |
4179 | { | 4178 | { |
4180 | struct drm_device *dev = obj->dev; | 4179 | struct drm_device *dev = obj->dev; |
4181 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 4180 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
4182 | int ret; | 4181 | int ret; |
4183 | 4182 | ||
4184 | i915_verify_inactive(dev, __FILE__, __LINE__); | 4183 | i915_verify_inactive(dev, __FILE__, __LINE__); |
@@ -4211,7 +4210,7 @@ i915_gem_object_unpin(struct drm_gem_object *obj) | |||
4211 | { | 4210 | { |
4212 | struct drm_device *dev = obj->dev; | 4211 | struct drm_device *dev = obj->dev; |
4213 | drm_i915_private_t *dev_priv = dev->dev_private; | 4212 | drm_i915_private_t *dev_priv = dev->dev_private; |
4214 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 4213 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
4215 | 4214 | ||
4216 | i915_verify_inactive(dev, __FILE__, __LINE__); | 4215 | i915_verify_inactive(dev, __FILE__, __LINE__); |
4217 | obj_priv->pin_count--; | 4216 | obj_priv->pin_count--; |
@@ -4251,7 +4250,7 @@ i915_gem_pin_ioctl(struct drm_device *dev, void *data, | |||
4251 | mutex_unlock(&dev->struct_mutex); | 4250 | mutex_unlock(&dev->struct_mutex); |
4252 | return -EBADF; | 4251 | return -EBADF; |
4253 | } | 4252 | } |
4254 | obj_priv = obj->driver_private; | 4253 | obj_priv = to_intel_bo(obj); |
4255 | 4254 | ||
4256 | if (obj_priv->madv != I915_MADV_WILLNEED) { | 4255 | if (obj_priv->madv != I915_MADV_WILLNEED) { |
4257 | DRM_ERROR("Attempting to pin a purgeable buffer\n"); | 4256 | DRM_ERROR("Attempting to pin a purgeable buffer\n"); |
@@ -4308,7 +4307,7 @@ i915_gem_unpin_ioctl(struct drm_device *dev, void *data, | |||
4308 | return -EBADF; | 4307 | return -EBADF; |
4309 | } | 4308 | } |
4310 | 4309 | ||
4311 | obj_priv = obj->driver_private; | 4310 | obj_priv = to_intel_bo(obj); |
4312 | if (obj_priv->pin_filp != file_priv) { | 4311 | if (obj_priv->pin_filp != file_priv) { |
4313 | DRM_ERROR("Not pinned by caller in i915_gem_pin_ioctl(): %d\n", | 4312 | DRM_ERROR("Not pinned by caller in i915_gem_pin_ioctl(): %d\n", |
4314 | args->handle); | 4313 | args->handle); |
@@ -4350,7 +4349,7 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data, | |||
4350 | */ | 4349 | */ |
4351 | i915_gem_retire_requests(dev); | 4350 | i915_gem_retire_requests(dev); |
4352 | 4351 | ||
4353 | obj_priv = obj->driver_private; | 4352 | obj_priv = to_intel_bo(obj); |
4354 | /* Don't count being on the flushing list against the object being | 4353 | /* Don't count being on the flushing list against the object being |
4355 | * done. Otherwise, a buffer left on the flushing list but not getting | 4354 | * done. Otherwise, a buffer left on the flushing list but not getting |
4356 | * flushed (because nobody's flushing that domain) won't ever return | 4355 | * flushed (because nobody's flushing that domain) won't ever return |
@@ -4396,7 +4395,7 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data, | |||
4396 | } | 4395 | } |
4397 | 4396 | ||
4398 | mutex_lock(&dev->struct_mutex); | 4397 | mutex_lock(&dev->struct_mutex); |
4399 | obj_priv = obj->driver_private; | 4398 | obj_priv = to_intel_bo(obj); |
4400 | 4399 | ||
4401 | if (obj_priv->pin_count) { | 4400 | if (obj_priv->pin_count) { |
4402 | drm_gem_object_unreference(obj); | 4401 | drm_gem_object_unreference(obj); |
@@ -4457,7 +4456,7 @@ int i915_gem_init_object(struct drm_gem_object *obj) | |||
4457 | void i915_gem_free_object(struct drm_gem_object *obj) | 4456 | void i915_gem_free_object(struct drm_gem_object *obj) |
4458 | { | 4457 | { |
4459 | struct drm_device *dev = obj->dev; | 4458 | struct drm_device *dev = obj->dev; |
4460 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 4459 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
4461 | 4460 | ||
4462 | trace_i915_gem_object_destroy(obj); | 4461 | trace_i915_gem_object_destroy(obj); |
4463 | 4462 | ||
@@ -4566,7 +4565,7 @@ i915_gem_init_hws(struct drm_device *dev) | |||
4566 | DRM_ERROR("Failed to allocate status page\n"); | 4565 | DRM_ERROR("Failed to allocate status page\n"); |
4567 | return -ENOMEM; | 4566 | return -ENOMEM; |
4568 | } | 4567 | } |
4569 | obj_priv = obj->driver_private; | 4568 | obj_priv = to_intel_bo(obj); |
4570 | obj_priv->agp_type = AGP_USER_CACHED_MEMORY; | 4569 | obj_priv->agp_type = AGP_USER_CACHED_MEMORY; |
4571 | 4570 | ||
4572 | ret = i915_gem_object_pin(obj, 4096); | 4571 | ret = i915_gem_object_pin(obj, 4096); |
@@ -4610,7 +4609,7 @@ i915_gem_cleanup_hws(struct drm_device *dev) | |||
4610 | return; | 4609 | return; |
4611 | 4610 | ||
4612 | obj = dev_priv->hws_obj; | 4611 | obj = dev_priv->hws_obj; |
4613 | obj_priv = obj->driver_private; | 4612 | obj_priv = to_intel_bo(obj); |
4614 | 4613 | ||
4615 | kunmap(obj_priv->pages[0]); | 4614 | kunmap(obj_priv->pages[0]); |
4616 | i915_gem_object_unpin(obj); | 4615 | i915_gem_object_unpin(obj); |
@@ -4644,7 +4643,7 @@ i915_gem_init_ringbuffer(struct drm_device *dev) | |||
4644 | i915_gem_cleanup_hws(dev); | 4643 | i915_gem_cleanup_hws(dev); |
4645 | return -ENOMEM; | 4644 | return -ENOMEM; |
4646 | } | 4645 | } |
4647 | obj_priv = obj->driver_private; | 4646 | obj_priv = to_intel_bo(obj); |
4648 | 4647 | ||
4649 | ret = i915_gem_object_pin(obj, 4096); | 4648 | ret = i915_gem_object_pin(obj, 4096); |
4650 | if (ret != 0) { | 4649 | if (ret != 0) { |
@@ -4730,6 +4729,11 @@ i915_gem_init_ringbuffer(struct drm_device *dev) | |||
4730 | ring->space += ring->Size; | 4729 | ring->space += ring->Size; |
4731 | } | 4730 | } |
4732 | 4731 | ||
4732 | if (IS_I9XX(dev) && !IS_GEN3(dev)) { | ||
4733 | I915_WRITE(MI_MODE, | ||
4734 | (VS_TIMER_DISPATCH) << 16 | VS_TIMER_DISPATCH); | ||
4735 | } | ||
4736 | |||
4733 | return 0; | 4737 | return 0; |
4734 | } | 4738 | } |
4735 | 4739 | ||
@@ -4932,7 +4936,7 @@ void i915_gem_detach_phys_object(struct drm_device *dev, | |||
4932 | int ret; | 4936 | int ret; |
4933 | int page_count; | 4937 | int page_count; |
4934 | 4938 | ||
4935 | obj_priv = obj->driver_private; | 4939 | obj_priv = to_intel_bo(obj); |
4936 | if (!obj_priv->phys_obj) | 4940 | if (!obj_priv->phys_obj) |
4937 | return; | 4941 | return; |
4938 | 4942 | ||
@@ -4971,7 +4975,7 @@ i915_gem_attach_phys_object(struct drm_device *dev, | |||
4971 | if (id > I915_MAX_PHYS_OBJECT) | 4975 | if (id > I915_MAX_PHYS_OBJECT) |
4972 | return -EINVAL; | 4976 | return -EINVAL; |
4973 | 4977 | ||
4974 | obj_priv = obj->driver_private; | 4978 | obj_priv = to_intel_bo(obj); |
4975 | 4979 | ||
4976 | if (obj_priv->phys_obj) { | 4980 | if (obj_priv->phys_obj) { |
4977 | if (obj_priv->phys_obj->id == id) | 4981 | if (obj_priv->phys_obj->id == id) |
@@ -5022,7 +5026,7 @@ i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj, | |||
5022 | struct drm_i915_gem_pwrite *args, | 5026 | struct drm_i915_gem_pwrite *args, |
5023 | struct drm_file *file_priv) | 5027 | struct drm_file *file_priv) |
5024 | { | 5028 | { |
5025 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 5029 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
5026 | void *obj_addr; | 5030 | void *obj_addr; |
5027 | int ret; | 5031 | int ret; |
5028 | char __user *user_data; | 5032 | char __user *user_data; |
diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c index e602614bd3f8..35507cf53fa3 100644 --- a/drivers/gpu/drm/i915/i915_gem_debug.c +++ b/drivers/gpu/drm/i915/i915_gem_debug.c | |||
@@ -72,7 +72,7 @@ void | |||
72 | i915_gem_dump_object(struct drm_gem_object *obj, int len, | 72 | i915_gem_dump_object(struct drm_gem_object *obj, int len, |
73 | const char *where, uint32_t mark) | 73 | const char *where, uint32_t mark) |
74 | { | 74 | { |
75 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 75 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
76 | int page; | 76 | int page; |
77 | 77 | ||
78 | DRM_INFO("%s: object at offset %08x\n", where, obj_priv->gtt_offset); | 78 | DRM_INFO("%s: object at offset %08x\n", where, obj_priv->gtt_offset); |
@@ -137,7 +137,7 @@ void | |||
137 | i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle) | 137 | i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle) |
138 | { | 138 | { |
139 | struct drm_device *dev = obj->dev; | 139 | struct drm_device *dev = obj->dev; |
140 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 140 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
141 | int page; | 141 | int page; |
142 | uint32_t *gtt_mapping; | 142 | uint32_t *gtt_mapping; |
143 | uint32_t *backing_map = NULL; | 143 | uint32_t *backing_map = NULL; |
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index b5c55d88ff76..449157f71610 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c | |||
@@ -240,7 +240,7 @@ bool | |||
240 | i915_gem_object_fence_offset_ok(struct drm_gem_object *obj, int tiling_mode) | 240 | i915_gem_object_fence_offset_ok(struct drm_gem_object *obj, int tiling_mode) |
241 | { | 241 | { |
242 | struct drm_device *dev = obj->dev; | 242 | struct drm_device *dev = obj->dev; |
243 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 243 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
244 | 244 | ||
245 | if (obj_priv->gtt_space == NULL) | 245 | if (obj_priv->gtt_space == NULL) |
246 | return true; | 246 | return true; |
@@ -280,7 +280,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data, | |||
280 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 280 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
281 | if (obj == NULL) | 281 | if (obj == NULL) |
282 | return -EINVAL; | 282 | return -EINVAL; |
283 | obj_priv = obj->driver_private; | 283 | obj_priv = to_intel_bo(obj); |
284 | 284 | ||
285 | if (!i915_tiling_ok(dev, args->stride, obj->size, args->tiling_mode)) { | 285 | if (!i915_tiling_ok(dev, args->stride, obj->size, args->tiling_mode)) { |
286 | drm_gem_object_unreference_unlocked(obj); | 286 | drm_gem_object_unreference_unlocked(obj); |
@@ -325,9 +325,12 @@ i915_gem_set_tiling(struct drm_device *dev, void *data, | |||
325 | * need to ensure that any fence register is cleared. | 325 | * need to ensure that any fence register is cleared. |
326 | */ | 326 | */ |
327 | if (!i915_gem_object_fence_offset_ok(obj, args->tiling_mode)) | 327 | if (!i915_gem_object_fence_offset_ok(obj, args->tiling_mode)) |
328 | ret = i915_gem_object_unbind(obj); | 328 | ret = i915_gem_object_unbind(obj); |
329 | else if (obj_priv->fence_reg != I915_FENCE_REG_NONE) | ||
330 | ret = i915_gem_object_put_fence_reg(obj); | ||
329 | else | 331 | else |
330 | ret = i915_gem_object_put_fence_reg(obj); | 332 | i915_gem_release_mmap(obj); |
333 | |||
331 | if (ret != 0) { | 334 | if (ret != 0) { |
332 | WARN(ret != -ERESTARTSYS, | 335 | WARN(ret != -ERESTARTSYS, |
333 | "failed to reset object for tiling switch"); | 336 | "failed to reset object for tiling switch"); |
@@ -361,7 +364,7 @@ i915_gem_get_tiling(struct drm_device *dev, void *data, | |||
361 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 364 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
362 | if (obj == NULL) | 365 | if (obj == NULL) |
363 | return -EINVAL; | 366 | return -EINVAL; |
364 | obj_priv = obj->driver_private; | 367 | obj_priv = to_intel_bo(obj); |
365 | 368 | ||
366 | mutex_lock(&dev->struct_mutex); | 369 | mutex_lock(&dev->struct_mutex); |
367 | 370 | ||
@@ -424,7 +427,7 @@ i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj) | |||
424 | { | 427 | { |
425 | struct drm_device *dev = obj->dev; | 428 | struct drm_device *dev = obj->dev; |
426 | drm_i915_private_t *dev_priv = dev->dev_private; | 429 | drm_i915_private_t *dev_priv = dev->dev_private; |
427 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 430 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
428 | int page_count = obj->size >> PAGE_SHIFT; | 431 | int page_count = obj->size >> PAGE_SHIFT; |
429 | int i; | 432 | int i; |
430 | 433 | ||
@@ -453,7 +456,7 @@ i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj) | |||
453 | { | 456 | { |
454 | struct drm_device *dev = obj->dev; | 457 | struct drm_device *dev = obj->dev; |
455 | drm_i915_private_t *dev_priv = dev->dev_private; | 458 | drm_i915_private_t *dev_priv = dev->dev_private; |
456 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 459 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
457 | int page_count = obj->size >> PAGE_SHIFT; | 460 | int page_count = obj->size >> PAGE_SHIFT; |
458 | int i; | 461 | int i; |
459 | 462 | ||
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 5388354da0d1..6421481d6222 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -27,6 +27,7 @@ | |||
27 | */ | 27 | */ |
28 | 28 | ||
29 | #include <linux/sysrq.h> | 29 | #include <linux/sysrq.h> |
30 | #include <linux/slab.h> | ||
30 | #include "drmP.h" | 31 | #include "drmP.h" |
31 | #include "drm.h" | 32 | #include "drm.h" |
32 | #include "i915_drm.h" | 33 | #include "i915_drm.h" |
@@ -259,10 +260,10 @@ static void i915_hotplug_work_func(struct work_struct *work) | |||
259 | 260 | ||
260 | if (mode_config->num_connector) { | 261 | if (mode_config->num_connector) { |
261 | list_for_each_entry(connector, &mode_config->connector_list, head) { | 262 | list_for_each_entry(connector, &mode_config->connector_list, head) { |
262 | struct intel_output *intel_output = to_intel_output(connector); | 263 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
263 | 264 | ||
264 | if (intel_output->hot_plug) | 265 | if (intel_encoder->hot_plug) |
265 | (*intel_output->hot_plug) (intel_output); | 266 | (*intel_encoder->hot_plug) (intel_encoder); |
266 | } | 267 | } |
267 | } | 268 | } |
268 | /* Just fire off a uevent and let userspace tell us what to do */ | 269 | /* Just fire off a uevent and let userspace tell us what to do */ |
@@ -443,7 +444,7 @@ i915_error_object_create(struct drm_device *dev, | |||
443 | if (src == NULL) | 444 | if (src == NULL) |
444 | return NULL; | 445 | return NULL; |
445 | 446 | ||
446 | src_priv = src->driver_private; | 447 | src_priv = to_intel_bo(src); |
447 | if (src_priv->pages == NULL) | 448 | if (src_priv->pages == NULL) |
448 | return NULL; | 449 | return NULL; |
449 | 450 | ||
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 3d59862c7ccd..cbbf59f56dfa 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -298,6 +298,10 @@ | |||
298 | #define INSTDONE 0x02090 | 298 | #define INSTDONE 0x02090 |
299 | #define NOPID 0x02094 | 299 | #define NOPID 0x02094 |
300 | #define HWSTAM 0x02098 | 300 | #define HWSTAM 0x02098 |
301 | |||
302 | #define MI_MODE 0x0209c | ||
303 | # define VS_TIMER_DISPATCH (1 << 6) | ||
304 | |||
301 | #define SCPD0 0x0209c /* 915+ only */ | 305 | #define SCPD0 0x0209c /* 915+ only */ |
302 | #define IER 0x020a0 | 306 | #define IER 0x020a0 |
303 | #define IIR 0x020a4 | 307 | #define IIR 0x020a4 |
@@ -366,7 +370,7 @@ | |||
366 | #define FBC_CTL_PERIODIC (1<<30) | 370 | #define FBC_CTL_PERIODIC (1<<30) |
367 | #define FBC_CTL_INTERVAL_SHIFT (16) | 371 | #define FBC_CTL_INTERVAL_SHIFT (16) |
368 | #define FBC_CTL_UNCOMPRESSIBLE (1<<14) | 372 | #define FBC_CTL_UNCOMPRESSIBLE (1<<14) |
369 | #define FBC_C3_IDLE (1<<13) | 373 | #define FBC_CTL_C3_IDLE (1<<13) |
370 | #define FBC_CTL_STRIDE_SHIFT (5) | 374 | #define FBC_CTL_STRIDE_SHIFT (5) |
371 | #define FBC_CTL_FENCENO (1<<0) | 375 | #define FBC_CTL_FENCENO (1<<0) |
372 | #define FBC_COMMAND 0x0320c | 376 | #define FBC_COMMAND 0x0320c |
@@ -2172,6 +2176,14 @@ | |||
2172 | #define DISPLAY_PORT_PLL_BIOS_1 0x46010 | 2176 | #define DISPLAY_PORT_PLL_BIOS_1 0x46010 |
2173 | #define DISPLAY_PORT_PLL_BIOS_2 0x46014 | 2177 | #define DISPLAY_PORT_PLL_BIOS_2 0x46014 |
2174 | 2178 | ||
2179 | #define PCH_DSPCLK_GATE_D 0x42020 | ||
2180 | # define DPFDUNIT_CLOCK_GATE_DISABLE (1 << 7) | ||
2181 | # define DPARBUNIT_CLOCK_GATE_DISABLE (1 << 5) | ||
2182 | |||
2183 | #define PCH_3DCGDIS0 0x46020 | ||
2184 | # define MARIUNIT_CLOCK_GATE_DISABLE (1 << 18) | ||
2185 | # define SVSMUNIT_CLOCK_GATE_DISABLE (1 << 1) | ||
2186 | |||
2175 | #define FDI_PLL_FREQ_CTL 0x46030 | 2187 | #define FDI_PLL_FREQ_CTL 0x46030 |
2176 | #define FDI_PLL_FREQ_CHANGE_REQUEST (1<<24) | 2188 | #define FDI_PLL_FREQ_CHANGE_REQUEST (1<<24) |
2177 | #define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00 | 2189 | #define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00 |
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 70c9d4ba7042..f9ba452f0cbf 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c | |||
@@ -417,8 +417,9 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) | |||
417 | edp = find_section(bdb, BDB_EDP); | 417 | edp = find_section(bdb, BDB_EDP); |
418 | if (!edp) { | 418 | if (!edp) { |
419 | if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp_support) { | 419 | if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp_support) { |
420 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported,\ | 420 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel " |
421 | assume 18bpp panel color depth.\n"); | 421 | "supported, assume 18bpp panel color " |
422 | "depth.\n"); | ||
422 | dev_priv->edp_bpp = 18; | 423 | dev_priv->edp_bpp = 18; |
423 | } | 424 | } |
424 | return; | 425 | return; |
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index fccf07470c8f..759c2ef72eff 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -25,6 +25,7 @@ | |||
25 | */ | 25 | */ |
26 | 26 | ||
27 | #include <linux/i2c.h> | 27 | #include <linux/i2c.h> |
28 | #include <linux/slab.h> | ||
28 | #include "drmP.h" | 29 | #include "drmP.h" |
29 | #include "drm.h" | 30 | #include "drm.h" |
30 | #include "drm_crtc.h" | 31 | #include "drm_crtc.h" |
@@ -246,19 +247,19 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector) | |||
246 | 247 | ||
247 | static bool intel_crt_detect_ddc(struct drm_connector *connector) | 248 | static bool intel_crt_detect_ddc(struct drm_connector *connector) |
248 | { | 249 | { |
249 | struct intel_output *intel_output = to_intel_output(connector); | 250 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
250 | 251 | ||
251 | /* CRT should always be at 0, but check anyway */ | 252 | /* CRT should always be at 0, but check anyway */ |
252 | if (intel_output->type != INTEL_OUTPUT_ANALOG) | 253 | if (intel_encoder->type != INTEL_OUTPUT_ANALOG) |
253 | return false; | 254 | return false; |
254 | 255 | ||
255 | return intel_ddc_probe(intel_output); | 256 | return intel_ddc_probe(intel_encoder); |
256 | } | 257 | } |
257 | 258 | ||
258 | static enum drm_connector_status | 259 | static enum drm_connector_status |
259 | intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output) | 260 | intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder) |
260 | { | 261 | { |
261 | struct drm_encoder *encoder = &intel_output->enc; | 262 | struct drm_encoder *encoder = &intel_encoder->enc; |
262 | struct drm_device *dev = encoder->dev; | 263 | struct drm_device *dev = encoder->dev; |
263 | struct drm_i915_private *dev_priv = dev->dev_private; | 264 | struct drm_i915_private *dev_priv = dev->dev_private; |
264 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 265 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
@@ -386,8 +387,8 @@ intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output) | |||
386 | static enum drm_connector_status intel_crt_detect(struct drm_connector *connector) | 387 | static enum drm_connector_status intel_crt_detect(struct drm_connector *connector) |
387 | { | 388 | { |
388 | struct drm_device *dev = connector->dev; | 389 | struct drm_device *dev = connector->dev; |
389 | struct intel_output *intel_output = to_intel_output(connector); | 390 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
390 | struct drm_encoder *encoder = &intel_output->enc; | 391 | struct drm_encoder *encoder = &intel_encoder->enc; |
391 | struct drm_crtc *crtc; | 392 | struct drm_crtc *crtc; |
392 | int dpms_mode; | 393 | int dpms_mode; |
393 | enum drm_connector_status status; | 394 | enum drm_connector_status status; |
@@ -404,13 +405,13 @@ static enum drm_connector_status intel_crt_detect(struct drm_connector *connecto | |||
404 | 405 | ||
405 | /* for pre-945g platforms use load detect */ | 406 | /* for pre-945g platforms use load detect */ |
406 | if (encoder->crtc && encoder->crtc->enabled) { | 407 | if (encoder->crtc && encoder->crtc->enabled) { |
407 | status = intel_crt_load_detect(encoder->crtc, intel_output); | 408 | status = intel_crt_load_detect(encoder->crtc, intel_encoder); |
408 | } else { | 409 | } else { |
409 | crtc = intel_get_load_detect_pipe(intel_output, | 410 | crtc = intel_get_load_detect_pipe(intel_encoder, |
410 | NULL, &dpms_mode); | 411 | NULL, &dpms_mode); |
411 | if (crtc) { | 412 | if (crtc) { |
412 | status = intel_crt_load_detect(crtc, intel_output); | 413 | status = intel_crt_load_detect(crtc, intel_encoder); |
413 | intel_release_load_detect_pipe(intel_output, dpms_mode); | 414 | intel_release_load_detect_pipe(intel_encoder, dpms_mode); |
414 | } else | 415 | } else |
415 | status = connector_status_unknown; | 416 | status = connector_status_unknown; |
416 | } | 417 | } |
@@ -420,9 +421,9 @@ static enum drm_connector_status intel_crt_detect(struct drm_connector *connecto | |||
420 | 421 | ||
421 | static void intel_crt_destroy(struct drm_connector *connector) | 422 | static void intel_crt_destroy(struct drm_connector *connector) |
422 | { | 423 | { |
423 | struct intel_output *intel_output = to_intel_output(connector); | 424 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
424 | 425 | ||
425 | intel_i2c_destroy(intel_output->ddc_bus); | 426 | intel_i2c_destroy(intel_encoder->ddc_bus); |
426 | drm_sysfs_connector_remove(connector); | 427 | drm_sysfs_connector_remove(connector); |
427 | drm_connector_cleanup(connector); | 428 | drm_connector_cleanup(connector); |
428 | kfree(connector); | 429 | kfree(connector); |
@@ -431,28 +432,28 @@ static void intel_crt_destroy(struct drm_connector *connector) | |||
431 | static int intel_crt_get_modes(struct drm_connector *connector) | 432 | static int intel_crt_get_modes(struct drm_connector *connector) |
432 | { | 433 | { |
433 | int ret; | 434 | int ret; |
434 | struct intel_output *intel_output = to_intel_output(connector); | 435 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
435 | struct i2c_adapter *ddcbus; | 436 | struct i2c_adapter *ddcbus; |
436 | struct drm_device *dev = connector->dev; | 437 | struct drm_device *dev = connector->dev; |
437 | 438 | ||
438 | 439 | ||
439 | ret = intel_ddc_get_modes(intel_output); | 440 | ret = intel_ddc_get_modes(intel_encoder); |
440 | if (ret || !IS_G4X(dev)) | 441 | if (ret || !IS_G4X(dev)) |
441 | goto end; | 442 | goto end; |
442 | 443 | ||
443 | ddcbus = intel_output->ddc_bus; | 444 | ddcbus = intel_encoder->ddc_bus; |
444 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ | 445 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ |
445 | intel_output->ddc_bus = | 446 | intel_encoder->ddc_bus = |
446 | intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D"); | 447 | intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D"); |
447 | 448 | ||
448 | if (!intel_output->ddc_bus) { | 449 | if (!intel_encoder->ddc_bus) { |
449 | intel_output->ddc_bus = ddcbus; | 450 | intel_encoder->ddc_bus = ddcbus; |
450 | dev_printk(KERN_ERR, &connector->dev->pdev->dev, | 451 | dev_printk(KERN_ERR, &connector->dev->pdev->dev, |
451 | "DDC bus registration failed for CRTDDC_D.\n"); | 452 | "DDC bus registration failed for CRTDDC_D.\n"); |
452 | goto end; | 453 | goto end; |
453 | } | 454 | } |
454 | /* Try to get modes by GPIOD port */ | 455 | /* Try to get modes by GPIOD port */ |
455 | ret = intel_ddc_get_modes(intel_output); | 456 | ret = intel_ddc_get_modes(intel_encoder); |
456 | intel_i2c_destroy(ddcbus); | 457 | intel_i2c_destroy(ddcbus); |
457 | 458 | ||
458 | end: | 459 | end: |
@@ -505,23 +506,23 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs = { | |||
505 | void intel_crt_init(struct drm_device *dev) | 506 | void intel_crt_init(struct drm_device *dev) |
506 | { | 507 | { |
507 | struct drm_connector *connector; | 508 | struct drm_connector *connector; |
508 | struct intel_output *intel_output; | 509 | struct intel_encoder *intel_encoder; |
509 | struct drm_i915_private *dev_priv = dev->dev_private; | 510 | struct drm_i915_private *dev_priv = dev->dev_private; |
510 | u32 i2c_reg; | 511 | u32 i2c_reg; |
511 | 512 | ||
512 | intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL); | 513 | intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL); |
513 | if (!intel_output) | 514 | if (!intel_encoder) |
514 | return; | 515 | return; |
515 | 516 | ||
516 | connector = &intel_output->base; | 517 | connector = &intel_encoder->base; |
517 | drm_connector_init(dev, &intel_output->base, | 518 | drm_connector_init(dev, &intel_encoder->base, |
518 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); | 519 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); |
519 | 520 | ||
520 | drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs, | 521 | drm_encoder_init(dev, &intel_encoder->enc, &intel_crt_enc_funcs, |
521 | DRM_MODE_ENCODER_DAC); | 522 | DRM_MODE_ENCODER_DAC); |
522 | 523 | ||
523 | drm_mode_connector_attach_encoder(&intel_output->base, | 524 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
524 | &intel_output->enc); | 525 | &intel_encoder->enc); |
525 | 526 | ||
526 | /* Set up the DDC bus. */ | 527 | /* Set up the DDC bus. */ |
527 | if (HAS_PCH_SPLIT(dev)) | 528 | if (HAS_PCH_SPLIT(dev)) |
@@ -532,22 +533,22 @@ void intel_crt_init(struct drm_device *dev) | |||
532 | if (dev_priv->crt_ddc_bus != 0) | 533 | if (dev_priv->crt_ddc_bus != 0) |
533 | i2c_reg = dev_priv->crt_ddc_bus; | 534 | i2c_reg = dev_priv->crt_ddc_bus; |
534 | } | 535 | } |
535 | intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A"); | 536 | intel_encoder->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A"); |
536 | if (!intel_output->ddc_bus) { | 537 | if (!intel_encoder->ddc_bus) { |
537 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " | 538 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " |
538 | "failed.\n"); | 539 | "failed.\n"); |
539 | return; | 540 | return; |
540 | } | 541 | } |
541 | 542 | ||
542 | intel_output->type = INTEL_OUTPUT_ANALOG; | 543 | intel_encoder->type = INTEL_OUTPUT_ANALOG; |
543 | intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 544 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
544 | (1 << INTEL_ANALOG_CLONE_BIT) | | 545 | (1 << INTEL_ANALOG_CLONE_BIT) | |
545 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); | 546 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); |
546 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 547 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
547 | connector->interlace_allowed = 0; | 548 | connector->interlace_allowed = 0; |
548 | connector->doublescan_allowed = 0; | 549 | connector->doublescan_allowed = 0; |
549 | 550 | ||
550 | drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs); | 551 | drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs); |
551 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); | 552 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); |
552 | 553 | ||
553 | drm_sysfs_connector_add(connector); | 554 | drm_sysfs_connector_add(connector); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c297fc22867e..9c920396d702 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/input.h> | 28 | #include <linux/input.h> |
29 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
30 | #include <linux/kernel.h> | 30 | #include <linux/kernel.h> |
31 | #include <linux/slab.h> | ||
31 | #include "drmP.h" | 32 | #include "drmP.h" |
32 | #include "intel_drv.h" | 33 | #include "intel_drv.h" |
33 | #include "i915_drm.h" | 34 | #include "i915_drm.h" |
@@ -746,16 +747,16 @@ bool intel_pipe_has_type (struct drm_crtc *crtc, int type) | |||
746 | list_for_each_entry(l_entry, &mode_config->connector_list, head) { | 747 | list_for_each_entry(l_entry, &mode_config->connector_list, head) { |
747 | if (l_entry->encoder && | 748 | if (l_entry->encoder && |
748 | l_entry->encoder->crtc == crtc) { | 749 | l_entry->encoder->crtc == crtc) { |
749 | struct intel_output *intel_output = to_intel_output(l_entry); | 750 | struct intel_encoder *intel_encoder = to_intel_encoder(l_entry); |
750 | if (intel_output->type == type) | 751 | if (intel_encoder->type == type) |
751 | return true; | 752 | return true; |
752 | } | 753 | } |
753 | } | 754 | } |
754 | return false; | 755 | return false; |
755 | } | 756 | } |
756 | 757 | ||
757 | struct drm_connector * | 758 | static struct drm_connector * |
758 | intel_pipe_get_output (struct drm_crtc *crtc) | 759 | intel_pipe_get_connector (struct drm_crtc *crtc) |
759 | { | 760 | { |
760 | struct drm_device *dev = crtc->dev; | 761 | struct drm_device *dev = crtc->dev; |
761 | struct drm_mode_config *mode_config = &dev->mode_config; | 762 | struct drm_mode_config *mode_config = &dev->mode_config; |
@@ -1002,7 +1003,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1002 | struct drm_i915_private *dev_priv = dev->dev_private; | 1003 | struct drm_i915_private *dev_priv = dev->dev_private; |
1003 | struct drm_framebuffer *fb = crtc->fb; | 1004 | struct drm_framebuffer *fb = crtc->fb; |
1004 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); | 1005 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); |
1005 | struct drm_i915_gem_object *obj_priv = intel_fb->obj->driver_private; | 1006 | struct drm_i915_gem_object *obj_priv = to_intel_bo(intel_fb->obj); |
1006 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1007 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1007 | int plane, i; | 1008 | int plane, i; |
1008 | u32 fbc_ctl, fbc_ctl2; | 1009 | u32 fbc_ctl, fbc_ctl2; |
@@ -1032,7 +1033,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1032 | /* enable it... */ | 1033 | /* enable it... */ |
1033 | fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC; | 1034 | fbc_ctl = FBC_CTL_EN | FBC_CTL_PERIODIC; |
1034 | if (IS_I945GM(dev)) | 1035 | if (IS_I945GM(dev)) |
1035 | fbc_ctl |= FBC_C3_IDLE; /* 945 needs special SR handling */ | 1036 | fbc_ctl |= FBC_CTL_C3_IDLE; /* 945 needs special SR handling */ |
1036 | fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT; | 1037 | fbc_ctl |= (dev_priv->cfb_pitch & 0xff) << FBC_CTL_STRIDE_SHIFT; |
1037 | fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; | 1038 | fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; |
1038 | if (obj_priv->tiling_mode != I915_TILING_NONE) | 1039 | if (obj_priv->tiling_mode != I915_TILING_NONE) |
@@ -1079,7 +1080,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1079 | struct drm_i915_private *dev_priv = dev->dev_private; | 1080 | struct drm_i915_private *dev_priv = dev->dev_private; |
1080 | struct drm_framebuffer *fb = crtc->fb; | 1081 | struct drm_framebuffer *fb = crtc->fb; |
1081 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); | 1082 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); |
1082 | struct drm_i915_gem_object *obj_priv = intel_fb->obj->driver_private; | 1083 | struct drm_i915_gem_object *obj_priv = to_intel_bo(intel_fb->obj); |
1083 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1084 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1084 | int plane = (intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : | 1085 | int plane = (intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : |
1085 | DPFC_CTL_PLANEB); | 1086 | DPFC_CTL_PLANEB); |
@@ -1175,7 +1176,7 @@ static void intel_update_fbc(struct drm_crtc *crtc, | |||
1175 | return; | 1176 | return; |
1176 | 1177 | ||
1177 | intel_fb = to_intel_framebuffer(fb); | 1178 | intel_fb = to_intel_framebuffer(fb); |
1178 | obj_priv = intel_fb->obj->driver_private; | 1179 | obj_priv = to_intel_bo(intel_fb->obj); |
1179 | 1180 | ||
1180 | /* | 1181 | /* |
1181 | * If FBC is already on, we just have to verify that we can | 1182 | * If FBC is already on, we just have to verify that we can |
@@ -1242,7 +1243,7 @@ out_disable: | |||
1242 | static int | 1243 | static int |
1243 | intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj) | 1244 | intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj) |
1244 | { | 1245 | { |
1245 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1246 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1246 | u32 alignment; | 1247 | u32 alignment; |
1247 | int ret; | 1248 | int ret; |
1248 | 1249 | ||
@@ -1322,7 +1323,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
1322 | 1323 | ||
1323 | intel_fb = to_intel_framebuffer(crtc->fb); | 1324 | intel_fb = to_intel_framebuffer(crtc->fb); |
1324 | obj = intel_fb->obj; | 1325 | obj = intel_fb->obj; |
1325 | obj_priv = obj->driver_private; | 1326 | obj_priv = to_intel_bo(obj); |
1326 | 1327 | ||
1327 | mutex_lock(&dev->struct_mutex); | 1328 | mutex_lock(&dev->struct_mutex); |
1328 | ret = intel_pin_and_fence_fb_obj(dev, obj); | 1329 | ret = intel_pin_and_fence_fb_obj(dev, obj); |
@@ -1400,7 +1401,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
1400 | 1401 | ||
1401 | if (old_fb) { | 1402 | if (old_fb) { |
1402 | intel_fb = to_intel_framebuffer(old_fb); | 1403 | intel_fb = to_intel_framebuffer(old_fb); |
1403 | obj_priv = intel_fb->obj->driver_private; | 1404 | obj_priv = to_intel_bo(intel_fb->obj); |
1404 | i915_gem_object_unpin(intel_fb->obj); | 1405 | i915_gem_object_unpin(intel_fb->obj); |
1405 | } | 1406 | } |
1406 | intel_increase_pllclock(crtc, true); | 1407 | intel_increase_pllclock(crtc, true); |
@@ -2916,7 +2917,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2916 | int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE; | 2917 | int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE; |
2917 | int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS; | 2918 | int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS; |
2918 | int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC; | 2919 | int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC; |
2919 | int refclk, num_outputs = 0; | 2920 | int refclk, num_connectors = 0; |
2920 | intel_clock_t clock, reduced_clock; | 2921 | intel_clock_t clock, reduced_clock; |
2921 | u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf; | 2922 | u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf; |
2922 | bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false; | 2923 | bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false; |
@@ -2942,19 +2943,19 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2942 | drm_vblank_pre_modeset(dev, pipe); | 2943 | drm_vblank_pre_modeset(dev, pipe); |
2943 | 2944 | ||
2944 | list_for_each_entry(connector, &mode_config->connector_list, head) { | 2945 | list_for_each_entry(connector, &mode_config->connector_list, head) { |
2945 | struct intel_output *intel_output = to_intel_output(connector); | 2946 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
2946 | 2947 | ||
2947 | if (!connector->encoder || connector->encoder->crtc != crtc) | 2948 | if (!connector->encoder || connector->encoder->crtc != crtc) |
2948 | continue; | 2949 | continue; |
2949 | 2950 | ||
2950 | switch (intel_output->type) { | 2951 | switch (intel_encoder->type) { |
2951 | case INTEL_OUTPUT_LVDS: | 2952 | case INTEL_OUTPUT_LVDS: |
2952 | is_lvds = true; | 2953 | is_lvds = true; |
2953 | break; | 2954 | break; |
2954 | case INTEL_OUTPUT_SDVO: | 2955 | case INTEL_OUTPUT_SDVO: |
2955 | case INTEL_OUTPUT_HDMI: | 2956 | case INTEL_OUTPUT_HDMI: |
2956 | is_sdvo = true; | 2957 | is_sdvo = true; |
2957 | if (intel_output->needs_tv_clock) | 2958 | if (intel_encoder->needs_tv_clock) |
2958 | is_tv = true; | 2959 | is_tv = true; |
2959 | break; | 2960 | break; |
2960 | case INTEL_OUTPUT_DVO: | 2961 | case INTEL_OUTPUT_DVO: |
@@ -2974,10 +2975,10 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2974 | break; | 2975 | break; |
2975 | } | 2976 | } |
2976 | 2977 | ||
2977 | num_outputs++; | 2978 | num_connectors++; |
2978 | } | 2979 | } |
2979 | 2980 | ||
2980 | if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) { | 2981 | if (is_lvds && dev_priv->lvds_use_ssc && num_connectors < 2) { |
2981 | refclk = dev_priv->lvds_ssc_freq * 1000; | 2982 | refclk = dev_priv->lvds_ssc_freq * 1000; |
2982 | DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n", | 2983 | DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n", |
2983 | refclk / 1000); | 2984 | refclk / 1000); |
@@ -3048,8 +3049,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
3048 | if (is_edp) { | 3049 | if (is_edp) { |
3049 | struct drm_connector *edp; | 3050 | struct drm_connector *edp; |
3050 | target_clock = mode->clock; | 3051 | target_clock = mode->clock; |
3051 | edp = intel_pipe_get_output(crtc); | 3052 | edp = intel_pipe_get_connector(crtc); |
3052 | intel_edp_link_config(to_intel_output(edp), | 3053 | intel_edp_link_config(to_intel_encoder(edp), |
3053 | &lane, &link_bw); | 3054 | &lane, &link_bw); |
3054 | } else { | 3055 | } else { |
3055 | /* DP over FDI requires target mode clock | 3056 | /* DP over FDI requires target mode clock |
@@ -3230,7 +3231,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
3230 | /* XXX: just matching BIOS for now */ | 3231 | /* XXX: just matching BIOS for now */ |
3231 | /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ | 3232 | /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ |
3232 | dpll |= 3; | 3233 | dpll |= 3; |
3233 | else if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) | 3234 | else if (is_lvds && dev_priv->lvds_use_ssc && num_connectors < 2) |
3234 | dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN; | 3235 | dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN; |
3235 | else | 3236 | else |
3236 | dpll |= PLL_REF_INPUT_DREFCLK; | 3237 | dpll |= PLL_REF_INPUT_DREFCLK; |
@@ -3510,7 +3511,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, | |||
3510 | if (!bo) | 3511 | if (!bo) |
3511 | return -ENOENT; | 3512 | return -ENOENT; |
3512 | 3513 | ||
3513 | obj_priv = bo->driver_private; | 3514 | obj_priv = to_intel_bo(bo); |
3514 | 3515 | ||
3515 | if (bo->size < width * height * 4) { | 3516 | if (bo->size < width * height * 4) { |
3516 | DRM_ERROR("buffer is to small\n"); | 3517 | DRM_ERROR("buffer is to small\n"); |
@@ -3654,9 +3655,9 @@ static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, | |||
3654 | * detection. | 3655 | * detection. |
3655 | * | 3656 | * |
3656 | * It will be up to the load-detect code to adjust the pipe as appropriate for | 3657 | * It will be up to the load-detect code to adjust the pipe as appropriate for |
3657 | * its requirements. The pipe will be connected to no other outputs. | 3658 | * its requirements. The pipe will be connected to no other encoders. |
3658 | * | 3659 | * |
3659 | * Currently this code will only succeed if there is a pipe with no outputs | 3660 | * Currently this code will only succeed if there is a pipe with no encoders |
3660 | * configured for it. In the future, it could choose to temporarily disable | 3661 | * configured for it. In the future, it could choose to temporarily disable |
3661 | * some outputs to free up a pipe for its use. | 3662 | * some outputs to free up a pipe for its use. |
3662 | * | 3663 | * |
@@ -3669,14 +3670,14 @@ static struct drm_display_mode load_detect_mode = { | |||
3669 | 704, 832, 0, 480, 489, 491, 520, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), | 3670 | 704, 832, 0, 480, 489, 491, 520, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
3670 | }; | 3671 | }; |
3671 | 3672 | ||
3672 | struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | 3673 | struct drm_crtc *intel_get_load_detect_pipe(struct intel_encoder *intel_encoder, |
3673 | struct drm_display_mode *mode, | 3674 | struct drm_display_mode *mode, |
3674 | int *dpms_mode) | 3675 | int *dpms_mode) |
3675 | { | 3676 | { |
3676 | struct intel_crtc *intel_crtc; | 3677 | struct intel_crtc *intel_crtc; |
3677 | struct drm_crtc *possible_crtc; | 3678 | struct drm_crtc *possible_crtc; |
3678 | struct drm_crtc *supported_crtc =NULL; | 3679 | struct drm_crtc *supported_crtc =NULL; |
3679 | struct drm_encoder *encoder = &intel_output->enc; | 3680 | struct drm_encoder *encoder = &intel_encoder->enc; |
3680 | struct drm_crtc *crtc = NULL; | 3681 | struct drm_crtc *crtc = NULL; |
3681 | struct drm_device *dev = encoder->dev; | 3682 | struct drm_device *dev = encoder->dev; |
3682 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | 3683 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; |
@@ -3728,8 +3729,8 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | |||
3728 | } | 3729 | } |
3729 | 3730 | ||
3730 | encoder->crtc = crtc; | 3731 | encoder->crtc = crtc; |
3731 | intel_output->base.encoder = encoder; | 3732 | intel_encoder->base.encoder = encoder; |
3732 | intel_output->load_detect_temp = true; | 3733 | intel_encoder->load_detect_temp = true; |
3733 | 3734 | ||
3734 | intel_crtc = to_intel_crtc(crtc); | 3735 | intel_crtc = to_intel_crtc(crtc); |
3735 | *dpms_mode = intel_crtc->dpms_mode; | 3736 | *dpms_mode = intel_crtc->dpms_mode; |
@@ -3754,23 +3755,23 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | |||
3754 | return crtc; | 3755 | return crtc; |
3755 | } | 3756 | } |
3756 | 3757 | ||
3757 | void intel_release_load_detect_pipe(struct intel_output *intel_output, int dpms_mode) | 3758 | void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, int dpms_mode) |
3758 | { | 3759 | { |
3759 | struct drm_encoder *encoder = &intel_output->enc; | 3760 | struct drm_encoder *encoder = &intel_encoder->enc; |
3760 | struct drm_device *dev = encoder->dev; | 3761 | struct drm_device *dev = encoder->dev; |
3761 | struct drm_crtc *crtc = encoder->crtc; | 3762 | struct drm_crtc *crtc = encoder->crtc; |
3762 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | 3763 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; |
3763 | struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; | 3764 | struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; |
3764 | 3765 | ||
3765 | if (intel_output->load_detect_temp) { | 3766 | if (intel_encoder->load_detect_temp) { |
3766 | encoder->crtc = NULL; | 3767 | encoder->crtc = NULL; |
3767 | intel_output->base.encoder = NULL; | 3768 | intel_encoder->base.encoder = NULL; |
3768 | intel_output->load_detect_temp = false; | 3769 | intel_encoder->load_detect_temp = false; |
3769 | crtc->enabled = drm_helper_crtc_in_use(crtc); | 3770 | crtc->enabled = drm_helper_crtc_in_use(crtc); |
3770 | drm_helper_disable_unused_functions(dev); | 3771 | drm_helper_disable_unused_functions(dev); |
3771 | } | 3772 | } |
3772 | 3773 | ||
3773 | /* Switch crtc and output back off if necessary */ | 3774 | /* Switch crtc and encoder back off if necessary */ |
3774 | if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) { | 3775 | if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) { |
3775 | if (encoder->crtc == crtc) | 3776 | if (encoder->crtc == crtc) |
3776 | encoder_funcs->dpms(encoder, dpms_mode); | 3777 | encoder_funcs->dpms(encoder, dpms_mode); |
@@ -4155,7 +4156,7 @@ void intel_finish_page_flip(struct drm_device *dev, int pipe) | |||
4155 | work = intel_crtc->unpin_work; | 4156 | work = intel_crtc->unpin_work; |
4156 | if (work == NULL || !work->pending) { | 4157 | if (work == NULL || !work->pending) { |
4157 | if (work && !work->pending) { | 4158 | if (work && !work->pending) { |
4158 | obj_priv = work->pending_flip_obj->driver_private; | 4159 | obj_priv = to_intel_bo(work->pending_flip_obj); |
4159 | DRM_DEBUG_DRIVER("flip finish: %p (%d) not pending?\n", | 4160 | DRM_DEBUG_DRIVER("flip finish: %p (%d) not pending?\n", |
4160 | obj_priv, | 4161 | obj_priv, |
4161 | atomic_read(&obj_priv->pending_flip)); | 4162 | atomic_read(&obj_priv->pending_flip)); |
@@ -4180,7 +4181,7 @@ void intel_finish_page_flip(struct drm_device *dev, int pipe) | |||
4180 | 4181 | ||
4181 | spin_unlock_irqrestore(&dev->event_lock, flags); | 4182 | spin_unlock_irqrestore(&dev->event_lock, flags); |
4182 | 4183 | ||
4183 | obj_priv = work->pending_flip_obj->driver_private; | 4184 | obj_priv = to_intel_bo(work->pending_flip_obj); |
4184 | 4185 | ||
4185 | /* Initial scanout buffer will have a 0 pending flip count */ | 4186 | /* Initial scanout buffer will have a 0 pending flip count */ |
4186 | if ((atomic_read(&obj_priv->pending_flip) == 0) || | 4187 | if ((atomic_read(&obj_priv->pending_flip) == 0) || |
@@ -4251,7 +4252,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, | |||
4251 | ret = intel_pin_and_fence_fb_obj(dev, obj); | 4252 | ret = intel_pin_and_fence_fb_obj(dev, obj); |
4252 | if (ret != 0) { | 4253 | if (ret != 0) { |
4253 | DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n", | 4254 | DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n", |
4254 | obj->driver_private); | 4255 | to_intel_bo(obj)); |
4255 | kfree(work); | 4256 | kfree(work); |
4256 | intel_crtc->unpin_work = NULL; | 4257 | intel_crtc->unpin_work = NULL; |
4257 | mutex_unlock(&dev->struct_mutex); | 4258 | mutex_unlock(&dev->struct_mutex); |
@@ -4265,7 +4266,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, | |||
4265 | crtc->fb = fb; | 4266 | crtc->fb = fb; |
4266 | i915_gem_object_flush_write_domain(obj); | 4267 | i915_gem_object_flush_write_domain(obj); |
4267 | drm_vblank_get(dev, intel_crtc->pipe); | 4268 | drm_vblank_get(dev, intel_crtc->pipe); |
4268 | obj_priv = obj->driver_private; | 4269 | obj_priv = to_intel_bo(obj); |
4269 | atomic_inc(&obj_priv->pending_flip); | 4270 | atomic_inc(&obj_priv->pending_flip); |
4270 | work->pending_flip_obj = obj; | 4271 | work->pending_flip_obj = obj; |
4271 | 4272 | ||
@@ -4398,8 +4399,8 @@ static int intel_connector_clones(struct drm_device *dev, int type_mask) | |||
4398 | int entry = 0; | 4399 | int entry = 0; |
4399 | 4400 | ||
4400 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 4401 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
4401 | struct intel_output *intel_output = to_intel_output(connector); | 4402 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
4402 | if (type_mask & intel_output->clone_mask) | 4403 | if (type_mask & intel_encoder->clone_mask) |
4403 | index_mask |= (1 << entry); | 4404 | index_mask |= (1 << entry); |
4404 | entry++; | 4405 | entry++; |
4405 | } | 4406 | } |
@@ -4494,12 +4495,12 @@ static void intel_setup_outputs(struct drm_device *dev) | |||
4494 | intel_tv_init(dev); | 4495 | intel_tv_init(dev); |
4495 | 4496 | ||
4496 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 4497 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
4497 | struct intel_output *intel_output = to_intel_output(connector); | 4498 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
4498 | struct drm_encoder *encoder = &intel_output->enc; | 4499 | struct drm_encoder *encoder = &intel_encoder->enc; |
4499 | 4500 | ||
4500 | encoder->possible_crtcs = intel_output->crtc_mask; | 4501 | encoder->possible_crtcs = intel_encoder->crtc_mask; |
4501 | encoder->possible_clones = intel_connector_clones(dev, | 4502 | encoder->possible_clones = intel_connector_clones(dev, |
4502 | intel_output->clone_mask); | 4503 | intel_encoder->clone_mask); |
4503 | } | 4504 | } |
4504 | } | 4505 | } |
4505 | 4506 | ||
@@ -4717,6 +4718,20 @@ void intel_init_clock_gating(struct drm_device *dev) | |||
4717 | * specs, but enable as much else as we can. | 4718 | * specs, but enable as much else as we can. |
4718 | */ | 4719 | */ |
4719 | if (HAS_PCH_SPLIT(dev)) { | 4720 | if (HAS_PCH_SPLIT(dev)) { |
4721 | uint32_t dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE; | ||
4722 | |||
4723 | if (IS_IRONLAKE(dev)) { | ||
4724 | /* Required for FBC */ | ||
4725 | dspclk_gate |= DPFDUNIT_CLOCK_GATE_DISABLE; | ||
4726 | /* Required for CxSR */ | ||
4727 | dspclk_gate |= DPARBUNIT_CLOCK_GATE_DISABLE; | ||
4728 | |||
4729 | I915_WRITE(PCH_3DCGDIS0, | ||
4730 | MARIUNIT_CLOCK_GATE_DISABLE | | ||
4731 | SVSMUNIT_CLOCK_GATE_DISABLE); | ||
4732 | } | ||
4733 | |||
4734 | I915_WRITE(PCH_DSPCLK_GATE_D, dspclk_gate); | ||
4720 | return; | 4735 | return; |
4721 | } else if (IS_G4X(dev)) { | 4736 | } else if (IS_G4X(dev)) { |
4722 | uint32_t dspclk_gate; | 4737 | uint32_t dspclk_gate; |
@@ -4764,14 +4779,14 @@ void intel_init_clock_gating(struct drm_device *dev) | |||
4764 | struct drm_i915_gem_object *obj_priv = NULL; | 4779 | struct drm_i915_gem_object *obj_priv = NULL; |
4765 | 4780 | ||
4766 | if (dev_priv->pwrctx) { | 4781 | if (dev_priv->pwrctx) { |
4767 | obj_priv = dev_priv->pwrctx->driver_private; | 4782 | obj_priv = to_intel_bo(dev_priv->pwrctx); |
4768 | } else { | 4783 | } else { |
4769 | struct drm_gem_object *pwrctx; | 4784 | struct drm_gem_object *pwrctx; |
4770 | 4785 | ||
4771 | pwrctx = intel_alloc_power_context(dev); | 4786 | pwrctx = intel_alloc_power_context(dev); |
4772 | if (pwrctx) { | 4787 | if (pwrctx) { |
4773 | dev_priv->pwrctx = pwrctx; | 4788 | dev_priv->pwrctx = pwrctx; |
4774 | obj_priv = pwrctx->driver_private; | 4789 | obj_priv = to_intel_bo(pwrctx); |
4775 | } | 4790 | } |
4776 | } | 4791 | } |
4777 | 4792 | ||
@@ -4800,7 +4815,7 @@ static void intel_init_display(struct drm_device *dev) | |||
4800 | dev_priv->display.fbc_enabled = g4x_fbc_enabled; | 4815 | dev_priv->display.fbc_enabled = g4x_fbc_enabled; |
4801 | dev_priv->display.enable_fbc = g4x_enable_fbc; | 4816 | dev_priv->display.enable_fbc = g4x_enable_fbc; |
4802 | dev_priv->display.disable_fbc = g4x_disable_fbc; | 4817 | dev_priv->display.disable_fbc = g4x_disable_fbc; |
4803 | } else if (IS_I965GM(dev) || IS_I945GM(dev) || IS_I915GM(dev)) { | 4818 | } else if (IS_I965GM(dev)) { |
4804 | dev_priv->display.fbc_enabled = i8xx_fbc_enabled; | 4819 | dev_priv->display.fbc_enabled = i8xx_fbc_enabled; |
4805 | dev_priv->display.enable_fbc = i8xx_enable_fbc; | 4820 | dev_priv->display.enable_fbc = i8xx_enable_fbc; |
4806 | dev_priv->display.disable_fbc = i8xx_disable_fbc; | 4821 | dev_priv->display.disable_fbc = i8xx_disable_fbc; |
@@ -4942,7 +4957,7 @@ void intel_modeset_cleanup(struct drm_device *dev) | |||
4942 | if (dev_priv->pwrctx) { | 4957 | if (dev_priv->pwrctx) { |
4943 | struct drm_i915_gem_object *obj_priv; | 4958 | struct drm_i915_gem_object *obj_priv; |
4944 | 4959 | ||
4945 | obj_priv = dev_priv->pwrctx->driver_private; | 4960 | obj_priv = to_intel_bo(dev_priv->pwrctx); |
4946 | I915_WRITE(PWRCTXA, obj_priv->gtt_offset &~ PWRCTX_EN); | 4961 | I915_WRITE(PWRCTXA, obj_priv->gtt_offset &~ PWRCTX_EN); |
4947 | I915_READ(PWRCTXA); | 4962 | I915_READ(PWRCTXA); |
4948 | i915_gem_object_unpin(dev_priv->pwrctx); | 4963 | i915_gem_object_unpin(dev_priv->pwrctx); |
@@ -4963,9 +4978,9 @@ void intel_modeset_cleanup(struct drm_device *dev) | |||
4963 | */ | 4978 | */ |
4964 | struct drm_encoder *intel_best_encoder(struct drm_connector *connector) | 4979 | struct drm_encoder *intel_best_encoder(struct drm_connector *connector) |
4965 | { | 4980 | { |
4966 | struct intel_output *intel_output = to_intel_output(connector); | 4981 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
4967 | 4982 | ||
4968 | return &intel_output->enc; | 4983 | return &intel_encoder->enc; |
4969 | } | 4984 | } |
4970 | 4985 | ||
4971 | /* | 4986 | /* |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 3ef3a0d0edd0..77e40cfcf216 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -26,6 +26,7 @@ | |||
26 | */ | 26 | */ |
27 | 27 | ||
28 | #include <linux/i2c.h> | 28 | #include <linux/i2c.h> |
29 | #include <linux/slab.h> | ||
29 | #include "drmP.h" | 30 | #include "drmP.h" |
30 | #include "drm.h" | 31 | #include "drm.h" |
31 | #include "drm_crtc.h" | 32 | #include "drm_crtc.h" |
@@ -54,23 +55,23 @@ struct intel_dp_priv { | |||
54 | uint8_t link_bw; | 55 | uint8_t link_bw; |
55 | uint8_t lane_count; | 56 | uint8_t lane_count; |
56 | uint8_t dpcd[4]; | 57 | uint8_t dpcd[4]; |
57 | struct intel_output *intel_output; | 58 | struct intel_encoder *intel_encoder; |
58 | struct i2c_adapter adapter; | 59 | struct i2c_adapter adapter; |
59 | struct i2c_algo_dp_aux_data algo; | 60 | struct i2c_algo_dp_aux_data algo; |
60 | }; | 61 | }; |
61 | 62 | ||
62 | static void | 63 | static void |
63 | intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | 64 | intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP, |
64 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]); | 65 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]); |
65 | 66 | ||
66 | static void | 67 | static void |
67 | intel_dp_link_down(struct intel_output *intel_output, uint32_t DP); | 68 | intel_dp_link_down(struct intel_encoder *intel_encoder, uint32_t DP); |
68 | 69 | ||
69 | void | 70 | void |
70 | intel_edp_link_config (struct intel_output *intel_output, | 71 | intel_edp_link_config (struct intel_encoder *intel_encoder, |
71 | int *lane_num, int *link_bw) | 72 | int *lane_num, int *link_bw) |
72 | { | 73 | { |
73 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 74 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
74 | 75 | ||
75 | *lane_num = dp_priv->lane_count; | 76 | *lane_num = dp_priv->lane_count; |
76 | if (dp_priv->link_bw == DP_LINK_BW_1_62) | 77 | if (dp_priv->link_bw == DP_LINK_BW_1_62) |
@@ -80,9 +81,9 @@ intel_edp_link_config (struct intel_output *intel_output, | |||
80 | } | 81 | } |
81 | 82 | ||
82 | static int | 83 | static int |
83 | intel_dp_max_lane_count(struct intel_output *intel_output) | 84 | intel_dp_max_lane_count(struct intel_encoder *intel_encoder) |
84 | { | 85 | { |
85 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 86 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
86 | int max_lane_count = 4; | 87 | int max_lane_count = 4; |
87 | 88 | ||
88 | if (dp_priv->dpcd[0] >= 0x11) { | 89 | if (dp_priv->dpcd[0] >= 0x11) { |
@@ -98,9 +99,9 @@ intel_dp_max_lane_count(struct intel_output *intel_output) | |||
98 | } | 99 | } |
99 | 100 | ||
100 | static int | 101 | static int |
101 | intel_dp_max_link_bw(struct intel_output *intel_output) | 102 | intel_dp_max_link_bw(struct intel_encoder *intel_encoder) |
102 | { | 103 | { |
103 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 104 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
104 | int max_link_bw = dp_priv->dpcd[1]; | 105 | int max_link_bw = dp_priv->dpcd[1]; |
105 | 106 | ||
106 | switch (max_link_bw) { | 107 | switch (max_link_bw) { |
@@ -126,11 +127,11 @@ intel_dp_link_clock(uint8_t link_bw) | |||
126 | /* I think this is a fiction */ | 127 | /* I think this is a fiction */ |
127 | static int | 128 | static int |
128 | intel_dp_link_required(struct drm_device *dev, | 129 | intel_dp_link_required(struct drm_device *dev, |
129 | struct intel_output *intel_output, int pixel_clock) | 130 | struct intel_encoder *intel_encoder, int pixel_clock) |
130 | { | 131 | { |
131 | struct drm_i915_private *dev_priv = dev->dev_private; | 132 | struct drm_i915_private *dev_priv = dev->dev_private; |
132 | 133 | ||
133 | if (IS_eDP(intel_output)) | 134 | if (IS_eDP(intel_encoder)) |
134 | return (pixel_clock * dev_priv->edp_bpp) / 8; | 135 | return (pixel_clock * dev_priv->edp_bpp) / 8; |
135 | else | 136 | else |
136 | return pixel_clock * 3; | 137 | return pixel_clock * 3; |
@@ -140,11 +141,11 @@ static int | |||
140 | intel_dp_mode_valid(struct drm_connector *connector, | 141 | intel_dp_mode_valid(struct drm_connector *connector, |
141 | struct drm_display_mode *mode) | 142 | struct drm_display_mode *mode) |
142 | { | 143 | { |
143 | struct intel_output *intel_output = to_intel_output(connector); | 144 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
144 | int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_output)); | 145 | int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_encoder)); |
145 | int max_lanes = intel_dp_max_lane_count(intel_output); | 146 | int max_lanes = intel_dp_max_lane_count(intel_encoder); |
146 | 147 | ||
147 | if (intel_dp_link_required(connector->dev, intel_output, mode->clock) | 148 | if (intel_dp_link_required(connector->dev, intel_encoder, mode->clock) |
148 | > max_link_clock * max_lanes) | 149 | > max_link_clock * max_lanes) |
149 | return MODE_CLOCK_HIGH; | 150 | return MODE_CLOCK_HIGH; |
150 | 151 | ||
@@ -208,13 +209,13 @@ intel_hrawclk(struct drm_device *dev) | |||
208 | } | 209 | } |
209 | 210 | ||
210 | static int | 211 | static int |
211 | intel_dp_aux_ch(struct intel_output *intel_output, | 212 | intel_dp_aux_ch(struct intel_encoder *intel_encoder, |
212 | uint8_t *send, int send_bytes, | 213 | uint8_t *send, int send_bytes, |
213 | uint8_t *recv, int recv_size) | 214 | uint8_t *recv, int recv_size) |
214 | { | 215 | { |
215 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 216 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
216 | uint32_t output_reg = dp_priv->output_reg; | 217 | uint32_t output_reg = dp_priv->output_reg; |
217 | struct drm_device *dev = intel_output->base.dev; | 218 | struct drm_device *dev = intel_encoder->base.dev; |
218 | struct drm_i915_private *dev_priv = dev->dev_private; | 219 | struct drm_i915_private *dev_priv = dev->dev_private; |
219 | uint32_t ch_ctl = output_reg + 0x10; | 220 | uint32_t ch_ctl = output_reg + 0x10; |
220 | uint32_t ch_data = ch_ctl + 4; | 221 | uint32_t ch_data = ch_ctl + 4; |
@@ -229,7 +230,7 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
229 | * and would like to run at 2MHz. So, take the | 230 | * and would like to run at 2MHz. So, take the |
230 | * hrawclk value and divide by 2 and use that | 231 | * hrawclk value and divide by 2 and use that |
231 | */ | 232 | */ |
232 | if (IS_eDP(intel_output)) | 233 | if (IS_eDP(intel_encoder)) |
233 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ | 234 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ |
234 | else if (HAS_PCH_SPLIT(dev)) | 235 | else if (HAS_PCH_SPLIT(dev)) |
235 | aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */ | 236 | aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */ |
@@ -312,7 +313,7 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
312 | 313 | ||
313 | /* Write data to the aux channel in native mode */ | 314 | /* Write data to the aux channel in native mode */ |
314 | static int | 315 | static int |
315 | intel_dp_aux_native_write(struct intel_output *intel_output, | 316 | intel_dp_aux_native_write(struct intel_encoder *intel_encoder, |
316 | uint16_t address, uint8_t *send, int send_bytes) | 317 | uint16_t address, uint8_t *send, int send_bytes) |
317 | { | 318 | { |
318 | int ret; | 319 | int ret; |
@@ -329,7 +330,7 @@ intel_dp_aux_native_write(struct intel_output *intel_output, | |||
329 | memcpy(&msg[4], send, send_bytes); | 330 | memcpy(&msg[4], send, send_bytes); |
330 | msg_bytes = send_bytes + 4; | 331 | msg_bytes = send_bytes + 4; |
331 | for (;;) { | 332 | for (;;) { |
332 | ret = intel_dp_aux_ch(intel_output, msg, msg_bytes, &ack, 1); | 333 | ret = intel_dp_aux_ch(intel_encoder, msg, msg_bytes, &ack, 1); |
333 | if (ret < 0) | 334 | if (ret < 0) |
334 | return ret; | 335 | return ret; |
335 | if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) | 336 | if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) |
@@ -344,15 +345,15 @@ intel_dp_aux_native_write(struct intel_output *intel_output, | |||
344 | 345 | ||
345 | /* Write a single byte to the aux channel in native mode */ | 346 | /* Write a single byte to the aux channel in native mode */ |
346 | static int | 347 | static int |
347 | intel_dp_aux_native_write_1(struct intel_output *intel_output, | 348 | intel_dp_aux_native_write_1(struct intel_encoder *intel_encoder, |
348 | uint16_t address, uint8_t byte) | 349 | uint16_t address, uint8_t byte) |
349 | { | 350 | { |
350 | return intel_dp_aux_native_write(intel_output, address, &byte, 1); | 351 | return intel_dp_aux_native_write(intel_encoder, address, &byte, 1); |
351 | } | 352 | } |
352 | 353 | ||
353 | /* read bytes from a native aux channel */ | 354 | /* read bytes from a native aux channel */ |
354 | static int | 355 | static int |
355 | intel_dp_aux_native_read(struct intel_output *intel_output, | 356 | intel_dp_aux_native_read(struct intel_encoder *intel_encoder, |
356 | uint16_t address, uint8_t *recv, int recv_bytes) | 357 | uint16_t address, uint8_t *recv, int recv_bytes) |
357 | { | 358 | { |
358 | uint8_t msg[4]; | 359 | uint8_t msg[4]; |
@@ -371,7 +372,7 @@ intel_dp_aux_native_read(struct intel_output *intel_output, | |||
371 | reply_bytes = recv_bytes + 1; | 372 | reply_bytes = recv_bytes + 1; |
372 | 373 | ||
373 | for (;;) { | 374 | for (;;) { |
374 | ret = intel_dp_aux_ch(intel_output, msg, msg_bytes, | 375 | ret = intel_dp_aux_ch(intel_encoder, msg, msg_bytes, |
375 | reply, reply_bytes); | 376 | reply, reply_bytes); |
376 | if (ret == 0) | 377 | if (ret == 0) |
377 | return -EPROTO; | 378 | return -EPROTO; |
@@ -397,7 +398,7 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
397 | struct intel_dp_priv *dp_priv = container_of(adapter, | 398 | struct intel_dp_priv *dp_priv = container_of(adapter, |
398 | struct intel_dp_priv, | 399 | struct intel_dp_priv, |
399 | adapter); | 400 | adapter); |
400 | struct intel_output *intel_output = dp_priv->intel_output; | 401 | struct intel_encoder *intel_encoder = dp_priv->intel_encoder; |
401 | uint16_t address = algo_data->address; | 402 | uint16_t address = algo_data->address; |
402 | uint8_t msg[5]; | 403 | uint8_t msg[5]; |
403 | uint8_t reply[2]; | 404 | uint8_t reply[2]; |
@@ -436,7 +437,7 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
436 | } | 437 | } |
437 | 438 | ||
438 | for (;;) { | 439 | for (;;) { |
439 | ret = intel_dp_aux_ch(intel_output, | 440 | ret = intel_dp_aux_ch(intel_encoder, |
440 | msg, msg_bytes, | 441 | msg, msg_bytes, |
441 | reply, reply_bytes); | 442 | reply, reply_bytes); |
442 | if (ret < 0) { | 443 | if (ret < 0) { |
@@ -464,9 +465,9 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
464 | } | 465 | } |
465 | 466 | ||
466 | static int | 467 | static int |
467 | intel_dp_i2c_init(struct intel_output *intel_output, const char *name) | 468 | intel_dp_i2c_init(struct intel_encoder *intel_encoder, const char *name) |
468 | { | 469 | { |
469 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 470 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
470 | 471 | ||
471 | DRM_DEBUG_KMS("i2c_init %s\n", name); | 472 | DRM_DEBUG_KMS("i2c_init %s\n", name); |
472 | dp_priv->algo.running = false; | 473 | dp_priv->algo.running = false; |
@@ -479,7 +480,7 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name) | |||
479 | strncpy (dp_priv->adapter.name, name, sizeof(dp_priv->adapter.name) - 1); | 480 | strncpy (dp_priv->adapter.name, name, sizeof(dp_priv->adapter.name) - 1); |
480 | dp_priv->adapter.name[sizeof(dp_priv->adapter.name) - 1] = '\0'; | 481 | dp_priv->adapter.name[sizeof(dp_priv->adapter.name) - 1] = '\0'; |
481 | dp_priv->adapter.algo_data = &dp_priv->algo; | 482 | dp_priv->adapter.algo_data = &dp_priv->algo; |
482 | dp_priv->adapter.dev.parent = &intel_output->base.kdev; | 483 | dp_priv->adapter.dev.parent = &intel_encoder->base.kdev; |
483 | 484 | ||
484 | return i2c_dp_aux_add_bus(&dp_priv->adapter); | 485 | return i2c_dp_aux_add_bus(&dp_priv->adapter); |
485 | } | 486 | } |
@@ -488,18 +489,18 @@ static bool | |||
488 | intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | 489 | intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, |
489 | struct drm_display_mode *adjusted_mode) | 490 | struct drm_display_mode *adjusted_mode) |
490 | { | 491 | { |
491 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 492 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
492 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 493 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
493 | int lane_count, clock; | 494 | int lane_count, clock; |
494 | int max_lane_count = intel_dp_max_lane_count(intel_output); | 495 | int max_lane_count = intel_dp_max_lane_count(intel_encoder); |
495 | int max_clock = intel_dp_max_link_bw(intel_output) == DP_LINK_BW_2_7 ? 1 : 0; | 496 | int max_clock = intel_dp_max_link_bw(intel_encoder) == DP_LINK_BW_2_7 ? 1 : 0; |
496 | static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; | 497 | static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; |
497 | 498 | ||
498 | for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { | 499 | for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { |
499 | for (clock = 0; clock <= max_clock; clock++) { | 500 | for (clock = 0; clock <= max_clock; clock++) { |
500 | int link_avail = intel_dp_link_clock(bws[clock]) * lane_count; | 501 | int link_avail = intel_dp_link_clock(bws[clock]) * lane_count; |
501 | 502 | ||
502 | if (intel_dp_link_required(encoder->dev, intel_output, mode->clock) | 503 | if (intel_dp_link_required(encoder->dev, intel_encoder, mode->clock) |
503 | <= link_avail) { | 504 | <= link_avail) { |
504 | dp_priv->link_bw = bws[clock]; | 505 | dp_priv->link_bw = bws[clock]; |
505 | dp_priv->lane_count = lane_count; | 506 | dp_priv->lane_count = lane_count; |
@@ -561,16 +562,16 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
561 | struct intel_dp_m_n m_n; | 562 | struct intel_dp_m_n m_n; |
562 | 563 | ||
563 | /* | 564 | /* |
564 | * Find the lane count in the intel_output private | 565 | * Find the lane count in the intel_encoder private |
565 | */ | 566 | */ |
566 | list_for_each_entry(connector, &mode_config->connector_list, head) { | 567 | list_for_each_entry(connector, &mode_config->connector_list, head) { |
567 | struct intel_output *intel_output = to_intel_output(connector); | 568 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
568 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 569 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
569 | 570 | ||
570 | if (!connector->encoder || connector->encoder->crtc != crtc) | 571 | if (!connector->encoder || connector->encoder->crtc != crtc) |
571 | continue; | 572 | continue; |
572 | 573 | ||
573 | if (intel_output->type == INTEL_OUTPUT_DISPLAYPORT) { | 574 | if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) { |
574 | lane_count = dp_priv->lane_count; | 575 | lane_count = dp_priv->lane_count; |
575 | break; | 576 | break; |
576 | } | 577 | } |
@@ -625,9 +626,9 @@ static void | |||
625 | intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | 626 | intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, |
626 | struct drm_display_mode *adjusted_mode) | 627 | struct drm_display_mode *adjusted_mode) |
627 | { | 628 | { |
628 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 629 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
629 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 630 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
630 | struct drm_crtc *crtc = intel_output->enc.crtc; | 631 | struct drm_crtc *crtc = intel_encoder->enc.crtc; |
631 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 632 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
632 | 633 | ||
633 | dp_priv->DP = (DP_LINK_TRAIN_OFF | | 634 | dp_priv->DP = (DP_LINK_TRAIN_OFF | |
@@ -666,7 +667,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
666 | if (intel_crtc->pipe == 1) | 667 | if (intel_crtc->pipe == 1) |
667 | dp_priv->DP |= DP_PIPEB_SELECT; | 668 | dp_priv->DP |= DP_PIPEB_SELECT; |
668 | 669 | ||
669 | if (IS_eDP(intel_output)) { | 670 | if (IS_eDP(intel_encoder)) { |
670 | /* don't miss out required setting for eDP */ | 671 | /* don't miss out required setting for eDP */ |
671 | dp_priv->DP |= DP_PLL_ENABLE; | 672 | dp_priv->DP |= DP_PLL_ENABLE; |
672 | if (adjusted_mode->clock < 200000) | 673 | if (adjusted_mode->clock < 200000) |
@@ -701,22 +702,22 @@ static void ironlake_edp_backlight_off (struct drm_device *dev) | |||
701 | static void | 702 | static void |
702 | intel_dp_dpms(struct drm_encoder *encoder, int mode) | 703 | intel_dp_dpms(struct drm_encoder *encoder, int mode) |
703 | { | 704 | { |
704 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 705 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
705 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 706 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
706 | struct drm_device *dev = intel_output->base.dev; | 707 | struct drm_device *dev = intel_encoder->base.dev; |
707 | struct drm_i915_private *dev_priv = dev->dev_private; | 708 | struct drm_i915_private *dev_priv = dev->dev_private; |
708 | uint32_t dp_reg = I915_READ(dp_priv->output_reg); | 709 | uint32_t dp_reg = I915_READ(dp_priv->output_reg); |
709 | 710 | ||
710 | if (mode != DRM_MODE_DPMS_ON) { | 711 | if (mode != DRM_MODE_DPMS_ON) { |
711 | if (dp_reg & DP_PORT_EN) { | 712 | if (dp_reg & DP_PORT_EN) { |
712 | intel_dp_link_down(intel_output, dp_priv->DP); | 713 | intel_dp_link_down(intel_encoder, dp_priv->DP); |
713 | if (IS_eDP(intel_output)) | 714 | if (IS_eDP(intel_encoder)) |
714 | ironlake_edp_backlight_off(dev); | 715 | ironlake_edp_backlight_off(dev); |
715 | } | 716 | } |
716 | } else { | 717 | } else { |
717 | if (!(dp_reg & DP_PORT_EN)) { | 718 | if (!(dp_reg & DP_PORT_EN)) { |
718 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); | 719 | intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); |
719 | if (IS_eDP(intel_output)) | 720 | if (IS_eDP(intel_encoder)) |
720 | ironlake_edp_backlight_on(dev); | 721 | ironlake_edp_backlight_on(dev); |
721 | } | 722 | } |
722 | } | 723 | } |
@@ -728,12 +729,12 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | |||
728 | * link status information | 729 | * link status information |
729 | */ | 730 | */ |
730 | static bool | 731 | static bool |
731 | intel_dp_get_link_status(struct intel_output *intel_output, | 732 | intel_dp_get_link_status(struct intel_encoder *intel_encoder, |
732 | uint8_t link_status[DP_LINK_STATUS_SIZE]) | 733 | uint8_t link_status[DP_LINK_STATUS_SIZE]) |
733 | { | 734 | { |
734 | int ret; | 735 | int ret; |
735 | 736 | ||
736 | ret = intel_dp_aux_native_read(intel_output, | 737 | ret = intel_dp_aux_native_read(intel_encoder, |
737 | DP_LANE0_1_STATUS, | 738 | DP_LANE0_1_STATUS, |
738 | link_status, DP_LINK_STATUS_SIZE); | 739 | link_status, DP_LINK_STATUS_SIZE); |
739 | if (ret != DP_LINK_STATUS_SIZE) | 740 | if (ret != DP_LINK_STATUS_SIZE) |
@@ -751,13 +752,13 @@ intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE], | |||
751 | static void | 752 | static void |
752 | intel_dp_save(struct drm_connector *connector) | 753 | intel_dp_save(struct drm_connector *connector) |
753 | { | 754 | { |
754 | struct intel_output *intel_output = to_intel_output(connector); | 755 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
755 | struct drm_device *dev = intel_output->base.dev; | 756 | struct drm_device *dev = intel_encoder->base.dev; |
756 | struct drm_i915_private *dev_priv = dev->dev_private; | 757 | struct drm_i915_private *dev_priv = dev->dev_private; |
757 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 758 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
758 | 759 | ||
759 | dp_priv->save_DP = I915_READ(dp_priv->output_reg); | 760 | dp_priv->save_DP = I915_READ(dp_priv->output_reg); |
760 | intel_dp_aux_native_read(intel_output, DP_LINK_BW_SET, | 761 | intel_dp_aux_native_read(intel_encoder, DP_LINK_BW_SET, |
761 | dp_priv->save_link_configuration, | 762 | dp_priv->save_link_configuration, |
762 | sizeof (dp_priv->save_link_configuration)); | 763 | sizeof (dp_priv->save_link_configuration)); |
763 | } | 764 | } |
@@ -824,7 +825,7 @@ intel_dp_pre_emphasis_max(uint8_t voltage_swing) | |||
824 | } | 825 | } |
825 | 826 | ||
826 | static void | 827 | static void |
827 | intel_get_adjust_train(struct intel_output *intel_output, | 828 | intel_get_adjust_train(struct intel_encoder *intel_encoder, |
828 | uint8_t link_status[DP_LINK_STATUS_SIZE], | 829 | uint8_t link_status[DP_LINK_STATUS_SIZE], |
829 | int lane_count, | 830 | int lane_count, |
830 | uint8_t train_set[4]) | 831 | uint8_t train_set[4]) |
@@ -941,15 +942,15 @@ intel_channel_eq_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count) | |||
941 | } | 942 | } |
942 | 943 | ||
943 | static bool | 944 | static bool |
944 | intel_dp_set_link_train(struct intel_output *intel_output, | 945 | intel_dp_set_link_train(struct intel_encoder *intel_encoder, |
945 | uint32_t dp_reg_value, | 946 | uint32_t dp_reg_value, |
946 | uint8_t dp_train_pat, | 947 | uint8_t dp_train_pat, |
947 | uint8_t train_set[4], | 948 | uint8_t train_set[4], |
948 | bool first) | 949 | bool first) |
949 | { | 950 | { |
950 | struct drm_device *dev = intel_output->base.dev; | 951 | struct drm_device *dev = intel_encoder->base.dev; |
951 | struct drm_i915_private *dev_priv = dev->dev_private; | 952 | struct drm_i915_private *dev_priv = dev->dev_private; |
952 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 953 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
953 | int ret; | 954 | int ret; |
954 | 955 | ||
955 | I915_WRITE(dp_priv->output_reg, dp_reg_value); | 956 | I915_WRITE(dp_priv->output_reg, dp_reg_value); |
@@ -957,11 +958,11 @@ intel_dp_set_link_train(struct intel_output *intel_output, | |||
957 | if (first) | 958 | if (first) |
958 | intel_wait_for_vblank(dev); | 959 | intel_wait_for_vblank(dev); |
959 | 960 | ||
960 | intel_dp_aux_native_write_1(intel_output, | 961 | intel_dp_aux_native_write_1(intel_encoder, |
961 | DP_TRAINING_PATTERN_SET, | 962 | DP_TRAINING_PATTERN_SET, |
962 | dp_train_pat); | 963 | dp_train_pat); |
963 | 964 | ||
964 | ret = intel_dp_aux_native_write(intel_output, | 965 | ret = intel_dp_aux_native_write(intel_encoder, |
965 | DP_TRAINING_LANE0_SET, train_set, 4); | 966 | DP_TRAINING_LANE0_SET, train_set, 4); |
966 | if (ret != 4) | 967 | if (ret != 4) |
967 | return false; | 968 | return false; |
@@ -970,12 +971,12 @@ intel_dp_set_link_train(struct intel_output *intel_output, | |||
970 | } | 971 | } |
971 | 972 | ||
972 | static void | 973 | static void |
973 | intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | 974 | intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP, |
974 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]) | 975 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]) |
975 | { | 976 | { |
976 | struct drm_device *dev = intel_output->base.dev; | 977 | struct drm_device *dev = intel_encoder->base.dev; |
977 | struct drm_i915_private *dev_priv = dev->dev_private; | 978 | struct drm_i915_private *dev_priv = dev->dev_private; |
978 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 979 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
979 | uint8_t train_set[4]; | 980 | uint8_t train_set[4]; |
980 | uint8_t link_status[DP_LINK_STATUS_SIZE]; | 981 | uint8_t link_status[DP_LINK_STATUS_SIZE]; |
981 | int i; | 982 | int i; |
@@ -986,7 +987,7 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
986 | int tries; | 987 | int tries; |
987 | 988 | ||
988 | /* Write the link configuration data */ | 989 | /* Write the link configuration data */ |
989 | intel_dp_aux_native_write(intel_output, 0x100, | 990 | intel_dp_aux_native_write(intel_encoder, 0x100, |
990 | link_configuration, DP_LINK_CONFIGURATION_SIZE); | 991 | link_configuration, DP_LINK_CONFIGURATION_SIZE); |
991 | 992 | ||
992 | DP |= DP_PORT_EN; | 993 | DP |= DP_PORT_EN; |
@@ -1000,14 +1001,14 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
1000 | uint32_t signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count); | 1001 | uint32_t signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count); |
1001 | DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; | 1002 | DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; |
1002 | 1003 | ||
1003 | if (!intel_dp_set_link_train(intel_output, DP | DP_LINK_TRAIN_PAT_1, | 1004 | if (!intel_dp_set_link_train(intel_encoder, DP | DP_LINK_TRAIN_PAT_1, |
1004 | DP_TRAINING_PATTERN_1, train_set, first)) | 1005 | DP_TRAINING_PATTERN_1, train_set, first)) |
1005 | break; | 1006 | break; |
1006 | first = false; | 1007 | first = false; |
1007 | /* Set training pattern 1 */ | 1008 | /* Set training pattern 1 */ |
1008 | 1009 | ||
1009 | udelay(100); | 1010 | udelay(100); |
1010 | if (!intel_dp_get_link_status(intel_output, link_status)) | 1011 | if (!intel_dp_get_link_status(intel_encoder, link_status)) |
1011 | break; | 1012 | break; |
1012 | 1013 | ||
1013 | if (intel_clock_recovery_ok(link_status, dp_priv->lane_count)) { | 1014 | if (intel_clock_recovery_ok(link_status, dp_priv->lane_count)) { |
@@ -1032,7 +1033,7 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
1032 | voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; | 1033 | voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; |
1033 | 1034 | ||
1034 | /* Compute new train_set as requested by target */ | 1035 | /* Compute new train_set as requested by target */ |
1035 | intel_get_adjust_train(intel_output, link_status, dp_priv->lane_count, train_set); | 1036 | intel_get_adjust_train(intel_encoder, link_status, dp_priv->lane_count, train_set); |
1036 | } | 1037 | } |
1037 | 1038 | ||
1038 | /* channel equalization */ | 1039 | /* channel equalization */ |
@@ -1044,13 +1045,13 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
1044 | DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; | 1045 | DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; |
1045 | 1046 | ||
1046 | /* channel eq pattern */ | 1047 | /* channel eq pattern */ |
1047 | if (!intel_dp_set_link_train(intel_output, DP | DP_LINK_TRAIN_PAT_2, | 1048 | if (!intel_dp_set_link_train(intel_encoder, DP | DP_LINK_TRAIN_PAT_2, |
1048 | DP_TRAINING_PATTERN_2, train_set, | 1049 | DP_TRAINING_PATTERN_2, train_set, |
1049 | false)) | 1050 | false)) |
1050 | break; | 1051 | break; |
1051 | 1052 | ||
1052 | udelay(400); | 1053 | udelay(400); |
1053 | if (!intel_dp_get_link_status(intel_output, link_status)) | 1054 | if (!intel_dp_get_link_status(intel_encoder, link_status)) |
1054 | break; | 1055 | break; |
1055 | 1056 | ||
1056 | if (intel_channel_eq_ok(link_status, dp_priv->lane_count)) { | 1057 | if (intel_channel_eq_ok(link_status, dp_priv->lane_count)) { |
@@ -1063,26 +1064,26 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
1063 | break; | 1064 | break; |
1064 | 1065 | ||
1065 | /* Compute new train_set as requested by target */ | 1066 | /* Compute new train_set as requested by target */ |
1066 | intel_get_adjust_train(intel_output, link_status, dp_priv->lane_count, train_set); | 1067 | intel_get_adjust_train(intel_encoder, link_status, dp_priv->lane_count, train_set); |
1067 | ++tries; | 1068 | ++tries; |
1068 | } | 1069 | } |
1069 | 1070 | ||
1070 | I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_OFF); | 1071 | I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_OFF); |
1071 | POSTING_READ(dp_priv->output_reg); | 1072 | POSTING_READ(dp_priv->output_reg); |
1072 | intel_dp_aux_native_write_1(intel_output, | 1073 | intel_dp_aux_native_write_1(intel_encoder, |
1073 | DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE); | 1074 | DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE); |
1074 | } | 1075 | } |
1075 | 1076 | ||
1076 | static void | 1077 | static void |
1077 | intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | 1078 | intel_dp_link_down(struct intel_encoder *intel_encoder, uint32_t DP) |
1078 | { | 1079 | { |
1079 | struct drm_device *dev = intel_output->base.dev; | 1080 | struct drm_device *dev = intel_encoder->base.dev; |
1080 | struct drm_i915_private *dev_priv = dev->dev_private; | 1081 | struct drm_i915_private *dev_priv = dev->dev_private; |
1081 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1082 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1082 | 1083 | ||
1083 | DRM_DEBUG_KMS("\n"); | 1084 | DRM_DEBUG_KMS("\n"); |
1084 | 1085 | ||
1085 | if (IS_eDP(intel_output)) { | 1086 | if (IS_eDP(intel_encoder)) { |
1086 | DP &= ~DP_PLL_ENABLE; | 1087 | DP &= ~DP_PLL_ENABLE; |
1087 | I915_WRITE(dp_priv->output_reg, DP); | 1088 | I915_WRITE(dp_priv->output_reg, DP); |
1088 | POSTING_READ(dp_priv->output_reg); | 1089 | POSTING_READ(dp_priv->output_reg); |
@@ -1095,7 +1096,7 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | |||
1095 | 1096 | ||
1096 | udelay(17000); | 1097 | udelay(17000); |
1097 | 1098 | ||
1098 | if (IS_eDP(intel_output)) | 1099 | if (IS_eDP(intel_encoder)) |
1099 | DP |= DP_LINK_TRAIN_OFF; | 1100 | DP |= DP_LINK_TRAIN_OFF; |
1100 | I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN); | 1101 | I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN); |
1101 | POSTING_READ(dp_priv->output_reg); | 1102 | POSTING_READ(dp_priv->output_reg); |
@@ -1104,13 +1105,13 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | |||
1104 | static void | 1105 | static void |
1105 | intel_dp_restore(struct drm_connector *connector) | 1106 | intel_dp_restore(struct drm_connector *connector) |
1106 | { | 1107 | { |
1107 | struct intel_output *intel_output = to_intel_output(connector); | 1108 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1108 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1109 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1109 | 1110 | ||
1110 | if (dp_priv->save_DP & DP_PORT_EN) | 1111 | if (dp_priv->save_DP & DP_PORT_EN) |
1111 | intel_dp_link_train(intel_output, dp_priv->save_DP, dp_priv->save_link_configuration); | 1112 | intel_dp_link_train(intel_encoder, dp_priv->save_DP, dp_priv->save_link_configuration); |
1112 | else | 1113 | else |
1113 | intel_dp_link_down(intel_output, dp_priv->save_DP); | 1114 | intel_dp_link_down(intel_encoder, dp_priv->save_DP); |
1114 | } | 1115 | } |
1115 | 1116 | ||
1116 | /* | 1117 | /* |
@@ -1123,32 +1124,32 @@ intel_dp_restore(struct drm_connector *connector) | |||
1123 | */ | 1124 | */ |
1124 | 1125 | ||
1125 | static void | 1126 | static void |
1126 | intel_dp_check_link_status(struct intel_output *intel_output) | 1127 | intel_dp_check_link_status(struct intel_encoder *intel_encoder) |
1127 | { | 1128 | { |
1128 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1129 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1129 | uint8_t link_status[DP_LINK_STATUS_SIZE]; | 1130 | uint8_t link_status[DP_LINK_STATUS_SIZE]; |
1130 | 1131 | ||
1131 | if (!intel_output->enc.crtc) | 1132 | if (!intel_encoder->enc.crtc) |
1132 | return; | 1133 | return; |
1133 | 1134 | ||
1134 | if (!intel_dp_get_link_status(intel_output, link_status)) { | 1135 | if (!intel_dp_get_link_status(intel_encoder, link_status)) { |
1135 | intel_dp_link_down(intel_output, dp_priv->DP); | 1136 | intel_dp_link_down(intel_encoder, dp_priv->DP); |
1136 | return; | 1137 | return; |
1137 | } | 1138 | } |
1138 | 1139 | ||
1139 | if (!intel_channel_eq_ok(link_status, dp_priv->lane_count)) | 1140 | if (!intel_channel_eq_ok(link_status, dp_priv->lane_count)) |
1140 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); | 1141 | intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); |
1141 | } | 1142 | } |
1142 | 1143 | ||
1143 | static enum drm_connector_status | 1144 | static enum drm_connector_status |
1144 | ironlake_dp_detect(struct drm_connector *connector) | 1145 | ironlake_dp_detect(struct drm_connector *connector) |
1145 | { | 1146 | { |
1146 | struct intel_output *intel_output = to_intel_output(connector); | 1147 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1147 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1148 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1148 | enum drm_connector_status status; | 1149 | enum drm_connector_status status; |
1149 | 1150 | ||
1150 | status = connector_status_disconnected; | 1151 | status = connector_status_disconnected; |
1151 | if (intel_dp_aux_native_read(intel_output, | 1152 | if (intel_dp_aux_native_read(intel_encoder, |
1152 | 0x000, dp_priv->dpcd, | 1153 | 0x000, dp_priv->dpcd, |
1153 | sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) | 1154 | sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) |
1154 | { | 1155 | { |
@@ -1167,10 +1168,10 @@ ironlake_dp_detect(struct drm_connector *connector) | |||
1167 | static enum drm_connector_status | 1168 | static enum drm_connector_status |
1168 | intel_dp_detect(struct drm_connector *connector) | 1169 | intel_dp_detect(struct drm_connector *connector) |
1169 | { | 1170 | { |
1170 | struct intel_output *intel_output = to_intel_output(connector); | 1171 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1171 | struct drm_device *dev = intel_output->base.dev; | 1172 | struct drm_device *dev = intel_encoder->base.dev; |
1172 | struct drm_i915_private *dev_priv = dev->dev_private; | 1173 | struct drm_i915_private *dev_priv = dev->dev_private; |
1173 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1174 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1174 | uint32_t temp, bit; | 1175 | uint32_t temp, bit; |
1175 | enum drm_connector_status status; | 1176 | enum drm_connector_status status; |
1176 | 1177 | ||
@@ -1209,7 +1210,7 @@ intel_dp_detect(struct drm_connector *connector) | |||
1209 | return connector_status_disconnected; | 1210 | return connector_status_disconnected; |
1210 | 1211 | ||
1211 | status = connector_status_disconnected; | 1212 | status = connector_status_disconnected; |
1212 | if (intel_dp_aux_native_read(intel_output, | 1213 | if (intel_dp_aux_native_read(intel_encoder, |
1213 | 0x000, dp_priv->dpcd, | 1214 | 0x000, dp_priv->dpcd, |
1214 | sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) | 1215 | sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) |
1215 | { | 1216 | { |
@@ -1221,20 +1222,20 @@ intel_dp_detect(struct drm_connector *connector) | |||
1221 | 1222 | ||
1222 | static int intel_dp_get_modes(struct drm_connector *connector) | 1223 | static int intel_dp_get_modes(struct drm_connector *connector) |
1223 | { | 1224 | { |
1224 | struct intel_output *intel_output = to_intel_output(connector); | 1225 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1225 | struct drm_device *dev = intel_output->base.dev; | 1226 | struct drm_device *dev = intel_encoder->base.dev; |
1226 | struct drm_i915_private *dev_priv = dev->dev_private; | 1227 | struct drm_i915_private *dev_priv = dev->dev_private; |
1227 | int ret; | 1228 | int ret; |
1228 | 1229 | ||
1229 | /* We should parse the EDID data and find out if it has an audio sink | 1230 | /* We should parse the EDID data and find out if it has an audio sink |
1230 | */ | 1231 | */ |
1231 | 1232 | ||
1232 | ret = intel_ddc_get_modes(intel_output); | 1233 | ret = intel_ddc_get_modes(intel_encoder); |
1233 | if (ret) | 1234 | if (ret) |
1234 | return ret; | 1235 | return ret; |
1235 | 1236 | ||
1236 | /* if eDP has no EDID, try to use fixed panel mode from VBT */ | 1237 | /* if eDP has no EDID, try to use fixed panel mode from VBT */ |
1237 | if (IS_eDP(intel_output)) { | 1238 | if (IS_eDP(intel_encoder)) { |
1238 | if (dev_priv->panel_fixed_mode != NULL) { | 1239 | if (dev_priv->panel_fixed_mode != NULL) { |
1239 | struct drm_display_mode *mode; | 1240 | struct drm_display_mode *mode; |
1240 | mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); | 1241 | mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); |
@@ -1248,13 +1249,13 @@ static int intel_dp_get_modes(struct drm_connector *connector) | |||
1248 | static void | 1249 | static void |
1249 | intel_dp_destroy (struct drm_connector *connector) | 1250 | intel_dp_destroy (struct drm_connector *connector) |
1250 | { | 1251 | { |
1251 | struct intel_output *intel_output = to_intel_output(connector); | 1252 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1252 | 1253 | ||
1253 | if (intel_output->i2c_bus) | 1254 | if (intel_encoder->i2c_bus) |
1254 | intel_i2c_destroy(intel_output->i2c_bus); | 1255 | intel_i2c_destroy(intel_encoder->i2c_bus); |
1255 | drm_sysfs_connector_remove(connector); | 1256 | drm_sysfs_connector_remove(connector); |
1256 | drm_connector_cleanup(connector); | 1257 | drm_connector_cleanup(connector); |
1257 | kfree(intel_output); | 1258 | kfree(intel_encoder); |
1258 | } | 1259 | } |
1259 | 1260 | ||
1260 | static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = { | 1261 | static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = { |
@@ -1290,12 +1291,12 @@ static const struct drm_encoder_funcs intel_dp_enc_funcs = { | |||
1290 | }; | 1291 | }; |
1291 | 1292 | ||
1292 | void | 1293 | void |
1293 | intel_dp_hot_plug(struct intel_output *intel_output) | 1294 | intel_dp_hot_plug(struct intel_encoder *intel_encoder) |
1294 | { | 1295 | { |
1295 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1296 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1296 | 1297 | ||
1297 | if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) | 1298 | if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) |
1298 | intel_dp_check_link_status(intel_output); | 1299 | intel_dp_check_link_status(intel_encoder); |
1299 | } | 1300 | } |
1300 | 1301 | ||
1301 | void | 1302 | void |
@@ -1303,53 +1304,53 @@ intel_dp_init(struct drm_device *dev, int output_reg) | |||
1303 | { | 1304 | { |
1304 | struct drm_i915_private *dev_priv = dev->dev_private; | 1305 | struct drm_i915_private *dev_priv = dev->dev_private; |
1305 | struct drm_connector *connector; | 1306 | struct drm_connector *connector; |
1306 | struct intel_output *intel_output; | 1307 | struct intel_encoder *intel_encoder; |
1307 | struct intel_dp_priv *dp_priv; | 1308 | struct intel_dp_priv *dp_priv; |
1308 | const char *name = NULL; | 1309 | const char *name = NULL; |
1309 | 1310 | ||
1310 | intel_output = kcalloc(sizeof(struct intel_output) + | 1311 | intel_encoder = kcalloc(sizeof(struct intel_encoder) + |
1311 | sizeof(struct intel_dp_priv), 1, GFP_KERNEL); | 1312 | sizeof(struct intel_dp_priv), 1, GFP_KERNEL); |
1312 | if (!intel_output) | 1313 | if (!intel_encoder) |
1313 | return; | 1314 | return; |
1314 | 1315 | ||
1315 | dp_priv = (struct intel_dp_priv *)(intel_output + 1); | 1316 | dp_priv = (struct intel_dp_priv *)(intel_encoder + 1); |
1316 | 1317 | ||
1317 | connector = &intel_output->base; | 1318 | connector = &intel_encoder->base; |
1318 | drm_connector_init(dev, connector, &intel_dp_connector_funcs, | 1319 | drm_connector_init(dev, connector, &intel_dp_connector_funcs, |
1319 | DRM_MODE_CONNECTOR_DisplayPort); | 1320 | DRM_MODE_CONNECTOR_DisplayPort); |
1320 | drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); | 1321 | drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); |
1321 | 1322 | ||
1322 | if (output_reg == DP_A) | 1323 | if (output_reg == DP_A) |
1323 | intel_output->type = INTEL_OUTPUT_EDP; | 1324 | intel_encoder->type = INTEL_OUTPUT_EDP; |
1324 | else | 1325 | else |
1325 | intel_output->type = INTEL_OUTPUT_DISPLAYPORT; | 1326 | intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT; |
1326 | 1327 | ||
1327 | if (output_reg == DP_B || output_reg == PCH_DP_B) | 1328 | if (output_reg == DP_B || output_reg == PCH_DP_B) |
1328 | intel_output->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); | 1329 | intel_encoder->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); |
1329 | else if (output_reg == DP_C || output_reg == PCH_DP_C) | 1330 | else if (output_reg == DP_C || output_reg == PCH_DP_C) |
1330 | intel_output->clone_mask = (1 << INTEL_DP_C_CLONE_BIT); | 1331 | intel_encoder->clone_mask = (1 << INTEL_DP_C_CLONE_BIT); |
1331 | else if (output_reg == DP_D || output_reg == PCH_DP_D) | 1332 | else if (output_reg == DP_D || output_reg == PCH_DP_D) |
1332 | intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); | 1333 | intel_encoder->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); |
1333 | 1334 | ||
1334 | if (IS_eDP(intel_output)) | 1335 | if (IS_eDP(intel_encoder)) |
1335 | intel_output->clone_mask = (1 << INTEL_EDP_CLONE_BIT); | 1336 | intel_encoder->clone_mask = (1 << INTEL_EDP_CLONE_BIT); |
1336 | 1337 | ||
1337 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 1338 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
1338 | connector->interlace_allowed = true; | 1339 | connector->interlace_allowed = true; |
1339 | connector->doublescan_allowed = 0; | 1340 | connector->doublescan_allowed = 0; |
1340 | 1341 | ||
1341 | dp_priv->intel_output = intel_output; | 1342 | dp_priv->intel_encoder = intel_encoder; |
1342 | dp_priv->output_reg = output_reg; | 1343 | dp_priv->output_reg = output_reg; |
1343 | dp_priv->has_audio = false; | 1344 | dp_priv->has_audio = false; |
1344 | dp_priv->dpms_mode = DRM_MODE_DPMS_ON; | 1345 | dp_priv->dpms_mode = DRM_MODE_DPMS_ON; |
1345 | intel_output->dev_priv = dp_priv; | 1346 | intel_encoder->dev_priv = dp_priv; |
1346 | 1347 | ||
1347 | drm_encoder_init(dev, &intel_output->enc, &intel_dp_enc_funcs, | 1348 | drm_encoder_init(dev, &intel_encoder->enc, &intel_dp_enc_funcs, |
1348 | DRM_MODE_ENCODER_TMDS); | 1349 | DRM_MODE_ENCODER_TMDS); |
1349 | drm_encoder_helper_add(&intel_output->enc, &intel_dp_helper_funcs); | 1350 | drm_encoder_helper_add(&intel_encoder->enc, &intel_dp_helper_funcs); |
1350 | 1351 | ||
1351 | drm_mode_connector_attach_encoder(&intel_output->base, | 1352 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
1352 | &intel_output->enc); | 1353 | &intel_encoder->enc); |
1353 | drm_sysfs_connector_add(connector); | 1354 | drm_sysfs_connector_add(connector); |
1354 | 1355 | ||
1355 | /* Set up the DDC bus. */ | 1356 | /* Set up the DDC bus. */ |
@@ -1377,10 +1378,10 @@ intel_dp_init(struct drm_device *dev, int output_reg) | |||
1377 | break; | 1378 | break; |
1378 | } | 1379 | } |
1379 | 1380 | ||
1380 | intel_dp_i2c_init(intel_output, name); | 1381 | intel_dp_i2c_init(intel_encoder, name); |
1381 | 1382 | ||
1382 | intel_output->ddc_bus = &dp_priv->adapter; | 1383 | intel_encoder->ddc_bus = &dp_priv->adapter; |
1383 | intel_output->hot_plug = intel_dp_hot_plug; | 1384 | intel_encoder->hot_plug = intel_dp_hot_plug; |
1384 | 1385 | ||
1385 | if (output_reg == DP_A) { | 1386 | if (output_reg == DP_A) { |
1386 | /* initialize panel mode from VBT if available for eDP */ | 1387 | /* initialize panel mode from VBT if available for eDP */ |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 3a467ca57857..e30253755f12 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -95,7 +95,7 @@ struct intel_framebuffer { | |||
95 | }; | 95 | }; |
96 | 96 | ||
97 | 97 | ||
98 | struct intel_output { | 98 | struct intel_encoder { |
99 | struct drm_connector base; | 99 | struct drm_connector base; |
100 | 100 | ||
101 | struct drm_encoder enc; | 101 | struct drm_encoder enc; |
@@ -105,7 +105,7 @@ struct intel_output { | |||
105 | bool load_detect_temp; | 105 | bool load_detect_temp; |
106 | bool needs_tv_clock; | 106 | bool needs_tv_clock; |
107 | void *dev_priv; | 107 | void *dev_priv; |
108 | void (*hot_plug)(struct intel_output *); | 108 | void (*hot_plug)(struct intel_encoder *); |
109 | int crtc_mask; | 109 | int crtc_mask; |
110 | int clone_mask; | 110 | int clone_mask; |
111 | }; | 111 | }; |
@@ -152,15 +152,15 @@ struct intel_crtc { | |||
152 | }; | 152 | }; |
153 | 153 | ||
154 | #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) | 154 | #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) |
155 | #define to_intel_output(x) container_of(x, struct intel_output, base) | 155 | #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) |
156 | #define enc_to_intel_output(x) container_of(x, struct intel_output, enc) | 156 | #define enc_to_intel_encoder(x) container_of(x, struct intel_encoder, enc) |
157 | #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) | 157 | #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) |
158 | 158 | ||
159 | struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg, | 159 | struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg, |
160 | const char *name); | 160 | const char *name); |
161 | void intel_i2c_destroy(struct i2c_adapter *adapter); | 161 | void intel_i2c_destroy(struct i2c_adapter *adapter); |
162 | int intel_ddc_get_modes(struct intel_output *intel_output); | 162 | int intel_ddc_get_modes(struct intel_encoder *intel_encoder); |
163 | extern bool intel_ddc_probe(struct intel_output *intel_output); | 163 | extern bool intel_ddc_probe(struct intel_encoder *intel_encoder); |
164 | void intel_i2c_quirk_set(struct drm_device *dev, bool enable); | 164 | void intel_i2c_quirk_set(struct drm_device *dev, bool enable); |
165 | void intel_i2c_reset_gmbus(struct drm_device *dev); | 165 | void intel_i2c_reset_gmbus(struct drm_device *dev); |
166 | 166 | ||
@@ -175,7 +175,7 @@ extern void intel_dp_init(struct drm_device *dev, int dp_reg); | |||
175 | void | 175 | void |
176 | intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | 176 | intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, |
177 | struct drm_display_mode *adjusted_mode); | 177 | struct drm_display_mode *adjusted_mode); |
178 | extern void intel_edp_link_config (struct intel_output *, int *, int *); | 178 | extern void intel_edp_link_config (struct intel_encoder *, int *, int *); |
179 | 179 | ||
180 | 180 | ||
181 | extern int intel_panel_fitter_pipe (struct drm_device *dev); | 181 | extern int intel_panel_fitter_pipe (struct drm_device *dev); |
@@ -191,10 +191,10 @@ int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, | |||
191 | struct drm_file *file_priv); | 191 | struct drm_file *file_priv); |
192 | extern void intel_wait_for_vblank(struct drm_device *dev); | 192 | extern void intel_wait_for_vblank(struct drm_device *dev); |
193 | extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe); | 193 | extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe); |
194 | extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | 194 | extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_encoder *intel_encoder, |
195 | struct drm_display_mode *mode, | 195 | struct drm_display_mode *mode, |
196 | int *dpms_mode); | 196 | int *dpms_mode); |
197 | extern void intel_release_load_detect_pipe(struct intel_output *intel_output, | 197 | extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, |
198 | int dpms_mode); | 198 | int dpms_mode); |
199 | 199 | ||
200 | extern struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB); | 200 | extern struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB); |
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index a4d2606de778..ebf213c96b9c 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c | |||
@@ -25,6 +25,7 @@ | |||
25 | * Eric Anholt <eric@anholt.net> | 25 | * Eric Anholt <eric@anholt.net> |
26 | */ | 26 | */ |
27 | #include <linux/i2c.h> | 27 | #include <linux/i2c.h> |
28 | #include <linux/slab.h> | ||
28 | #include "drmP.h" | 29 | #include "drmP.h" |
29 | #include "drm.h" | 30 | #include "drm.h" |
30 | #include "drm_crtc.h" | 31 | #include "drm_crtc.h" |
@@ -79,8 +80,8 @@ static struct intel_dvo_device intel_dvo_devices[] = { | |||
79 | static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) | 80 | static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) |
80 | { | 81 | { |
81 | struct drm_i915_private *dev_priv = encoder->dev->dev_private; | 82 | struct drm_i915_private *dev_priv = encoder->dev->dev_private; |
82 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 83 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
83 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 84 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
84 | u32 dvo_reg = dvo->dvo_reg; | 85 | u32 dvo_reg = dvo->dvo_reg; |
85 | u32 temp = I915_READ(dvo_reg); | 86 | u32 temp = I915_READ(dvo_reg); |
86 | 87 | ||
@@ -98,8 +99,8 @@ static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) | |||
98 | static void intel_dvo_save(struct drm_connector *connector) | 99 | static void intel_dvo_save(struct drm_connector *connector) |
99 | { | 100 | { |
100 | struct drm_i915_private *dev_priv = connector->dev->dev_private; | 101 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
101 | struct intel_output *intel_output = to_intel_output(connector); | 102 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
102 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 103 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
103 | 104 | ||
104 | /* Each output should probably just save the registers it touches, | 105 | /* Each output should probably just save the registers it touches, |
105 | * but for now, use more overkill. | 106 | * but for now, use more overkill. |
@@ -114,8 +115,8 @@ static void intel_dvo_save(struct drm_connector *connector) | |||
114 | static void intel_dvo_restore(struct drm_connector *connector) | 115 | static void intel_dvo_restore(struct drm_connector *connector) |
115 | { | 116 | { |
116 | struct drm_i915_private *dev_priv = connector->dev->dev_private; | 117 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
117 | struct intel_output *intel_output = to_intel_output(connector); | 118 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
118 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 119 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
119 | 120 | ||
120 | dvo->dev_ops->restore(dvo); | 121 | dvo->dev_ops->restore(dvo); |
121 | 122 | ||
@@ -127,8 +128,8 @@ static void intel_dvo_restore(struct drm_connector *connector) | |||
127 | static int intel_dvo_mode_valid(struct drm_connector *connector, | 128 | static int intel_dvo_mode_valid(struct drm_connector *connector, |
128 | struct drm_display_mode *mode) | 129 | struct drm_display_mode *mode) |
129 | { | 130 | { |
130 | struct intel_output *intel_output = to_intel_output(connector); | 131 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
131 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 132 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
132 | 133 | ||
133 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | 134 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
134 | return MODE_NO_DBLESCAN; | 135 | return MODE_NO_DBLESCAN; |
@@ -149,8 +150,8 @@ static bool intel_dvo_mode_fixup(struct drm_encoder *encoder, | |||
149 | struct drm_display_mode *mode, | 150 | struct drm_display_mode *mode, |
150 | struct drm_display_mode *adjusted_mode) | 151 | struct drm_display_mode *adjusted_mode) |
151 | { | 152 | { |
152 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 153 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
153 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 154 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
154 | 155 | ||
155 | /* If we have timings from the BIOS for the panel, put them in | 156 | /* If we have timings from the BIOS for the panel, put them in |
156 | * to the adjusted mode. The CRTC will be set up for this mode, | 157 | * to the adjusted mode. The CRTC will be set up for this mode, |
@@ -185,8 +186,8 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder, | |||
185 | struct drm_device *dev = encoder->dev; | 186 | struct drm_device *dev = encoder->dev; |
186 | struct drm_i915_private *dev_priv = dev->dev_private; | 187 | struct drm_i915_private *dev_priv = dev->dev_private; |
187 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); | 188 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
188 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 189 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
189 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 190 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
190 | int pipe = intel_crtc->pipe; | 191 | int pipe = intel_crtc->pipe; |
191 | u32 dvo_val; | 192 | u32 dvo_val; |
192 | u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg; | 193 | u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg; |
@@ -240,23 +241,23 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder, | |||
240 | */ | 241 | */ |
241 | static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector) | 242 | static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector) |
242 | { | 243 | { |
243 | struct intel_output *intel_output = to_intel_output(connector); | 244 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
244 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 245 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
245 | 246 | ||
246 | return dvo->dev_ops->detect(dvo); | 247 | return dvo->dev_ops->detect(dvo); |
247 | } | 248 | } |
248 | 249 | ||
249 | static int intel_dvo_get_modes(struct drm_connector *connector) | 250 | static int intel_dvo_get_modes(struct drm_connector *connector) |
250 | { | 251 | { |
251 | struct intel_output *intel_output = to_intel_output(connector); | 252 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
252 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 253 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
253 | 254 | ||
254 | /* We should probably have an i2c driver get_modes function for those | 255 | /* We should probably have an i2c driver get_modes function for those |
255 | * devices which will have a fixed set of modes determined by the chip | 256 | * devices which will have a fixed set of modes determined by the chip |
256 | * (TV-out, for example), but for now with just TMDS and LVDS, | 257 | * (TV-out, for example), but for now with just TMDS and LVDS, |
257 | * that's not the case. | 258 | * that's not the case. |
258 | */ | 259 | */ |
259 | intel_ddc_get_modes(intel_output); | 260 | intel_ddc_get_modes(intel_encoder); |
260 | if (!list_empty(&connector->probed_modes)) | 261 | if (!list_empty(&connector->probed_modes)) |
261 | return 1; | 262 | return 1; |
262 | 263 | ||
@@ -274,8 +275,8 @@ static int intel_dvo_get_modes(struct drm_connector *connector) | |||
274 | 275 | ||
275 | static void intel_dvo_destroy (struct drm_connector *connector) | 276 | static void intel_dvo_destroy (struct drm_connector *connector) |
276 | { | 277 | { |
277 | struct intel_output *intel_output = to_intel_output(connector); | 278 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
278 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 279 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
279 | 280 | ||
280 | if (dvo) { | 281 | if (dvo) { |
281 | if (dvo->dev_ops->destroy) | 282 | if (dvo->dev_ops->destroy) |
@@ -285,13 +286,13 @@ static void intel_dvo_destroy (struct drm_connector *connector) | |||
285 | /* no need, in i830_dvoices[] now */ | 286 | /* no need, in i830_dvoices[] now */ |
286 | //kfree(dvo); | 287 | //kfree(dvo); |
287 | } | 288 | } |
288 | if (intel_output->i2c_bus) | 289 | if (intel_encoder->i2c_bus) |
289 | intel_i2c_destroy(intel_output->i2c_bus); | 290 | intel_i2c_destroy(intel_encoder->i2c_bus); |
290 | if (intel_output->ddc_bus) | 291 | if (intel_encoder->ddc_bus) |
291 | intel_i2c_destroy(intel_output->ddc_bus); | 292 | intel_i2c_destroy(intel_encoder->ddc_bus); |
292 | drm_sysfs_connector_remove(connector); | 293 | drm_sysfs_connector_remove(connector); |
293 | drm_connector_cleanup(connector); | 294 | drm_connector_cleanup(connector); |
294 | kfree(intel_output); | 295 | kfree(intel_encoder); |
295 | } | 296 | } |
296 | 297 | ||
297 | #ifdef RANDR_GET_CRTC_INTERFACE | 298 | #ifdef RANDR_GET_CRTC_INTERFACE |
@@ -299,8 +300,8 @@ static struct drm_crtc *intel_dvo_get_crtc(struct drm_connector *connector) | |||
299 | { | 300 | { |
300 | struct drm_device *dev = connector->dev; | 301 | struct drm_device *dev = connector->dev; |
301 | struct drm_i915_private *dev_priv = dev->dev_private; | 302 | struct drm_i915_private *dev_priv = dev->dev_private; |
302 | struct intel_output *intel_output = to_intel_output(connector); | 303 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
303 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 304 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
304 | int pipe = !!(I915_READ(dvo->dvo_reg) & SDVO_PIPE_B_SELECT); | 305 | int pipe = !!(I915_READ(dvo->dvo_reg) & SDVO_PIPE_B_SELECT); |
305 | 306 | ||
306 | return intel_pipe_to_crtc(pScrn, pipe); | 307 | return intel_pipe_to_crtc(pScrn, pipe); |
@@ -351,8 +352,8 @@ intel_dvo_get_current_mode (struct drm_connector *connector) | |||
351 | { | 352 | { |
352 | struct drm_device *dev = connector->dev; | 353 | struct drm_device *dev = connector->dev; |
353 | struct drm_i915_private *dev_priv = dev->dev_private; | 354 | struct drm_i915_private *dev_priv = dev->dev_private; |
354 | struct intel_output *intel_output = to_intel_output(connector); | 355 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
355 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 356 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
356 | uint32_t dvo_reg = dvo->dvo_reg; | 357 | uint32_t dvo_reg = dvo->dvo_reg; |
357 | uint32_t dvo_val = I915_READ(dvo_reg); | 358 | uint32_t dvo_val = I915_READ(dvo_reg); |
358 | struct drm_display_mode *mode = NULL; | 359 | struct drm_display_mode *mode = NULL; |
@@ -382,24 +383,24 @@ intel_dvo_get_current_mode (struct drm_connector *connector) | |||
382 | 383 | ||
383 | void intel_dvo_init(struct drm_device *dev) | 384 | void intel_dvo_init(struct drm_device *dev) |
384 | { | 385 | { |
385 | struct intel_output *intel_output; | 386 | struct intel_encoder *intel_encoder; |
386 | struct intel_dvo_device *dvo; | 387 | struct intel_dvo_device *dvo; |
387 | struct i2c_adapter *i2cbus = NULL; | 388 | struct i2c_adapter *i2cbus = NULL; |
388 | int ret = 0; | 389 | int ret = 0; |
389 | int i; | 390 | int i; |
390 | int encoder_type = DRM_MODE_ENCODER_NONE; | 391 | int encoder_type = DRM_MODE_ENCODER_NONE; |
391 | intel_output = kzalloc (sizeof(struct intel_output), GFP_KERNEL); | 392 | intel_encoder = kzalloc (sizeof(struct intel_encoder), GFP_KERNEL); |
392 | if (!intel_output) | 393 | if (!intel_encoder) |
393 | return; | 394 | return; |
394 | 395 | ||
395 | /* Set up the DDC bus */ | 396 | /* Set up the DDC bus */ |
396 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D"); | 397 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D"); |
397 | if (!intel_output->ddc_bus) | 398 | if (!intel_encoder->ddc_bus) |
398 | goto free_intel; | 399 | goto free_intel; |
399 | 400 | ||
400 | /* Now, try to find a controller */ | 401 | /* Now, try to find a controller */ |
401 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { | 402 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { |
402 | struct drm_connector *connector = &intel_output->base; | 403 | struct drm_connector *connector = &intel_encoder->base; |
403 | int gpio; | 404 | int gpio; |
404 | 405 | ||
405 | dvo = &intel_dvo_devices[i]; | 406 | dvo = &intel_dvo_devices[i]; |
@@ -434,11 +435,11 @@ void intel_dvo_init(struct drm_device *dev) | |||
434 | if (!ret) | 435 | if (!ret) |
435 | continue; | 436 | continue; |
436 | 437 | ||
437 | intel_output->type = INTEL_OUTPUT_DVO; | 438 | intel_encoder->type = INTEL_OUTPUT_DVO; |
438 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 439 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
439 | switch (dvo->type) { | 440 | switch (dvo->type) { |
440 | case INTEL_DVO_CHIP_TMDS: | 441 | case INTEL_DVO_CHIP_TMDS: |
441 | intel_output->clone_mask = | 442 | intel_encoder->clone_mask = |
442 | (1 << INTEL_DVO_TMDS_CLONE_BIT) | | 443 | (1 << INTEL_DVO_TMDS_CLONE_BIT) | |
443 | (1 << INTEL_ANALOG_CLONE_BIT); | 444 | (1 << INTEL_ANALOG_CLONE_BIT); |
444 | drm_connector_init(dev, connector, | 445 | drm_connector_init(dev, connector, |
@@ -447,7 +448,7 @@ void intel_dvo_init(struct drm_device *dev) | |||
447 | encoder_type = DRM_MODE_ENCODER_TMDS; | 448 | encoder_type = DRM_MODE_ENCODER_TMDS; |
448 | break; | 449 | break; |
449 | case INTEL_DVO_CHIP_LVDS: | 450 | case INTEL_DVO_CHIP_LVDS: |
450 | intel_output->clone_mask = | 451 | intel_encoder->clone_mask = |
451 | (1 << INTEL_DVO_LVDS_CLONE_BIT); | 452 | (1 << INTEL_DVO_LVDS_CLONE_BIT); |
452 | drm_connector_init(dev, connector, | 453 | drm_connector_init(dev, connector, |
453 | &intel_dvo_connector_funcs, | 454 | &intel_dvo_connector_funcs, |
@@ -462,16 +463,16 @@ void intel_dvo_init(struct drm_device *dev) | |||
462 | connector->interlace_allowed = false; | 463 | connector->interlace_allowed = false; |
463 | connector->doublescan_allowed = false; | 464 | connector->doublescan_allowed = false; |
464 | 465 | ||
465 | intel_output->dev_priv = dvo; | 466 | intel_encoder->dev_priv = dvo; |
466 | intel_output->i2c_bus = i2cbus; | 467 | intel_encoder->i2c_bus = i2cbus; |
467 | 468 | ||
468 | drm_encoder_init(dev, &intel_output->enc, | 469 | drm_encoder_init(dev, &intel_encoder->enc, |
469 | &intel_dvo_enc_funcs, encoder_type); | 470 | &intel_dvo_enc_funcs, encoder_type); |
470 | drm_encoder_helper_add(&intel_output->enc, | 471 | drm_encoder_helper_add(&intel_encoder->enc, |
471 | &intel_dvo_helper_funcs); | 472 | &intel_dvo_helper_funcs); |
472 | 473 | ||
473 | drm_mode_connector_attach_encoder(&intel_output->base, | 474 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
474 | &intel_output->enc); | 475 | &intel_encoder->enc); |
475 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { | 476 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { |
476 | /* For our LVDS chipsets, we should hopefully be able | 477 | /* For our LVDS chipsets, we should hopefully be able |
477 | * to dig the fixed panel mode out of the BIOS data. | 478 | * to dig the fixed panel mode out of the BIOS data. |
@@ -489,10 +490,10 @@ void intel_dvo_init(struct drm_device *dev) | |||
489 | return; | 490 | return; |
490 | } | 491 | } |
491 | 492 | ||
492 | intel_i2c_destroy(intel_output->ddc_bus); | 493 | intel_i2c_destroy(intel_encoder->ddc_bus); |
493 | /* Didn't find a chip, so tear down. */ | 494 | /* Didn't find a chip, so tear down. */ |
494 | if (i2cbus != NULL) | 495 | if (i2cbus != NULL) |
495 | intel_i2c_destroy(i2cbus); | 496 | intel_i2c_destroy(i2cbus); |
496 | free_intel: | 497 | free_intel: |
497 | kfree(intel_output); | 498 | kfree(intel_encoder); |
498 | } | 499 | } |
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c index 8cd791dc5b29..8a0b3bcdc7b1 100644 --- a/drivers/gpu/drm/i915/intel_fb.c +++ b/drivers/gpu/drm/i915/intel_fb.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <linux/string.h> | 30 | #include <linux/string.h> |
31 | #include <linux/mm.h> | 31 | #include <linux/mm.h> |
32 | #include <linux/tty.h> | 32 | #include <linux/tty.h> |
33 | #include <linux/slab.h> | ||
34 | #include <linux/sysrq.h> | 33 | #include <linux/sysrq.h> |
35 | #include <linux/delay.h> | 34 | #include <linux/delay.h> |
36 | #include <linux/fb.h> | 35 | #include <linux/fb.h> |
@@ -145,7 +144,7 @@ static int intelfb_create(struct drm_device *dev, uint32_t fb_width, | |||
145 | ret = -ENOMEM; | 144 | ret = -ENOMEM; |
146 | goto out; | 145 | goto out; |
147 | } | 146 | } |
148 | obj_priv = fbo->driver_private; | 147 | obj_priv = to_intel_bo(fbo); |
149 | 148 | ||
150 | mutex_lock(&dev->struct_mutex); | 149 | mutex_lock(&dev->struct_mutex); |
151 | 150 | ||
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index a30f8bfc1985..48cade0cf7b1 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -27,6 +27,7 @@ | |||
27 | */ | 27 | */ |
28 | 28 | ||
29 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
30 | #include <linux/slab.h> | ||
30 | #include <linux/delay.h> | 31 | #include <linux/delay.h> |
31 | #include "drmP.h" | 32 | #include "drmP.h" |
32 | #include "drm.h" | 33 | #include "drm.h" |
@@ -50,8 +51,8 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder, | |||
50 | struct drm_i915_private *dev_priv = dev->dev_private; | 51 | struct drm_i915_private *dev_priv = dev->dev_private; |
51 | struct drm_crtc *crtc = encoder->crtc; | 52 | struct drm_crtc *crtc = encoder->crtc; |
52 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 53 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
53 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 54 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
54 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 55 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
55 | u32 sdvox; | 56 | u32 sdvox; |
56 | 57 | ||
57 | sdvox = SDVO_ENCODING_HDMI | | 58 | sdvox = SDVO_ENCODING_HDMI | |
@@ -73,8 +74,8 @@ static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) | |||
73 | { | 74 | { |
74 | struct drm_device *dev = encoder->dev; | 75 | struct drm_device *dev = encoder->dev; |
75 | struct drm_i915_private *dev_priv = dev->dev_private; | 76 | struct drm_i915_private *dev_priv = dev->dev_private; |
76 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 77 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
77 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 78 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
78 | u32 temp; | 79 | u32 temp; |
79 | 80 | ||
80 | temp = I915_READ(hdmi_priv->sdvox_reg); | 81 | temp = I915_READ(hdmi_priv->sdvox_reg); |
@@ -109,8 +110,8 @@ static void intel_hdmi_save(struct drm_connector *connector) | |||
109 | { | 110 | { |
110 | struct drm_device *dev = connector->dev; | 111 | struct drm_device *dev = connector->dev; |
111 | struct drm_i915_private *dev_priv = dev->dev_private; | 112 | struct drm_i915_private *dev_priv = dev->dev_private; |
112 | struct intel_output *intel_output = to_intel_output(connector); | 113 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
113 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 114 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
114 | 115 | ||
115 | hdmi_priv->save_SDVOX = I915_READ(hdmi_priv->sdvox_reg); | 116 | hdmi_priv->save_SDVOX = I915_READ(hdmi_priv->sdvox_reg); |
116 | } | 117 | } |
@@ -119,8 +120,8 @@ static void intel_hdmi_restore(struct drm_connector *connector) | |||
119 | { | 120 | { |
120 | struct drm_device *dev = connector->dev; | 121 | struct drm_device *dev = connector->dev; |
121 | struct drm_i915_private *dev_priv = dev->dev_private; | 122 | struct drm_i915_private *dev_priv = dev->dev_private; |
122 | struct intel_output *intel_output = to_intel_output(connector); | 123 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
123 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 124 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
124 | 125 | ||
125 | I915_WRITE(hdmi_priv->sdvox_reg, hdmi_priv->save_SDVOX); | 126 | I915_WRITE(hdmi_priv->sdvox_reg, hdmi_priv->save_SDVOX); |
126 | POSTING_READ(hdmi_priv->sdvox_reg); | 127 | POSTING_READ(hdmi_priv->sdvox_reg); |
@@ -150,21 +151,21 @@ static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, | |||
150 | static enum drm_connector_status | 151 | static enum drm_connector_status |
151 | intel_hdmi_detect(struct drm_connector *connector) | 152 | intel_hdmi_detect(struct drm_connector *connector) |
152 | { | 153 | { |
153 | struct intel_output *intel_output = to_intel_output(connector); | 154 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
154 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 155 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
155 | struct edid *edid = NULL; | 156 | struct edid *edid = NULL; |
156 | enum drm_connector_status status = connector_status_disconnected; | 157 | enum drm_connector_status status = connector_status_disconnected; |
157 | 158 | ||
158 | hdmi_priv->has_hdmi_sink = false; | 159 | hdmi_priv->has_hdmi_sink = false; |
159 | edid = drm_get_edid(&intel_output->base, | 160 | edid = drm_get_edid(&intel_encoder->base, |
160 | intel_output->ddc_bus); | 161 | intel_encoder->ddc_bus); |
161 | 162 | ||
162 | if (edid) { | 163 | if (edid) { |
163 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { | 164 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
164 | status = connector_status_connected; | 165 | status = connector_status_connected; |
165 | hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid); | 166 | hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid); |
166 | } | 167 | } |
167 | intel_output->base.display_info.raw_edid = NULL; | 168 | intel_encoder->base.display_info.raw_edid = NULL; |
168 | kfree(edid); | 169 | kfree(edid); |
169 | } | 170 | } |
170 | 171 | ||
@@ -173,24 +174,24 @@ intel_hdmi_detect(struct drm_connector *connector) | |||
173 | 174 | ||
174 | static int intel_hdmi_get_modes(struct drm_connector *connector) | 175 | static int intel_hdmi_get_modes(struct drm_connector *connector) |
175 | { | 176 | { |
176 | struct intel_output *intel_output = to_intel_output(connector); | 177 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
177 | 178 | ||
178 | /* We should parse the EDID data and find out if it's an HDMI sink so | 179 | /* We should parse the EDID data and find out if it's an HDMI sink so |
179 | * we can send audio to it. | 180 | * we can send audio to it. |
180 | */ | 181 | */ |
181 | 182 | ||
182 | return intel_ddc_get_modes(intel_output); | 183 | return intel_ddc_get_modes(intel_encoder); |
183 | } | 184 | } |
184 | 185 | ||
185 | static void intel_hdmi_destroy(struct drm_connector *connector) | 186 | static void intel_hdmi_destroy(struct drm_connector *connector) |
186 | { | 187 | { |
187 | struct intel_output *intel_output = to_intel_output(connector); | 188 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
188 | 189 | ||
189 | if (intel_output->i2c_bus) | 190 | if (intel_encoder->i2c_bus) |
190 | intel_i2c_destroy(intel_output->i2c_bus); | 191 | intel_i2c_destroy(intel_encoder->i2c_bus); |
191 | drm_sysfs_connector_remove(connector); | 192 | drm_sysfs_connector_remove(connector); |
192 | drm_connector_cleanup(connector); | 193 | drm_connector_cleanup(connector); |
193 | kfree(intel_output); | 194 | kfree(intel_encoder); |
194 | } | 195 | } |
195 | 196 | ||
196 | static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { | 197 | static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { |
@@ -229,63 +230,63 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) | |||
229 | { | 230 | { |
230 | struct drm_i915_private *dev_priv = dev->dev_private; | 231 | struct drm_i915_private *dev_priv = dev->dev_private; |
231 | struct drm_connector *connector; | 232 | struct drm_connector *connector; |
232 | struct intel_output *intel_output; | 233 | struct intel_encoder *intel_encoder; |
233 | struct intel_hdmi_priv *hdmi_priv; | 234 | struct intel_hdmi_priv *hdmi_priv; |
234 | 235 | ||
235 | intel_output = kcalloc(sizeof(struct intel_output) + | 236 | intel_encoder = kcalloc(sizeof(struct intel_encoder) + |
236 | sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL); | 237 | sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL); |
237 | if (!intel_output) | 238 | if (!intel_encoder) |
238 | return; | 239 | return; |
239 | hdmi_priv = (struct intel_hdmi_priv *)(intel_output + 1); | 240 | hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1); |
240 | 241 | ||
241 | connector = &intel_output->base; | 242 | connector = &intel_encoder->base; |
242 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, | 243 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, |
243 | DRM_MODE_CONNECTOR_HDMIA); | 244 | DRM_MODE_CONNECTOR_HDMIA); |
244 | drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); | 245 | drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); |
245 | 246 | ||
246 | intel_output->type = INTEL_OUTPUT_HDMI; | 247 | intel_encoder->type = INTEL_OUTPUT_HDMI; |
247 | 248 | ||
248 | connector->interlace_allowed = 0; | 249 | connector->interlace_allowed = 0; |
249 | connector->doublescan_allowed = 0; | 250 | connector->doublescan_allowed = 0; |
250 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 251 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
251 | 252 | ||
252 | /* Set up the DDC bus. */ | 253 | /* Set up the DDC bus. */ |
253 | if (sdvox_reg == SDVOB) { | 254 | if (sdvox_reg == SDVOB) { |
254 | intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); | 255 | intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); |
255 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB"); | 256 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB"); |
256 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; | 257 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
257 | } else if (sdvox_reg == SDVOC) { | 258 | } else if (sdvox_reg == SDVOC) { |
258 | intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); | 259 | intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); |
259 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC"); | 260 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC"); |
260 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; | 261 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
261 | } else if (sdvox_reg == HDMIB) { | 262 | } else if (sdvox_reg == HDMIB) { |
262 | intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); | 263 | intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); |
263 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE, | 264 | intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOE, |
264 | "HDMIB"); | 265 | "HDMIB"); |
265 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; | 266 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
266 | } else if (sdvox_reg == HDMIC) { | 267 | } else if (sdvox_reg == HDMIC) { |
267 | intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); | 268 | intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); |
268 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD, | 269 | intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOD, |
269 | "HDMIC"); | 270 | "HDMIC"); |
270 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; | 271 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
271 | } else if (sdvox_reg == HDMID) { | 272 | } else if (sdvox_reg == HDMID) { |
272 | intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); | 273 | intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); |
273 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF, | 274 | intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOF, |
274 | "HDMID"); | 275 | "HDMID"); |
275 | dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; | 276 | dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; |
276 | } | 277 | } |
277 | if (!intel_output->ddc_bus) | 278 | if (!intel_encoder->ddc_bus) |
278 | goto err_connector; | 279 | goto err_connector; |
279 | 280 | ||
280 | hdmi_priv->sdvox_reg = sdvox_reg; | 281 | hdmi_priv->sdvox_reg = sdvox_reg; |
281 | intel_output->dev_priv = hdmi_priv; | 282 | intel_encoder->dev_priv = hdmi_priv; |
282 | 283 | ||
283 | drm_encoder_init(dev, &intel_output->enc, &intel_hdmi_enc_funcs, | 284 | drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs, |
284 | DRM_MODE_ENCODER_TMDS); | 285 | DRM_MODE_ENCODER_TMDS); |
285 | drm_encoder_helper_add(&intel_output->enc, &intel_hdmi_helper_funcs); | 286 | drm_encoder_helper_add(&intel_encoder->enc, &intel_hdmi_helper_funcs); |
286 | 287 | ||
287 | drm_mode_connector_attach_encoder(&intel_output->base, | 288 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
288 | &intel_output->enc); | 289 | &intel_encoder->enc); |
289 | drm_sysfs_connector_add(connector); | 290 | drm_sysfs_connector_add(connector); |
290 | 291 | ||
291 | /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written | 292 | /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written |
@@ -301,7 +302,7 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) | |||
301 | 302 | ||
302 | err_connector: | 303 | err_connector: |
303 | drm_connector_cleanup(connector); | 304 | drm_connector_cleanup(connector); |
304 | kfree(intel_output); | 305 | kfree(intel_encoder); |
305 | 306 | ||
306 | return; | 307 | return; |
307 | } | 308 | } |
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index fcc753ca5d94..c2649c7df14c 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c | |||
@@ -26,6 +26,7 @@ | |||
26 | * Eric Anholt <eric@anholt.net> | 26 | * Eric Anholt <eric@anholt.net> |
27 | */ | 27 | */ |
28 | #include <linux/i2c.h> | 28 | #include <linux/i2c.h> |
29 | #include <linux/slab.h> | ||
29 | #include <linux/i2c-id.h> | 30 | #include <linux/i2c-id.h> |
30 | #include <linux/i2c-algo-bit.h> | 31 | #include <linux/i2c-algo-bit.h> |
31 | #include "drmP.h" | 32 | #include "drmP.h" |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 14e516fdc2dd..b66806a37d37 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <acpi/button.h> | 30 | #include <acpi/button.h> |
31 | #include <linux/dmi.h> | 31 | #include <linux/dmi.h> |
32 | #include <linux/i2c.h> | 32 | #include <linux/i2c.h> |
33 | #include <linux/slab.h> | ||
33 | #include "drmP.h" | 34 | #include "drmP.h" |
34 | #include "drm.h" | 35 | #include "drm.h" |
35 | #include "drm_crtc.h" | 36 | #include "drm_crtc.h" |
@@ -238,8 +239,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
238 | struct drm_i915_private *dev_priv = dev->dev_private; | 239 | struct drm_i915_private *dev_priv = dev->dev_private; |
239 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); | 240 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
240 | struct drm_encoder *tmp_encoder; | 241 | struct drm_encoder *tmp_encoder; |
241 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 242 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
242 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; | 243 | struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv; |
243 | u32 pfit_control = 0, pfit_pgm_ratios = 0; | 244 | u32 pfit_control = 0, pfit_pgm_ratios = 0; |
244 | int left_border = 0, right_border = 0, top_border = 0; | 245 | int left_border = 0, right_border = 0, top_border = 0; |
245 | int bottom_border = 0; | 246 | int bottom_border = 0; |
@@ -586,8 +587,8 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder, | |||
586 | { | 587 | { |
587 | struct drm_device *dev = encoder->dev; | 588 | struct drm_device *dev = encoder->dev; |
588 | struct drm_i915_private *dev_priv = dev->dev_private; | 589 | struct drm_i915_private *dev_priv = dev->dev_private; |
589 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 590 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
590 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; | 591 | struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv; |
591 | 592 | ||
592 | /* | 593 | /* |
593 | * The LVDS pin pair will already have been turned on in the | 594 | * The LVDS pin pair will already have been turned on in the |
@@ -607,53 +608,6 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder, | |||
607 | I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control); | 608 | I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control); |
608 | } | 609 | } |
609 | 610 | ||
610 | /* Some lid devices report incorrect lid status, assume they're connected */ | ||
611 | static const struct dmi_system_id bad_lid_status[] = { | ||
612 | { | ||
613 | .ident = "Compaq nx9020", | ||
614 | .matches = { | ||
615 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | ||
616 | DMI_MATCH(DMI_BOARD_NAME, "3084"), | ||
617 | }, | ||
618 | }, | ||
619 | { | ||
620 | .ident = "Samsung SX20S", | ||
621 | .matches = { | ||
622 | DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"), | ||
623 | DMI_MATCH(DMI_BOARD_NAME, "SX20S"), | ||
624 | }, | ||
625 | }, | ||
626 | { | ||
627 | .ident = "Aspire One", | ||
628 | .matches = { | ||
629 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | ||
630 | DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"), | ||
631 | }, | ||
632 | }, | ||
633 | { | ||
634 | .ident = "Aspire 1810T", | ||
635 | .matches = { | ||
636 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | ||
637 | DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 1810T"), | ||
638 | }, | ||
639 | }, | ||
640 | { | ||
641 | .ident = "PC-81005", | ||
642 | .matches = { | ||
643 | DMI_MATCH(DMI_SYS_VENDOR, "MALATA"), | ||
644 | DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"), | ||
645 | }, | ||
646 | }, | ||
647 | { | ||
648 | .ident = "Clevo M5x0N", | ||
649 | .matches = { | ||
650 | DMI_MATCH(DMI_SYS_VENDOR, "CLEVO Co."), | ||
651 | DMI_MATCH(DMI_BOARD_NAME, "M5x0N"), | ||
652 | }, | ||
653 | }, | ||
654 | { } | ||
655 | }; | ||
656 | |||
657 | /** | 611 | /** |
658 | * Detect the LVDS connection. | 612 | * Detect the LVDS connection. |
659 | * | 613 | * |
@@ -669,12 +623,9 @@ static enum drm_connector_status intel_lvds_detect(struct drm_connector *connect | |||
669 | /* ACPI lid methods were generally unreliable in this generation, so | 623 | /* ACPI lid methods were generally unreliable in this generation, so |
670 | * don't even bother. | 624 | * don't even bother. |
671 | */ | 625 | */ |
672 | if (IS_GEN2(dev)) | 626 | if (IS_GEN2(dev) || IS_GEN3(dev)) |
673 | return connector_status_connected; | 627 | return connector_status_connected; |
674 | 628 | ||
675 | if (!dmi_check_system(bad_lid_status) && !acpi_lid_open()) | ||
676 | status = connector_status_disconnected; | ||
677 | |||
678 | return status; | 629 | return status; |
679 | } | 630 | } |
680 | 631 | ||
@@ -684,14 +635,16 @@ static enum drm_connector_status intel_lvds_detect(struct drm_connector *connect | |||
684 | static int intel_lvds_get_modes(struct drm_connector *connector) | 635 | static int intel_lvds_get_modes(struct drm_connector *connector) |
685 | { | 636 | { |
686 | struct drm_device *dev = connector->dev; | 637 | struct drm_device *dev = connector->dev; |
687 | struct intel_output *intel_output = to_intel_output(connector); | 638 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
688 | struct drm_i915_private *dev_priv = dev->dev_private; | 639 | struct drm_i915_private *dev_priv = dev->dev_private; |
689 | int ret = 0; | 640 | int ret = 0; |
690 | 641 | ||
691 | ret = intel_ddc_get_modes(intel_output); | 642 | if (dev_priv->lvds_edid_good) { |
643 | ret = intel_ddc_get_modes(intel_encoder); | ||
692 | 644 | ||
693 | if (ret) | 645 | if (ret) |
694 | return ret; | 646 | return ret; |
647 | } | ||
695 | 648 | ||
696 | /* Didn't get an EDID, so | 649 | /* Didn't get an EDID, so |
697 | * Set wide sync ranges so we get all modes | 650 | * Set wide sync ranges so we get all modes |
@@ -764,11 +717,11 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val, | |||
764 | static void intel_lvds_destroy(struct drm_connector *connector) | 717 | static void intel_lvds_destroy(struct drm_connector *connector) |
765 | { | 718 | { |
766 | struct drm_device *dev = connector->dev; | 719 | struct drm_device *dev = connector->dev; |
767 | struct intel_output *intel_output = to_intel_output(connector); | 720 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
768 | struct drm_i915_private *dev_priv = dev->dev_private; | 721 | struct drm_i915_private *dev_priv = dev->dev_private; |
769 | 722 | ||
770 | if (intel_output->ddc_bus) | 723 | if (intel_encoder->ddc_bus) |
771 | intel_i2c_destroy(intel_output->ddc_bus); | 724 | intel_i2c_destroy(intel_encoder->ddc_bus); |
772 | if (dev_priv->lid_notifier.notifier_call) | 725 | if (dev_priv->lid_notifier.notifier_call) |
773 | acpi_lid_notifier_unregister(&dev_priv->lid_notifier); | 726 | acpi_lid_notifier_unregister(&dev_priv->lid_notifier); |
774 | drm_sysfs_connector_remove(connector); | 727 | drm_sysfs_connector_remove(connector); |
@@ -781,13 +734,13 @@ static int intel_lvds_set_property(struct drm_connector *connector, | |||
781 | uint64_t value) | 734 | uint64_t value) |
782 | { | 735 | { |
783 | struct drm_device *dev = connector->dev; | 736 | struct drm_device *dev = connector->dev; |
784 | struct intel_output *intel_output = | 737 | struct intel_encoder *intel_encoder = |
785 | to_intel_output(connector); | 738 | to_intel_encoder(connector); |
786 | 739 | ||
787 | if (property == dev->mode_config.scaling_mode_property && | 740 | if (property == dev->mode_config.scaling_mode_property && |
788 | connector->encoder) { | 741 | connector->encoder) { |
789 | struct drm_crtc *crtc = connector->encoder->crtc; | 742 | struct drm_crtc *crtc = connector->encoder->crtc; |
790 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; | 743 | struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv; |
791 | if (value == DRM_MODE_SCALE_NONE) { | 744 | if (value == DRM_MODE_SCALE_NONE) { |
792 | DRM_DEBUG_KMS("no scaling not supported\n"); | 745 | DRM_DEBUG_KMS("no scaling not supported\n"); |
793 | return 0; | 746 | return 0; |
@@ -907,6 +860,14 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
907 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), | 860 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
908 | }, | 861 | }, |
909 | }, | 862 | }, |
863 | { | ||
864 | .callback = intel_no_lvds_dmi_callback, | ||
865 | .ident = "Clientron U800", | ||
866 | .matches = { | ||
867 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), | ||
868 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), | ||
869 | }, | ||
870 | }, | ||
910 | 871 | ||
911 | { } /* terminating entry */ | 872 | { } /* terminating entry */ |
912 | }; | 873 | }; |
@@ -1017,7 +978,7 @@ static int lvds_is_present_in_vbt(struct drm_device *dev) | |||
1017 | void intel_lvds_init(struct drm_device *dev) | 978 | void intel_lvds_init(struct drm_device *dev) |
1018 | { | 979 | { |
1019 | struct drm_i915_private *dev_priv = dev->dev_private; | 980 | struct drm_i915_private *dev_priv = dev->dev_private; |
1020 | struct intel_output *intel_output; | 981 | struct intel_encoder *intel_encoder; |
1021 | struct drm_connector *connector; | 982 | struct drm_connector *connector; |
1022 | struct drm_encoder *encoder; | 983 | struct drm_encoder *encoder; |
1023 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ | 984 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
@@ -1045,40 +1006,40 @@ void intel_lvds_init(struct drm_device *dev) | |||
1045 | gpio = PCH_GPIOC; | 1006 | gpio = PCH_GPIOC; |
1046 | } | 1007 | } |
1047 | 1008 | ||
1048 | intel_output = kzalloc(sizeof(struct intel_output) + | 1009 | intel_encoder = kzalloc(sizeof(struct intel_encoder) + |
1049 | sizeof(struct intel_lvds_priv), GFP_KERNEL); | 1010 | sizeof(struct intel_lvds_priv), GFP_KERNEL); |
1050 | if (!intel_output) { | 1011 | if (!intel_encoder) { |
1051 | return; | 1012 | return; |
1052 | } | 1013 | } |
1053 | 1014 | ||
1054 | connector = &intel_output->base; | 1015 | connector = &intel_encoder->base; |
1055 | encoder = &intel_output->enc; | 1016 | encoder = &intel_encoder->enc; |
1056 | drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs, | 1017 | drm_connector_init(dev, &intel_encoder->base, &intel_lvds_connector_funcs, |
1057 | DRM_MODE_CONNECTOR_LVDS); | 1018 | DRM_MODE_CONNECTOR_LVDS); |
1058 | 1019 | ||
1059 | drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs, | 1020 | drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs, |
1060 | DRM_MODE_ENCODER_LVDS); | 1021 | DRM_MODE_ENCODER_LVDS); |
1061 | 1022 | ||
1062 | drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); | 1023 | drm_mode_connector_attach_encoder(&intel_encoder->base, &intel_encoder->enc); |
1063 | intel_output->type = INTEL_OUTPUT_LVDS; | 1024 | intel_encoder->type = INTEL_OUTPUT_LVDS; |
1064 | 1025 | ||
1065 | intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); | 1026 | intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); |
1066 | intel_output->crtc_mask = (1 << 1); | 1027 | intel_encoder->crtc_mask = (1 << 1); |
1067 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); | 1028 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
1068 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); | 1029 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
1069 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; | 1030 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
1070 | connector->interlace_allowed = false; | 1031 | connector->interlace_allowed = false; |
1071 | connector->doublescan_allowed = false; | 1032 | connector->doublescan_allowed = false; |
1072 | 1033 | ||
1073 | lvds_priv = (struct intel_lvds_priv *)(intel_output + 1); | 1034 | lvds_priv = (struct intel_lvds_priv *)(intel_encoder + 1); |
1074 | intel_output->dev_priv = lvds_priv; | 1035 | intel_encoder->dev_priv = lvds_priv; |
1075 | /* create the scaling mode property */ | 1036 | /* create the scaling mode property */ |
1076 | drm_mode_create_scaling_mode_property(dev); | 1037 | drm_mode_create_scaling_mode_property(dev); |
1077 | /* | 1038 | /* |
1078 | * the initial panel fitting mode will be FULL_SCREEN. | 1039 | * the initial panel fitting mode will be FULL_SCREEN. |
1079 | */ | 1040 | */ |
1080 | 1041 | ||
1081 | drm_connector_attach_property(&intel_output->base, | 1042 | drm_connector_attach_property(&intel_encoder->base, |
1082 | dev->mode_config.scaling_mode_property, | 1043 | dev->mode_config.scaling_mode_property, |
1083 | DRM_MODE_SCALE_FULLSCREEN); | 1044 | DRM_MODE_SCALE_FULLSCREEN); |
1084 | lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN; | 1045 | lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN; |
@@ -1093,8 +1054,8 @@ void intel_lvds_init(struct drm_device *dev) | |||
1093 | */ | 1054 | */ |
1094 | 1055 | ||
1095 | /* Set up the DDC bus. */ | 1056 | /* Set up the DDC bus. */ |
1096 | intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C"); | 1057 | intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C"); |
1097 | if (!intel_output->ddc_bus) { | 1058 | if (!intel_encoder->ddc_bus) { |
1098 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " | 1059 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " |
1099 | "failed.\n"); | 1060 | "failed.\n"); |
1100 | goto failed; | 1061 | goto failed; |
@@ -1104,7 +1065,10 @@ void intel_lvds_init(struct drm_device *dev) | |||
1104 | * Attempt to get the fixed panel mode from DDC. Assume that the | 1065 | * Attempt to get the fixed panel mode from DDC. Assume that the |
1105 | * preferred mode is the right one. | 1066 | * preferred mode is the right one. |
1106 | */ | 1067 | */ |
1107 | intel_ddc_get_modes(intel_output); | 1068 | dev_priv->lvds_edid_good = true; |
1069 | |||
1070 | if (!intel_ddc_get_modes(intel_encoder)) | ||
1071 | dev_priv->lvds_edid_good = false; | ||
1108 | 1072 | ||
1109 | list_for_each_entry(scan, &connector->probed_modes, head) { | 1073 | list_for_each_entry(scan, &connector->probed_modes, head) { |
1110 | mutex_lock(&dev->mode_config.mutex); | 1074 | mutex_lock(&dev->mode_config.mutex); |
@@ -1182,9 +1146,9 @@ out: | |||
1182 | 1146 | ||
1183 | failed: | 1147 | failed: |
1184 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); | 1148 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
1185 | if (intel_output->ddc_bus) | 1149 | if (intel_encoder->ddc_bus) |
1186 | intel_i2c_destroy(intel_output->ddc_bus); | 1150 | intel_i2c_destroy(intel_encoder->ddc_bus); |
1187 | drm_connector_cleanup(connector); | 1151 | drm_connector_cleanup(connector); |
1188 | drm_encoder_cleanup(encoder); | 1152 | drm_encoder_cleanup(encoder); |
1189 | kfree(intel_output); | 1153 | kfree(intel_encoder); |
1190 | } | 1154 | } |
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c index 67e2f4632a24..8e5c83b2d120 100644 --- a/drivers/gpu/drm/i915/intel_modes.c +++ b/drivers/gpu/drm/i915/intel_modes.c | |||
@@ -23,6 +23,7 @@ | |||
23 | * DEALINGS IN THE SOFTWARE. | 23 | * DEALINGS IN THE SOFTWARE. |
24 | */ | 24 | */ |
25 | 25 | ||
26 | #include <linux/slab.h> | ||
26 | #include <linux/i2c.h> | 27 | #include <linux/i2c.h> |
27 | #include <linux/fb.h> | 28 | #include <linux/fb.h> |
28 | #include "drmP.h" | 29 | #include "drmP.h" |
@@ -33,7 +34,7 @@ | |||
33 | * intel_ddc_probe | 34 | * intel_ddc_probe |
34 | * | 35 | * |
35 | */ | 36 | */ |
36 | bool intel_ddc_probe(struct intel_output *intel_output) | 37 | bool intel_ddc_probe(struct intel_encoder *intel_encoder) |
37 | { | 38 | { |
38 | u8 out_buf[] = { 0x0, 0x0}; | 39 | u8 out_buf[] = { 0x0, 0x0}; |
39 | u8 buf[2]; | 40 | u8 buf[2]; |
@@ -53,9 +54,9 @@ bool intel_ddc_probe(struct intel_output *intel_output) | |||
53 | } | 54 | } |
54 | }; | 55 | }; |
55 | 56 | ||
56 | intel_i2c_quirk_set(intel_output->base.dev, true); | 57 | intel_i2c_quirk_set(intel_encoder->base.dev, true); |
57 | ret = i2c_transfer(intel_output->ddc_bus, msgs, 2); | 58 | ret = i2c_transfer(intel_encoder->ddc_bus, msgs, 2); |
58 | intel_i2c_quirk_set(intel_output->base.dev, false); | 59 | intel_i2c_quirk_set(intel_encoder->base.dev, false); |
59 | if (ret == 2) | 60 | if (ret == 2) |
60 | return true; | 61 | return true; |
61 | 62 | ||
@@ -68,19 +69,19 @@ bool intel_ddc_probe(struct intel_output *intel_output) | |||
68 | * | 69 | * |
69 | * Fetch the EDID information from @connector using the DDC bus. | 70 | * Fetch the EDID information from @connector using the DDC bus. |
70 | */ | 71 | */ |
71 | int intel_ddc_get_modes(struct intel_output *intel_output) | 72 | int intel_ddc_get_modes(struct intel_encoder *intel_encoder) |
72 | { | 73 | { |
73 | struct edid *edid; | 74 | struct edid *edid; |
74 | int ret = 0; | 75 | int ret = 0; |
75 | 76 | ||
76 | intel_i2c_quirk_set(intel_output->base.dev, true); | 77 | intel_i2c_quirk_set(intel_encoder->base.dev, true); |
77 | edid = drm_get_edid(&intel_output->base, intel_output->ddc_bus); | 78 | edid = drm_get_edid(&intel_encoder->base, intel_encoder->ddc_bus); |
78 | intel_i2c_quirk_set(intel_output->base.dev, false); | 79 | intel_i2c_quirk_set(intel_encoder->base.dev, false); |
79 | if (edid) { | 80 | if (edid) { |
80 | drm_mode_connector_update_edid_property(&intel_output->base, | 81 | drm_mode_connector_update_edid_property(&intel_encoder->base, |
81 | edid); | 82 | edid); |
82 | ret = drm_add_edid_modes(&intel_output->base, edid); | 83 | ret = drm_add_edid_modes(&intel_encoder->base, edid); |
83 | intel_output->base.display_info.raw_edid = NULL; | 84 | intel_encoder->base.display_info.raw_edid = NULL; |
84 | kfree(edid); | 85 | kfree(edid); |
85 | } | 86 | } |
86 | 87 | ||
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index d355d1d527e7..6d524a1fc271 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c | |||
@@ -724,7 +724,7 @@ int intel_overlay_do_put_image(struct intel_overlay *overlay, | |||
724 | int ret, tmp_width; | 724 | int ret, tmp_width; |
725 | struct overlay_registers *regs; | 725 | struct overlay_registers *regs; |
726 | bool scale_changed = false; | 726 | bool scale_changed = false; |
727 | struct drm_i915_gem_object *bo_priv = new_bo->driver_private; | 727 | struct drm_i915_gem_object *bo_priv = to_intel_bo(new_bo); |
728 | struct drm_device *dev = overlay->dev; | 728 | struct drm_device *dev = overlay->dev; |
729 | 729 | ||
730 | BUG_ON(!mutex_is_locked(&dev->struct_mutex)); | 730 | BUG_ON(!mutex_is_locked(&dev->struct_mutex)); |
@@ -809,7 +809,7 @@ int intel_overlay_do_put_image(struct intel_overlay *overlay, | |||
809 | intel_overlay_continue(overlay, scale_changed); | 809 | intel_overlay_continue(overlay, scale_changed); |
810 | 810 | ||
811 | overlay->old_vid_bo = overlay->vid_bo; | 811 | overlay->old_vid_bo = overlay->vid_bo; |
812 | overlay->vid_bo = new_bo->driver_private; | 812 | overlay->vid_bo = to_intel_bo(new_bo); |
813 | 813 | ||
814 | return 0; | 814 | return 0; |
815 | 815 | ||
@@ -1068,14 +1068,18 @@ int intel_overlay_put_image(struct drm_device *dev, void *data, | |||
1068 | 1068 | ||
1069 | drmmode_obj = drm_mode_object_find(dev, put_image_rec->crtc_id, | 1069 | drmmode_obj = drm_mode_object_find(dev, put_image_rec->crtc_id, |
1070 | DRM_MODE_OBJECT_CRTC); | 1070 | DRM_MODE_OBJECT_CRTC); |
1071 | if (!drmmode_obj) | 1071 | if (!drmmode_obj) { |
1072 | return -ENOENT; | 1072 | ret = -ENOENT; |
1073 | goto out_free; | ||
1074 | } | ||
1073 | crtc = to_intel_crtc(obj_to_crtc(drmmode_obj)); | 1075 | crtc = to_intel_crtc(obj_to_crtc(drmmode_obj)); |
1074 | 1076 | ||
1075 | new_bo = drm_gem_object_lookup(dev, file_priv, | 1077 | new_bo = drm_gem_object_lookup(dev, file_priv, |
1076 | put_image_rec->bo_handle); | 1078 | put_image_rec->bo_handle); |
1077 | if (!new_bo) | 1079 | if (!new_bo) { |
1078 | return -ENOENT; | 1080 | ret = -ENOENT; |
1081 | goto out_free; | ||
1082 | } | ||
1079 | 1083 | ||
1080 | mutex_lock(&dev->mode_config.mutex); | 1084 | mutex_lock(&dev->mode_config.mutex); |
1081 | mutex_lock(&dev->struct_mutex); | 1085 | mutex_lock(&dev->struct_mutex); |
@@ -1165,6 +1169,7 @@ out_unlock: | |||
1165 | mutex_unlock(&dev->struct_mutex); | 1169 | mutex_unlock(&dev->struct_mutex); |
1166 | mutex_unlock(&dev->mode_config.mutex); | 1170 | mutex_unlock(&dev->mode_config.mutex); |
1167 | drm_gem_object_unreference_unlocked(new_bo); | 1171 | drm_gem_object_unreference_unlocked(new_bo); |
1172 | out_free: | ||
1168 | kfree(params); | 1173 | kfree(params); |
1169 | 1174 | ||
1170 | return ret; | 1175 | return ret; |
@@ -1339,7 +1344,7 @@ void intel_setup_overlay(struct drm_device *dev) | |||
1339 | reg_bo = drm_gem_object_alloc(dev, PAGE_SIZE); | 1344 | reg_bo = drm_gem_object_alloc(dev, PAGE_SIZE); |
1340 | if (!reg_bo) | 1345 | if (!reg_bo) |
1341 | goto out_free; | 1346 | goto out_free; |
1342 | overlay->reg_bo = reg_bo->driver_private; | 1347 | overlay->reg_bo = to_intel_bo(reg_bo); |
1343 | 1348 | ||
1344 | if (OVERLAY_NONPHYSICAL(dev)) { | 1349 | if (OVERLAY_NONPHYSICAL(dev)) { |
1345 | ret = i915_gem_object_pin(reg_bo, PAGE_SIZE); | 1350 | ret = i915_gem_object_pin(reg_bo, PAGE_SIZE); |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 48daee5c9c63..87d953664cb0 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -26,6 +26,7 @@ | |||
26 | * Eric Anholt <eric@anholt.net> | 26 | * Eric Anholt <eric@anholt.net> |
27 | */ | 27 | */ |
28 | #include <linux/i2c.h> | 28 | #include <linux/i2c.h> |
29 | #include <linux/slab.h> | ||
29 | #include <linux/delay.h> | 30 | #include <linux/delay.h> |
30 | #include "drmP.h" | 31 | #include "drmP.h" |
31 | #include "drm.h" | 32 | #include "drm.h" |
@@ -53,7 +54,7 @@ struct intel_sdvo_priv { | |||
53 | u8 slave_addr; | 54 | u8 slave_addr; |
54 | 55 | ||
55 | /* Register for the SDVO device: SDVOB or SDVOC */ | 56 | /* Register for the SDVO device: SDVOB or SDVOC */ |
56 | int output_device; | 57 | int sdvo_reg; |
57 | 58 | ||
58 | /* Active outputs controlled by this SDVO output */ | 59 | /* Active outputs controlled by this SDVO output */ |
59 | uint16_t controlled_output; | 60 | uint16_t controlled_output; |
@@ -123,7 +124,7 @@ struct intel_sdvo_priv { | |||
123 | */ | 124 | */ |
124 | struct intel_sdvo_encode encode; | 125 | struct intel_sdvo_encode encode; |
125 | 126 | ||
126 | /* DDC bus used by this SDVO output */ | 127 | /* DDC bus used by this SDVO encoder */ |
127 | uint8_t ddc_bus; | 128 | uint8_t ddc_bus; |
128 | 129 | ||
129 | /* Mac mini hack -- use the same DDC as the analog connector */ | 130 | /* Mac mini hack -- use the same DDC as the analog connector */ |
@@ -161,22 +162,22 @@ struct intel_sdvo_priv { | |||
161 | }; | 162 | }; |
162 | 163 | ||
163 | static bool | 164 | static bool |
164 | intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags); | 165 | intel_sdvo_output_setup(struct intel_encoder *intel_encoder, uint16_t flags); |
165 | 166 | ||
166 | /** | 167 | /** |
167 | * Writes the SDVOB or SDVOC with the given value, but always writes both | 168 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
168 | * SDVOB and SDVOC to work around apparent hardware issues (according to | 169 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
169 | * comments in the BIOS). | 170 | * comments in the BIOS). |
170 | */ | 171 | */ |
171 | static void intel_sdvo_write_sdvox(struct intel_output *intel_output, u32 val) | 172 | static void intel_sdvo_write_sdvox(struct intel_encoder *intel_encoder, u32 val) |
172 | { | 173 | { |
173 | struct drm_device *dev = intel_output->base.dev; | 174 | struct drm_device *dev = intel_encoder->base.dev; |
174 | struct drm_i915_private *dev_priv = dev->dev_private; | 175 | struct drm_i915_private *dev_priv = dev->dev_private; |
175 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 176 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
176 | u32 bval = val, cval = val; | 177 | u32 bval = val, cval = val; |
177 | int i; | 178 | int i; |
178 | 179 | ||
179 | if (sdvo_priv->output_device == SDVOB) { | 180 | if (sdvo_priv->sdvo_reg == SDVOB) { |
180 | cval = I915_READ(SDVOC); | 181 | cval = I915_READ(SDVOC); |
181 | } else { | 182 | } else { |
182 | bval = I915_READ(SDVOB); | 183 | bval = I915_READ(SDVOB); |
@@ -195,10 +196,10 @@ static void intel_sdvo_write_sdvox(struct intel_output *intel_output, u32 val) | |||
195 | } | 196 | } |
196 | } | 197 | } |
197 | 198 | ||
198 | static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr, | 199 | static bool intel_sdvo_read_byte(struct intel_encoder *intel_encoder, u8 addr, |
199 | u8 *ch) | 200 | u8 *ch) |
200 | { | 201 | { |
201 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 202 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
202 | u8 out_buf[2]; | 203 | u8 out_buf[2]; |
203 | u8 buf[2]; | 204 | u8 buf[2]; |
204 | int ret; | 205 | int ret; |
@@ -221,7 +222,7 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr, | |||
221 | out_buf[0] = addr; | 222 | out_buf[0] = addr; |
222 | out_buf[1] = 0; | 223 | out_buf[1] = 0; |
223 | 224 | ||
224 | if ((ret = i2c_transfer(intel_output->i2c_bus, msgs, 2)) == 2) | 225 | if ((ret = i2c_transfer(intel_encoder->i2c_bus, msgs, 2)) == 2) |
225 | { | 226 | { |
226 | *ch = buf[0]; | 227 | *ch = buf[0]; |
227 | return true; | 228 | return true; |
@@ -231,10 +232,10 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr, | |||
231 | return false; | 232 | return false; |
232 | } | 233 | } |
233 | 234 | ||
234 | static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr, | 235 | static bool intel_sdvo_write_byte(struct intel_encoder *intel_encoder, int addr, |
235 | u8 ch) | 236 | u8 ch) |
236 | { | 237 | { |
237 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 238 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
238 | u8 out_buf[2]; | 239 | u8 out_buf[2]; |
239 | struct i2c_msg msgs[] = { | 240 | struct i2c_msg msgs[] = { |
240 | { | 241 | { |
@@ -248,7 +249,7 @@ static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr, | |||
248 | out_buf[0] = addr; | 249 | out_buf[0] = addr; |
249 | out_buf[1] = ch; | 250 | out_buf[1] = ch; |
250 | 251 | ||
251 | if (i2c_transfer(intel_output->i2c_bus, msgs, 1) == 1) | 252 | if (i2c_transfer(intel_encoder->i2c_bus, msgs, 1) == 1) |
252 | { | 253 | { |
253 | return true; | 254 | return true; |
254 | } | 255 | } |
@@ -352,13 +353,13 @@ static const struct _sdvo_cmd_name { | |||
352 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), | 353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
353 | }; | 354 | }; |
354 | 355 | ||
355 | #define SDVO_NAME(dev_priv) ((dev_priv)->output_device == SDVOB ? "SDVOB" : "SDVOC") | 356 | #define SDVO_NAME(dev_priv) ((dev_priv)->sdvo_reg == SDVOB ? "SDVOB" : "SDVOC") |
356 | #define SDVO_PRIV(output) ((struct intel_sdvo_priv *) (output)->dev_priv) | 357 | #define SDVO_PRIV(encoder) ((struct intel_sdvo_priv *) (encoder)->dev_priv) |
357 | 358 | ||
358 | static void intel_sdvo_debug_write(struct intel_output *intel_output, u8 cmd, | 359 | static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd, |
359 | void *args, int args_len) | 360 | void *args, int args_len) |
360 | { | 361 | { |
361 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 362 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
362 | int i; | 363 | int i; |
363 | 364 | ||
364 | DRM_DEBUG_KMS("%s: W: %02X ", | 365 | DRM_DEBUG_KMS("%s: W: %02X ", |
@@ -378,19 +379,19 @@ static void intel_sdvo_debug_write(struct intel_output *intel_output, u8 cmd, | |||
378 | DRM_LOG_KMS("\n"); | 379 | DRM_LOG_KMS("\n"); |
379 | } | 380 | } |
380 | 381 | ||
381 | static void intel_sdvo_write_cmd(struct intel_output *intel_output, u8 cmd, | 382 | static void intel_sdvo_write_cmd(struct intel_encoder *intel_encoder, u8 cmd, |
382 | void *args, int args_len) | 383 | void *args, int args_len) |
383 | { | 384 | { |
384 | int i; | 385 | int i; |
385 | 386 | ||
386 | intel_sdvo_debug_write(intel_output, cmd, args, args_len); | 387 | intel_sdvo_debug_write(intel_encoder, cmd, args, args_len); |
387 | 388 | ||
388 | for (i = 0; i < args_len; i++) { | 389 | for (i = 0; i < args_len; i++) { |
389 | intel_sdvo_write_byte(intel_output, SDVO_I2C_ARG_0 - i, | 390 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_ARG_0 - i, |
390 | ((u8*)args)[i]); | 391 | ((u8*)args)[i]); |
391 | } | 392 | } |
392 | 393 | ||
393 | intel_sdvo_write_byte(intel_output, SDVO_I2C_OPCODE, cmd); | 394 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_OPCODE, cmd); |
394 | } | 395 | } |
395 | 396 | ||
396 | static const char *cmd_status_names[] = { | 397 | static const char *cmd_status_names[] = { |
@@ -403,11 +404,11 @@ static const char *cmd_status_names[] = { | |||
403 | "Scaling not supported" | 404 | "Scaling not supported" |
404 | }; | 405 | }; |
405 | 406 | ||
406 | static void intel_sdvo_debug_response(struct intel_output *intel_output, | 407 | static void intel_sdvo_debug_response(struct intel_encoder *intel_encoder, |
407 | void *response, int response_len, | 408 | void *response, int response_len, |
408 | u8 status) | 409 | u8 status) |
409 | { | 410 | { |
410 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 411 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
411 | int i; | 412 | int i; |
412 | 413 | ||
413 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(sdvo_priv)); | 414 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(sdvo_priv)); |
@@ -422,7 +423,7 @@ static void intel_sdvo_debug_response(struct intel_output *intel_output, | |||
422 | DRM_LOG_KMS("\n"); | 423 | DRM_LOG_KMS("\n"); |
423 | } | 424 | } |
424 | 425 | ||
425 | static u8 intel_sdvo_read_response(struct intel_output *intel_output, | 426 | static u8 intel_sdvo_read_response(struct intel_encoder *intel_encoder, |
426 | void *response, int response_len) | 427 | void *response, int response_len) |
427 | { | 428 | { |
428 | int i; | 429 | int i; |
@@ -432,16 +433,16 @@ static u8 intel_sdvo_read_response(struct intel_output *intel_output, | |||
432 | while (retry--) { | 433 | while (retry--) { |
433 | /* Read the command response */ | 434 | /* Read the command response */ |
434 | for (i = 0; i < response_len; i++) { | 435 | for (i = 0; i < response_len; i++) { |
435 | intel_sdvo_read_byte(intel_output, | 436 | intel_sdvo_read_byte(intel_encoder, |
436 | SDVO_I2C_RETURN_0 + i, | 437 | SDVO_I2C_RETURN_0 + i, |
437 | &((u8 *)response)[i]); | 438 | &((u8 *)response)[i]); |
438 | } | 439 | } |
439 | 440 | ||
440 | /* read the return status */ | 441 | /* read the return status */ |
441 | intel_sdvo_read_byte(intel_output, SDVO_I2C_CMD_STATUS, | 442 | intel_sdvo_read_byte(intel_encoder, SDVO_I2C_CMD_STATUS, |
442 | &status); | 443 | &status); |
443 | 444 | ||
444 | intel_sdvo_debug_response(intel_output, response, response_len, | 445 | intel_sdvo_debug_response(intel_encoder, response, response_len, |
445 | status); | 446 | status); |
446 | if (status != SDVO_CMD_STATUS_PENDING) | 447 | if (status != SDVO_CMD_STATUS_PENDING) |
447 | return status; | 448 | return status; |
@@ -469,10 +470,10 @@ static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) | |||
469 | * another I2C transaction after issuing the DDC bus switch, it will be | 470 | * another I2C transaction after issuing the DDC bus switch, it will be |
470 | * switched to the internal SDVO register. | 471 | * switched to the internal SDVO register. |
471 | */ | 472 | */ |
472 | static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, | 473 | static void intel_sdvo_set_control_bus_switch(struct intel_encoder *intel_encoder, |
473 | u8 target) | 474 | u8 target) |
474 | { | 475 | { |
475 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 476 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
476 | u8 out_buf[2], cmd_buf[2], ret_value[2], ret; | 477 | u8 out_buf[2], cmd_buf[2], ret_value[2], ret; |
477 | struct i2c_msg msgs[] = { | 478 | struct i2c_msg msgs[] = { |
478 | { | 479 | { |
@@ -496,10 +497,10 @@ static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, | |||
496 | }, | 497 | }, |
497 | }; | 498 | }; |
498 | 499 | ||
499 | intel_sdvo_debug_write(intel_output, SDVO_CMD_SET_CONTROL_BUS_SWITCH, | 500 | intel_sdvo_debug_write(intel_encoder, SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
500 | &target, 1); | 501 | &target, 1); |
501 | /* write the DDC switch command argument */ | 502 | /* write the DDC switch command argument */ |
502 | intel_sdvo_write_byte(intel_output, SDVO_I2C_ARG_0, target); | 503 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_ARG_0, target); |
503 | 504 | ||
504 | out_buf[0] = SDVO_I2C_OPCODE; | 505 | out_buf[0] = SDVO_I2C_OPCODE; |
505 | out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH; | 506 | out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH; |
@@ -508,7 +509,7 @@ static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, | |||
508 | ret_value[0] = 0; | 509 | ret_value[0] = 0; |
509 | ret_value[1] = 0; | 510 | ret_value[1] = 0; |
510 | 511 | ||
511 | ret = i2c_transfer(intel_output->i2c_bus, msgs, 3); | 512 | ret = i2c_transfer(intel_encoder->i2c_bus, msgs, 3); |
512 | if (ret != 3) { | 513 | if (ret != 3) { |
513 | /* failure in I2C transfer */ | 514 | /* failure in I2C transfer */ |
514 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); | 515 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
@@ -522,7 +523,7 @@ static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, | |||
522 | return; | 523 | return; |
523 | } | 524 | } |
524 | 525 | ||
525 | static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool target_0, bool target_1) | 526 | static bool intel_sdvo_set_target_input(struct intel_encoder *intel_encoder, bool target_0, bool target_1) |
526 | { | 527 | { |
527 | struct intel_sdvo_set_target_input_args targets = {0}; | 528 | struct intel_sdvo_set_target_input_args targets = {0}; |
528 | u8 status; | 529 | u8 status; |
@@ -533,10 +534,10 @@ static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool | |||
533 | if (target_1) | 534 | if (target_1) |
534 | targets.target_1 = 1; | 535 | targets.target_1 = 1; |
535 | 536 | ||
536 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_TARGET_INPUT, &targets, | 537 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TARGET_INPUT, &targets, |
537 | sizeof(targets)); | 538 | sizeof(targets)); |
538 | 539 | ||
539 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 540 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
540 | 541 | ||
541 | return (status == SDVO_CMD_STATUS_SUCCESS); | 542 | return (status == SDVO_CMD_STATUS_SUCCESS); |
542 | } | 543 | } |
@@ -547,13 +548,13 @@ static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool | |||
547 | * This function is making an assumption about the layout of the response, | 548 | * This function is making an assumption about the layout of the response, |
548 | * which should be checked against the docs. | 549 | * which should be checked against the docs. |
549 | */ | 550 | */ |
550 | static bool intel_sdvo_get_trained_inputs(struct intel_output *intel_output, bool *input_1, bool *input_2) | 551 | static bool intel_sdvo_get_trained_inputs(struct intel_encoder *intel_encoder, bool *input_1, bool *input_2) |
551 | { | 552 | { |
552 | struct intel_sdvo_get_trained_inputs_response response; | 553 | struct intel_sdvo_get_trained_inputs_response response; |
553 | u8 status; | 554 | u8 status; |
554 | 555 | ||
555 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_TRAINED_INPUTS, NULL, 0); | 556 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_TRAINED_INPUTS, NULL, 0); |
556 | status = intel_sdvo_read_response(intel_output, &response, sizeof(response)); | 557 | status = intel_sdvo_read_response(intel_encoder, &response, sizeof(response)); |
557 | if (status != SDVO_CMD_STATUS_SUCCESS) | 558 | if (status != SDVO_CMD_STATUS_SUCCESS) |
558 | return false; | 559 | return false; |
559 | 560 | ||
@@ -562,29 +563,29 @@ static bool intel_sdvo_get_trained_inputs(struct intel_output *intel_output, boo | |||
562 | return true; | 563 | return true; |
563 | } | 564 | } |
564 | 565 | ||
565 | static bool intel_sdvo_get_active_outputs(struct intel_output *intel_output, | 566 | static bool intel_sdvo_get_active_outputs(struct intel_encoder *intel_encoder, |
566 | u16 *outputs) | 567 | u16 *outputs) |
567 | { | 568 | { |
568 | u8 status; | 569 | u8 status; |
569 | 570 | ||
570 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ACTIVE_OUTPUTS, NULL, 0); | 571 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_OUTPUTS, NULL, 0); |
571 | status = intel_sdvo_read_response(intel_output, outputs, sizeof(*outputs)); | 572 | status = intel_sdvo_read_response(intel_encoder, outputs, sizeof(*outputs)); |
572 | 573 | ||
573 | return (status == SDVO_CMD_STATUS_SUCCESS); | 574 | return (status == SDVO_CMD_STATUS_SUCCESS); |
574 | } | 575 | } |
575 | 576 | ||
576 | static bool intel_sdvo_set_active_outputs(struct intel_output *intel_output, | 577 | static bool intel_sdvo_set_active_outputs(struct intel_encoder *intel_encoder, |
577 | u16 outputs) | 578 | u16 outputs) |
578 | { | 579 | { |
579 | u8 status; | 580 | u8 status; |
580 | 581 | ||
581 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_ACTIVE_OUTPUTS, &outputs, | 582 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_OUTPUTS, &outputs, |
582 | sizeof(outputs)); | 583 | sizeof(outputs)); |
583 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 584 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
584 | return (status == SDVO_CMD_STATUS_SUCCESS); | 585 | return (status == SDVO_CMD_STATUS_SUCCESS); |
585 | } | 586 | } |
586 | 587 | ||
587 | static bool intel_sdvo_set_encoder_power_state(struct intel_output *intel_output, | 588 | static bool intel_sdvo_set_encoder_power_state(struct intel_encoder *intel_encoder, |
588 | int mode) | 589 | int mode) |
589 | { | 590 | { |
590 | u8 status, state = SDVO_ENCODER_STATE_ON; | 591 | u8 status, state = SDVO_ENCODER_STATE_ON; |
@@ -604,24 +605,24 @@ static bool intel_sdvo_set_encoder_power_state(struct intel_output *intel_output | |||
604 | break; | 605 | break; |
605 | } | 606 | } |
606 | 607 | ||
607 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_ENCODER_POWER_STATE, &state, | 608 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ENCODER_POWER_STATE, &state, |
608 | sizeof(state)); | 609 | sizeof(state)); |
609 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 610 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
610 | 611 | ||
611 | return (status == SDVO_CMD_STATUS_SUCCESS); | 612 | return (status == SDVO_CMD_STATUS_SUCCESS); |
612 | } | 613 | } |
613 | 614 | ||
614 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_output *intel_output, | 615 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_encoder *intel_encoder, |
615 | int *clock_min, | 616 | int *clock_min, |
616 | int *clock_max) | 617 | int *clock_max) |
617 | { | 618 | { |
618 | struct intel_sdvo_pixel_clock_range clocks; | 619 | struct intel_sdvo_pixel_clock_range clocks; |
619 | u8 status; | 620 | u8 status; |
620 | 621 | ||
621 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, | 622 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
622 | NULL, 0); | 623 | NULL, 0); |
623 | 624 | ||
624 | status = intel_sdvo_read_response(intel_output, &clocks, sizeof(clocks)); | 625 | status = intel_sdvo_read_response(intel_encoder, &clocks, sizeof(clocks)); |
625 | 626 | ||
626 | if (status != SDVO_CMD_STATUS_SUCCESS) | 627 | if (status != SDVO_CMD_STATUS_SUCCESS) |
627 | return false; | 628 | return false; |
@@ -633,31 +634,31 @@ static bool intel_sdvo_get_input_pixel_clock_range(struct intel_output *intel_ou | |||
633 | return true; | 634 | return true; |
634 | } | 635 | } |
635 | 636 | ||
636 | static bool intel_sdvo_set_target_output(struct intel_output *intel_output, | 637 | static bool intel_sdvo_set_target_output(struct intel_encoder *intel_encoder, |
637 | u16 outputs) | 638 | u16 outputs) |
638 | { | 639 | { |
639 | u8 status; | 640 | u8 status; |
640 | 641 | ||
641 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_TARGET_OUTPUT, &outputs, | 642 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TARGET_OUTPUT, &outputs, |
642 | sizeof(outputs)); | 643 | sizeof(outputs)); |
643 | 644 | ||
644 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 645 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
645 | return (status == SDVO_CMD_STATUS_SUCCESS); | 646 | return (status == SDVO_CMD_STATUS_SUCCESS); |
646 | } | 647 | } |
647 | 648 | ||
648 | static bool intel_sdvo_get_timing(struct intel_output *intel_output, u8 cmd, | 649 | static bool intel_sdvo_get_timing(struct intel_encoder *intel_encoder, u8 cmd, |
649 | struct intel_sdvo_dtd *dtd) | 650 | struct intel_sdvo_dtd *dtd) |
650 | { | 651 | { |
651 | u8 status; | 652 | u8 status; |
652 | 653 | ||
653 | intel_sdvo_write_cmd(intel_output, cmd, NULL, 0); | 654 | intel_sdvo_write_cmd(intel_encoder, cmd, NULL, 0); |
654 | status = intel_sdvo_read_response(intel_output, &dtd->part1, | 655 | status = intel_sdvo_read_response(intel_encoder, &dtd->part1, |
655 | sizeof(dtd->part1)); | 656 | sizeof(dtd->part1)); |
656 | if (status != SDVO_CMD_STATUS_SUCCESS) | 657 | if (status != SDVO_CMD_STATUS_SUCCESS) |
657 | return false; | 658 | return false; |
658 | 659 | ||
659 | intel_sdvo_write_cmd(intel_output, cmd + 1, NULL, 0); | 660 | intel_sdvo_write_cmd(intel_encoder, cmd + 1, NULL, 0); |
660 | status = intel_sdvo_read_response(intel_output, &dtd->part2, | 661 | status = intel_sdvo_read_response(intel_encoder, &dtd->part2, |
661 | sizeof(dtd->part2)); | 662 | sizeof(dtd->part2)); |
662 | if (status != SDVO_CMD_STATUS_SUCCESS) | 663 | if (status != SDVO_CMD_STATUS_SUCCESS) |
663 | return false; | 664 | return false; |
@@ -665,60 +666,60 @@ static bool intel_sdvo_get_timing(struct intel_output *intel_output, u8 cmd, | |||
665 | return true; | 666 | return true; |
666 | } | 667 | } |
667 | 668 | ||
668 | static bool intel_sdvo_get_input_timing(struct intel_output *intel_output, | 669 | static bool intel_sdvo_get_input_timing(struct intel_encoder *intel_encoder, |
669 | struct intel_sdvo_dtd *dtd) | 670 | struct intel_sdvo_dtd *dtd) |
670 | { | 671 | { |
671 | return intel_sdvo_get_timing(intel_output, | 672 | return intel_sdvo_get_timing(intel_encoder, |
672 | SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); | 673 | SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); |
673 | } | 674 | } |
674 | 675 | ||
675 | static bool intel_sdvo_get_output_timing(struct intel_output *intel_output, | 676 | static bool intel_sdvo_get_output_timing(struct intel_encoder *intel_encoder, |
676 | struct intel_sdvo_dtd *dtd) | 677 | struct intel_sdvo_dtd *dtd) |
677 | { | 678 | { |
678 | return intel_sdvo_get_timing(intel_output, | 679 | return intel_sdvo_get_timing(intel_encoder, |
679 | SDVO_CMD_GET_OUTPUT_TIMINGS_PART1, dtd); | 680 | SDVO_CMD_GET_OUTPUT_TIMINGS_PART1, dtd); |
680 | } | 681 | } |
681 | 682 | ||
682 | static bool intel_sdvo_set_timing(struct intel_output *intel_output, u8 cmd, | 683 | static bool intel_sdvo_set_timing(struct intel_encoder *intel_encoder, u8 cmd, |
683 | struct intel_sdvo_dtd *dtd) | 684 | struct intel_sdvo_dtd *dtd) |
684 | { | 685 | { |
685 | u8 status; | 686 | u8 status; |
686 | 687 | ||
687 | intel_sdvo_write_cmd(intel_output, cmd, &dtd->part1, sizeof(dtd->part1)); | 688 | intel_sdvo_write_cmd(intel_encoder, cmd, &dtd->part1, sizeof(dtd->part1)); |
688 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 689 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
689 | if (status != SDVO_CMD_STATUS_SUCCESS) | 690 | if (status != SDVO_CMD_STATUS_SUCCESS) |
690 | return false; | 691 | return false; |
691 | 692 | ||
692 | intel_sdvo_write_cmd(intel_output, cmd + 1, &dtd->part2, sizeof(dtd->part2)); | 693 | intel_sdvo_write_cmd(intel_encoder, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
693 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 694 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
694 | if (status != SDVO_CMD_STATUS_SUCCESS) | 695 | if (status != SDVO_CMD_STATUS_SUCCESS) |
695 | return false; | 696 | return false; |
696 | 697 | ||
697 | return true; | 698 | return true; |
698 | } | 699 | } |
699 | 700 | ||
700 | static bool intel_sdvo_set_input_timing(struct intel_output *intel_output, | 701 | static bool intel_sdvo_set_input_timing(struct intel_encoder *intel_encoder, |
701 | struct intel_sdvo_dtd *dtd) | 702 | struct intel_sdvo_dtd *dtd) |
702 | { | 703 | { |
703 | return intel_sdvo_set_timing(intel_output, | 704 | return intel_sdvo_set_timing(intel_encoder, |
704 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); | 705 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
705 | } | 706 | } |
706 | 707 | ||
707 | static bool intel_sdvo_set_output_timing(struct intel_output *intel_output, | 708 | static bool intel_sdvo_set_output_timing(struct intel_encoder *intel_encoder, |
708 | struct intel_sdvo_dtd *dtd) | 709 | struct intel_sdvo_dtd *dtd) |
709 | { | 710 | { |
710 | return intel_sdvo_set_timing(intel_output, | 711 | return intel_sdvo_set_timing(intel_encoder, |
711 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); | 712 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
712 | } | 713 | } |
713 | 714 | ||
714 | static bool | 715 | static bool |
715 | intel_sdvo_create_preferred_input_timing(struct intel_output *output, | 716 | intel_sdvo_create_preferred_input_timing(struct intel_encoder *intel_encoder, |
716 | uint16_t clock, | 717 | uint16_t clock, |
717 | uint16_t width, | 718 | uint16_t width, |
718 | uint16_t height) | 719 | uint16_t height) |
719 | { | 720 | { |
720 | struct intel_sdvo_preferred_input_timing_args args; | 721 | struct intel_sdvo_preferred_input_timing_args args; |
721 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 722 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
722 | uint8_t status; | 723 | uint8_t status; |
723 | 724 | ||
724 | memset(&args, 0, sizeof(args)); | 725 | memset(&args, 0, sizeof(args)); |
@@ -732,32 +733,33 @@ intel_sdvo_create_preferred_input_timing(struct intel_output *output, | |||
732 | sdvo_priv->sdvo_lvds_fixed_mode->vdisplay != height)) | 733 | sdvo_priv->sdvo_lvds_fixed_mode->vdisplay != height)) |
733 | args.scaled = 1; | 734 | args.scaled = 1; |
734 | 735 | ||
735 | intel_sdvo_write_cmd(output, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, | 736 | intel_sdvo_write_cmd(intel_encoder, |
737 | SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, | ||
736 | &args, sizeof(args)); | 738 | &args, sizeof(args)); |
737 | status = intel_sdvo_read_response(output, NULL, 0); | 739 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
738 | if (status != SDVO_CMD_STATUS_SUCCESS) | 740 | if (status != SDVO_CMD_STATUS_SUCCESS) |
739 | return false; | 741 | return false; |
740 | 742 | ||
741 | return true; | 743 | return true; |
742 | } | 744 | } |
743 | 745 | ||
744 | static bool intel_sdvo_get_preferred_input_timing(struct intel_output *output, | 746 | static bool intel_sdvo_get_preferred_input_timing(struct intel_encoder *intel_encoder, |
745 | struct intel_sdvo_dtd *dtd) | 747 | struct intel_sdvo_dtd *dtd) |
746 | { | 748 | { |
747 | bool status; | 749 | bool status; |
748 | 750 | ||
749 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, | 751 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
750 | NULL, 0); | 752 | NULL, 0); |
751 | 753 | ||
752 | status = intel_sdvo_read_response(output, &dtd->part1, | 754 | status = intel_sdvo_read_response(intel_encoder, &dtd->part1, |
753 | sizeof(dtd->part1)); | 755 | sizeof(dtd->part1)); |
754 | if (status != SDVO_CMD_STATUS_SUCCESS) | 756 | if (status != SDVO_CMD_STATUS_SUCCESS) |
755 | return false; | 757 | return false; |
756 | 758 | ||
757 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, | 759 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
758 | NULL, 0); | 760 | NULL, 0); |
759 | 761 | ||
760 | status = intel_sdvo_read_response(output, &dtd->part2, | 762 | status = intel_sdvo_read_response(intel_encoder, &dtd->part2, |
761 | sizeof(dtd->part2)); | 763 | sizeof(dtd->part2)); |
762 | if (status != SDVO_CMD_STATUS_SUCCESS) | 764 | if (status != SDVO_CMD_STATUS_SUCCESS) |
763 | return false; | 765 | return false; |
@@ -765,12 +767,12 @@ static bool intel_sdvo_get_preferred_input_timing(struct intel_output *output, | |||
765 | return false; | 767 | return false; |
766 | } | 768 | } |
767 | 769 | ||
768 | static int intel_sdvo_get_clock_rate_mult(struct intel_output *intel_output) | 770 | static int intel_sdvo_get_clock_rate_mult(struct intel_encoder *intel_encoder) |
769 | { | 771 | { |
770 | u8 response, status; | 772 | u8 response, status; |
771 | 773 | ||
772 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_CLOCK_RATE_MULT, NULL, 0); | 774 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_CLOCK_RATE_MULT, NULL, 0); |
773 | status = intel_sdvo_read_response(intel_output, &response, 1); | 775 | status = intel_sdvo_read_response(intel_encoder, &response, 1); |
774 | 776 | ||
775 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 777 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
776 | DRM_DEBUG_KMS("Couldn't get SDVO clock rate multiplier\n"); | 778 | DRM_DEBUG_KMS("Couldn't get SDVO clock rate multiplier\n"); |
@@ -782,12 +784,12 @@ static int intel_sdvo_get_clock_rate_mult(struct intel_output *intel_output) | |||
782 | return response; | 784 | return response; |
783 | } | 785 | } |
784 | 786 | ||
785 | static bool intel_sdvo_set_clock_rate_mult(struct intel_output *intel_output, u8 val) | 787 | static bool intel_sdvo_set_clock_rate_mult(struct intel_encoder *intel_encoder, u8 val) |
786 | { | 788 | { |
787 | u8 status; | 789 | u8 status; |
788 | 790 | ||
789 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); | 791 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
790 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 792 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
791 | if (status != SDVO_CMD_STATUS_SUCCESS) | 793 | if (status != SDVO_CMD_STATUS_SUCCESS) |
792 | return false; | 794 | return false; |
793 | 795 | ||
@@ -876,13 +878,13 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, | |||
876 | mode->flags |= DRM_MODE_FLAG_PVSYNC; | 878 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
877 | } | 879 | } |
878 | 880 | ||
879 | static bool intel_sdvo_get_supp_encode(struct intel_output *output, | 881 | static bool intel_sdvo_get_supp_encode(struct intel_encoder *intel_encoder, |
880 | struct intel_sdvo_encode *encode) | 882 | struct intel_sdvo_encode *encode) |
881 | { | 883 | { |
882 | uint8_t status; | 884 | uint8_t status; |
883 | 885 | ||
884 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0); | 886 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0); |
885 | status = intel_sdvo_read_response(output, encode, sizeof(*encode)); | 887 | status = intel_sdvo_read_response(intel_encoder, encode, sizeof(*encode)); |
886 | if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */ | 888 | if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */ |
887 | memset(encode, 0, sizeof(*encode)); | 889 | memset(encode, 0, sizeof(*encode)); |
888 | return false; | 890 | return false; |
@@ -891,29 +893,30 @@ static bool intel_sdvo_get_supp_encode(struct intel_output *output, | |||
891 | return true; | 893 | return true; |
892 | } | 894 | } |
893 | 895 | ||
894 | static bool intel_sdvo_set_encode(struct intel_output *output, uint8_t mode) | 896 | static bool intel_sdvo_set_encode(struct intel_encoder *intel_encoder, |
897 | uint8_t mode) | ||
895 | { | 898 | { |
896 | uint8_t status; | 899 | uint8_t status; |
897 | 900 | ||
898 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_ENCODE, &mode, 1); | 901 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ENCODE, &mode, 1); |
899 | status = intel_sdvo_read_response(output, NULL, 0); | 902 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
900 | 903 | ||
901 | return (status == SDVO_CMD_STATUS_SUCCESS); | 904 | return (status == SDVO_CMD_STATUS_SUCCESS); |
902 | } | 905 | } |
903 | 906 | ||
904 | static bool intel_sdvo_set_colorimetry(struct intel_output *output, | 907 | static bool intel_sdvo_set_colorimetry(struct intel_encoder *intel_encoder, |
905 | uint8_t mode) | 908 | uint8_t mode) |
906 | { | 909 | { |
907 | uint8_t status; | 910 | uint8_t status; |
908 | 911 | ||
909 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_COLORIMETRY, &mode, 1); | 912 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
910 | status = intel_sdvo_read_response(output, NULL, 0); | 913 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
911 | 914 | ||
912 | return (status == SDVO_CMD_STATUS_SUCCESS); | 915 | return (status == SDVO_CMD_STATUS_SUCCESS); |
913 | } | 916 | } |
914 | 917 | ||
915 | #if 0 | 918 | #if 0 |
916 | static void intel_sdvo_dump_hdmi_buf(struct intel_output *output) | 919 | static void intel_sdvo_dump_hdmi_buf(struct intel_encoder *intel_encoder) |
917 | { | 920 | { |
918 | int i, j; | 921 | int i, j; |
919 | uint8_t set_buf_index[2]; | 922 | uint8_t set_buf_index[2]; |
@@ -922,43 +925,45 @@ static void intel_sdvo_dump_hdmi_buf(struct intel_output *output) | |||
922 | uint8_t buf[48]; | 925 | uint8_t buf[48]; |
923 | uint8_t *pos; | 926 | uint8_t *pos; |
924 | 927 | ||
925 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_AV_SPLIT, NULL, 0); | 928 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, NULL, 0); |
926 | intel_sdvo_read_response(output, &av_split, 1); | 929 | intel_sdvo_read_response(encoder, &av_split, 1); |
927 | 930 | ||
928 | for (i = 0; i <= av_split; i++) { | 931 | for (i = 0; i <= av_split; i++) { |
929 | set_buf_index[0] = i; set_buf_index[1] = 0; | 932 | set_buf_index[0] = i; set_buf_index[1] = 0; |
930 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_INDEX, | 933 | intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, |
931 | set_buf_index, 2); | 934 | set_buf_index, 2); |
932 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_INFO, NULL, 0); | 935 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
933 | intel_sdvo_read_response(output, &buf_size, 1); | 936 | intel_sdvo_read_response(encoder, &buf_size, 1); |
934 | 937 | ||
935 | pos = buf; | 938 | pos = buf; |
936 | for (j = 0; j <= buf_size; j += 8) { | 939 | for (j = 0; j <= buf_size; j += 8) { |
937 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_DATA, | 940 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, |
938 | NULL, 0); | 941 | NULL, 0); |
939 | intel_sdvo_read_response(output, pos, 8); | 942 | intel_sdvo_read_response(encoder, pos, 8); |
940 | pos += 8; | 943 | pos += 8; |
941 | } | 944 | } |
942 | } | 945 | } |
943 | } | 946 | } |
944 | #endif | 947 | #endif |
945 | 948 | ||
946 | static void intel_sdvo_set_hdmi_buf(struct intel_output *output, int index, | 949 | static void intel_sdvo_set_hdmi_buf(struct intel_encoder *intel_encoder, |
947 | uint8_t *data, int8_t size, uint8_t tx_rate) | 950 | int index, |
951 | uint8_t *data, int8_t size, uint8_t tx_rate) | ||
948 | { | 952 | { |
949 | uint8_t set_buf_index[2]; | 953 | uint8_t set_buf_index[2]; |
950 | 954 | ||
951 | set_buf_index[0] = index; | 955 | set_buf_index[0] = index; |
952 | set_buf_index[1] = 0; | 956 | set_buf_index[1] = 0; |
953 | 957 | ||
954 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_INDEX, set_buf_index, 2); | 958 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_INDEX, |
959 | set_buf_index, 2); | ||
955 | 960 | ||
956 | for (; size > 0; size -= 8) { | 961 | for (; size > 0; size -= 8) { |
957 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_DATA, data, 8); | 962 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_DATA, data, 8); |
958 | data += 8; | 963 | data += 8; |
959 | } | 964 | } |
960 | 965 | ||
961 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1); | 966 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1); |
962 | } | 967 | } |
963 | 968 | ||
964 | static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size) | 969 | static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size) |
@@ -1033,7 +1038,7 @@ struct dip_infoframe { | |||
1033 | } __attribute__ ((packed)) u; | 1038 | } __attribute__ ((packed)) u; |
1034 | } __attribute__((packed)); | 1039 | } __attribute__((packed)); |
1035 | 1040 | ||
1036 | static void intel_sdvo_set_avi_infoframe(struct intel_output *output, | 1041 | static void intel_sdvo_set_avi_infoframe(struct intel_encoder *intel_encoder, |
1037 | struct drm_display_mode * mode) | 1042 | struct drm_display_mode * mode) |
1038 | { | 1043 | { |
1039 | struct dip_infoframe avi_if = { | 1044 | struct dip_infoframe avi_if = { |
@@ -1044,15 +1049,16 @@ static void intel_sdvo_set_avi_infoframe(struct intel_output *output, | |||
1044 | 1049 | ||
1045 | avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if, | 1050 | avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if, |
1046 | 4 + avi_if.len); | 1051 | 4 + avi_if.len); |
1047 | intel_sdvo_set_hdmi_buf(output, 1, (uint8_t *)&avi_if, 4 + avi_if.len, | 1052 | intel_sdvo_set_hdmi_buf(intel_encoder, 1, (uint8_t *)&avi_if, |
1053 | 4 + avi_if.len, | ||
1048 | SDVO_HBUF_TX_VSYNC); | 1054 | SDVO_HBUF_TX_VSYNC); |
1049 | } | 1055 | } |
1050 | 1056 | ||
1051 | static void intel_sdvo_set_tv_format(struct intel_output *output) | 1057 | static void intel_sdvo_set_tv_format(struct intel_encoder *intel_encoder) |
1052 | { | 1058 | { |
1053 | 1059 | ||
1054 | struct intel_sdvo_tv_format format; | 1060 | struct intel_sdvo_tv_format format; |
1055 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 1061 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1056 | uint32_t format_map, i; | 1062 | uint32_t format_map, i; |
1057 | uint8_t status; | 1063 | uint8_t status; |
1058 | 1064 | ||
@@ -1065,10 +1071,10 @@ static void intel_sdvo_set_tv_format(struct intel_output *output) | |||
1065 | memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ? | 1071 | memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ? |
1066 | sizeof(format) : sizeof(format_map)); | 1072 | sizeof(format) : sizeof(format_map)); |
1067 | 1073 | ||
1068 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, &format_map, | 1074 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TV_FORMAT, &format_map, |
1069 | sizeof(format)); | 1075 | sizeof(format)); |
1070 | 1076 | ||
1071 | status = intel_sdvo_read_response(output, NULL, 0); | 1077 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
1072 | if (status != SDVO_CMD_STATUS_SUCCESS) | 1078 | if (status != SDVO_CMD_STATUS_SUCCESS) |
1073 | DRM_DEBUG_KMS("%s: Failed to set TV format\n", | 1079 | DRM_DEBUG_KMS("%s: Failed to set TV format\n", |
1074 | SDVO_NAME(sdvo_priv)); | 1080 | SDVO_NAME(sdvo_priv)); |
@@ -1078,8 +1084,8 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, | |||
1078 | struct drm_display_mode *mode, | 1084 | struct drm_display_mode *mode, |
1079 | struct drm_display_mode *adjusted_mode) | 1085 | struct drm_display_mode *adjusted_mode) |
1080 | { | 1086 | { |
1081 | struct intel_output *output = enc_to_intel_output(encoder); | 1087 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1082 | struct intel_sdvo_priv *dev_priv = output->dev_priv; | 1088 | struct intel_sdvo_priv *dev_priv = intel_encoder->dev_priv; |
1083 | 1089 | ||
1084 | if (dev_priv->is_tv) { | 1090 | if (dev_priv->is_tv) { |
1085 | struct intel_sdvo_dtd output_dtd; | 1091 | struct intel_sdvo_dtd output_dtd; |
@@ -1094,22 +1100,22 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, | |||
1094 | 1100 | ||
1095 | /* Set output timings */ | 1101 | /* Set output timings */ |
1096 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); | 1102 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1097 | intel_sdvo_set_target_output(output, | 1103 | intel_sdvo_set_target_output(intel_encoder, |
1098 | dev_priv->controlled_output); | 1104 | dev_priv->controlled_output); |
1099 | intel_sdvo_set_output_timing(output, &output_dtd); | 1105 | intel_sdvo_set_output_timing(intel_encoder, &output_dtd); |
1100 | 1106 | ||
1101 | /* Set the input timing to the screen. Assume always input 0. */ | 1107 | /* Set the input timing to the screen. Assume always input 0. */ |
1102 | intel_sdvo_set_target_input(output, true, false); | 1108 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1103 | 1109 | ||
1104 | 1110 | ||
1105 | success = intel_sdvo_create_preferred_input_timing(output, | 1111 | success = intel_sdvo_create_preferred_input_timing(intel_encoder, |
1106 | mode->clock / 10, | 1112 | mode->clock / 10, |
1107 | mode->hdisplay, | 1113 | mode->hdisplay, |
1108 | mode->vdisplay); | 1114 | mode->vdisplay); |
1109 | if (success) { | 1115 | if (success) { |
1110 | struct intel_sdvo_dtd input_dtd; | 1116 | struct intel_sdvo_dtd input_dtd; |
1111 | 1117 | ||
1112 | intel_sdvo_get_preferred_input_timing(output, | 1118 | intel_sdvo_get_preferred_input_timing(intel_encoder, |
1113 | &input_dtd); | 1119 | &input_dtd); |
1114 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); | 1120 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1115 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; | 1121 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; |
@@ -1132,16 +1138,16 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, | |||
1132 | intel_sdvo_get_dtd_from_mode(&output_dtd, | 1138 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
1133 | dev_priv->sdvo_lvds_fixed_mode); | 1139 | dev_priv->sdvo_lvds_fixed_mode); |
1134 | 1140 | ||
1135 | intel_sdvo_set_target_output(output, | 1141 | intel_sdvo_set_target_output(intel_encoder, |
1136 | dev_priv->controlled_output); | 1142 | dev_priv->controlled_output); |
1137 | intel_sdvo_set_output_timing(output, &output_dtd); | 1143 | intel_sdvo_set_output_timing(intel_encoder, &output_dtd); |
1138 | 1144 | ||
1139 | /* Set the input timing to the screen. Assume always input 0. */ | 1145 | /* Set the input timing to the screen. Assume always input 0. */ |
1140 | intel_sdvo_set_target_input(output, true, false); | 1146 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1141 | 1147 | ||
1142 | 1148 | ||
1143 | success = intel_sdvo_create_preferred_input_timing( | 1149 | success = intel_sdvo_create_preferred_input_timing( |
1144 | output, | 1150 | intel_encoder, |
1145 | mode->clock / 10, | 1151 | mode->clock / 10, |
1146 | mode->hdisplay, | 1152 | mode->hdisplay, |
1147 | mode->vdisplay); | 1153 | mode->vdisplay); |
@@ -1149,7 +1155,7 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, | |||
1149 | if (success) { | 1155 | if (success) { |
1150 | struct intel_sdvo_dtd input_dtd; | 1156 | struct intel_sdvo_dtd input_dtd; |
1151 | 1157 | ||
1152 | intel_sdvo_get_preferred_input_timing(output, | 1158 | intel_sdvo_get_preferred_input_timing(intel_encoder, |
1153 | &input_dtd); | 1159 | &input_dtd); |
1154 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); | 1160 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1155 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; | 1161 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; |
@@ -1181,8 +1187,8 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1181 | struct drm_i915_private *dev_priv = dev->dev_private; | 1187 | struct drm_i915_private *dev_priv = dev->dev_private; |
1182 | struct drm_crtc *crtc = encoder->crtc; | 1188 | struct drm_crtc *crtc = encoder->crtc; |
1183 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1189 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1184 | struct intel_output *output = enc_to_intel_output(encoder); | 1190 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1185 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 1191 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1186 | u32 sdvox = 0; | 1192 | u32 sdvox = 0; |
1187 | int sdvo_pixel_multiply; | 1193 | int sdvo_pixel_multiply; |
1188 | struct intel_sdvo_in_out_map in_out; | 1194 | struct intel_sdvo_in_out_map in_out; |
@@ -1201,12 +1207,12 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1201 | in_out.in0 = sdvo_priv->controlled_output; | 1207 | in_out.in0 = sdvo_priv->controlled_output; |
1202 | in_out.in1 = 0; | 1208 | in_out.in1 = 0; |
1203 | 1209 | ||
1204 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_IN_OUT_MAP, | 1210 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_IN_OUT_MAP, |
1205 | &in_out, sizeof(in_out)); | 1211 | &in_out, sizeof(in_out)); |
1206 | status = intel_sdvo_read_response(output, NULL, 0); | 1212 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
1207 | 1213 | ||
1208 | if (sdvo_priv->is_hdmi) { | 1214 | if (sdvo_priv->is_hdmi) { |
1209 | intel_sdvo_set_avi_infoframe(output, mode); | 1215 | intel_sdvo_set_avi_infoframe(intel_encoder, mode); |
1210 | sdvox |= SDVO_AUDIO_ENABLE; | 1216 | sdvox |= SDVO_AUDIO_ENABLE; |
1211 | } | 1217 | } |
1212 | 1218 | ||
@@ -1223,16 +1229,16 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1223 | */ | 1229 | */ |
1224 | if (!sdvo_priv->is_tv && !sdvo_priv->is_lvds) { | 1230 | if (!sdvo_priv->is_tv && !sdvo_priv->is_lvds) { |
1225 | /* Set the output timing to the screen */ | 1231 | /* Set the output timing to the screen */ |
1226 | intel_sdvo_set_target_output(output, | 1232 | intel_sdvo_set_target_output(intel_encoder, |
1227 | sdvo_priv->controlled_output); | 1233 | sdvo_priv->controlled_output); |
1228 | intel_sdvo_set_output_timing(output, &input_dtd); | 1234 | intel_sdvo_set_output_timing(intel_encoder, &input_dtd); |
1229 | } | 1235 | } |
1230 | 1236 | ||
1231 | /* Set the input timing to the screen. Assume always input 0. */ | 1237 | /* Set the input timing to the screen. Assume always input 0. */ |
1232 | intel_sdvo_set_target_input(output, true, false); | 1238 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1233 | 1239 | ||
1234 | if (sdvo_priv->is_tv) | 1240 | if (sdvo_priv->is_tv) |
1235 | intel_sdvo_set_tv_format(output); | 1241 | intel_sdvo_set_tv_format(intel_encoder); |
1236 | 1242 | ||
1237 | /* We would like to use intel_sdvo_create_preferred_input_timing() to | 1243 | /* We would like to use intel_sdvo_create_preferred_input_timing() to |
1238 | * provide the device with a timing it can support, if it supports that | 1244 | * provide the device with a timing it can support, if it supports that |
@@ -1240,29 +1246,29 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1240 | * output the preferred timing, and we don't support that currently. | 1246 | * output the preferred timing, and we don't support that currently. |
1241 | */ | 1247 | */ |
1242 | #if 0 | 1248 | #if 0 |
1243 | success = intel_sdvo_create_preferred_input_timing(output, clock, | 1249 | success = intel_sdvo_create_preferred_input_timing(encoder, clock, |
1244 | width, height); | 1250 | width, height); |
1245 | if (success) { | 1251 | if (success) { |
1246 | struct intel_sdvo_dtd *input_dtd; | 1252 | struct intel_sdvo_dtd *input_dtd; |
1247 | 1253 | ||
1248 | intel_sdvo_get_preferred_input_timing(output, &input_dtd); | 1254 | intel_sdvo_get_preferred_input_timing(encoder, &input_dtd); |
1249 | intel_sdvo_set_input_timing(output, &input_dtd); | 1255 | intel_sdvo_set_input_timing(encoder, &input_dtd); |
1250 | } | 1256 | } |
1251 | #else | 1257 | #else |
1252 | intel_sdvo_set_input_timing(output, &input_dtd); | 1258 | intel_sdvo_set_input_timing(intel_encoder, &input_dtd); |
1253 | #endif | 1259 | #endif |
1254 | 1260 | ||
1255 | switch (intel_sdvo_get_pixel_multiplier(mode)) { | 1261 | switch (intel_sdvo_get_pixel_multiplier(mode)) { |
1256 | case 1: | 1262 | case 1: |
1257 | intel_sdvo_set_clock_rate_mult(output, | 1263 | intel_sdvo_set_clock_rate_mult(intel_encoder, |
1258 | SDVO_CLOCK_RATE_MULT_1X); | 1264 | SDVO_CLOCK_RATE_MULT_1X); |
1259 | break; | 1265 | break; |
1260 | case 2: | 1266 | case 2: |
1261 | intel_sdvo_set_clock_rate_mult(output, | 1267 | intel_sdvo_set_clock_rate_mult(intel_encoder, |
1262 | SDVO_CLOCK_RATE_MULT_2X); | 1268 | SDVO_CLOCK_RATE_MULT_2X); |
1263 | break; | 1269 | break; |
1264 | case 4: | 1270 | case 4: |
1265 | intel_sdvo_set_clock_rate_mult(output, | 1271 | intel_sdvo_set_clock_rate_mult(intel_encoder, |
1266 | SDVO_CLOCK_RATE_MULT_4X); | 1272 | SDVO_CLOCK_RATE_MULT_4X); |
1267 | break; | 1273 | break; |
1268 | } | 1274 | } |
@@ -1273,8 +1279,8 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1273 | SDVO_VSYNC_ACTIVE_HIGH | | 1279 | SDVO_VSYNC_ACTIVE_HIGH | |
1274 | SDVO_HSYNC_ACTIVE_HIGH; | 1280 | SDVO_HSYNC_ACTIVE_HIGH; |
1275 | } else { | 1281 | } else { |
1276 | sdvox |= I915_READ(sdvo_priv->output_device); | 1282 | sdvox |= I915_READ(sdvo_priv->sdvo_reg); |
1277 | switch (sdvo_priv->output_device) { | 1283 | switch (sdvo_priv->sdvo_reg) { |
1278 | case SDVOB: | 1284 | case SDVOB: |
1279 | sdvox &= SDVOB_PRESERVE_MASK; | 1285 | sdvox &= SDVOB_PRESERVE_MASK; |
1280 | break; | 1286 | break; |
@@ -1298,26 +1304,26 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1298 | 1304 | ||
1299 | if (sdvo_priv->sdvo_flags & SDVO_NEED_TO_STALL) | 1305 | if (sdvo_priv->sdvo_flags & SDVO_NEED_TO_STALL) |
1300 | sdvox |= SDVO_STALL_SELECT; | 1306 | sdvox |= SDVO_STALL_SELECT; |
1301 | intel_sdvo_write_sdvox(output, sdvox); | 1307 | intel_sdvo_write_sdvox(intel_encoder, sdvox); |
1302 | } | 1308 | } |
1303 | 1309 | ||
1304 | static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) | 1310 | static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) |
1305 | { | 1311 | { |
1306 | struct drm_device *dev = encoder->dev; | 1312 | struct drm_device *dev = encoder->dev; |
1307 | struct drm_i915_private *dev_priv = dev->dev_private; | 1313 | struct drm_i915_private *dev_priv = dev->dev_private; |
1308 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 1314 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1309 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1315 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1310 | u32 temp; | 1316 | u32 temp; |
1311 | 1317 | ||
1312 | if (mode != DRM_MODE_DPMS_ON) { | 1318 | if (mode != DRM_MODE_DPMS_ON) { |
1313 | intel_sdvo_set_active_outputs(intel_output, 0); | 1319 | intel_sdvo_set_active_outputs(intel_encoder, 0); |
1314 | if (0) | 1320 | if (0) |
1315 | intel_sdvo_set_encoder_power_state(intel_output, mode); | 1321 | intel_sdvo_set_encoder_power_state(intel_encoder, mode); |
1316 | 1322 | ||
1317 | if (mode == DRM_MODE_DPMS_OFF) { | 1323 | if (mode == DRM_MODE_DPMS_OFF) { |
1318 | temp = I915_READ(sdvo_priv->output_device); | 1324 | temp = I915_READ(sdvo_priv->sdvo_reg); |
1319 | if ((temp & SDVO_ENABLE) != 0) { | 1325 | if ((temp & SDVO_ENABLE) != 0) { |
1320 | intel_sdvo_write_sdvox(intel_output, temp & ~SDVO_ENABLE); | 1326 | intel_sdvo_write_sdvox(intel_encoder, temp & ~SDVO_ENABLE); |
1321 | } | 1327 | } |
1322 | } | 1328 | } |
1323 | } else { | 1329 | } else { |
@@ -1325,13 +1331,13 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) | |||
1325 | int i; | 1331 | int i; |
1326 | u8 status; | 1332 | u8 status; |
1327 | 1333 | ||
1328 | temp = I915_READ(sdvo_priv->output_device); | 1334 | temp = I915_READ(sdvo_priv->sdvo_reg); |
1329 | if ((temp & SDVO_ENABLE) == 0) | 1335 | if ((temp & SDVO_ENABLE) == 0) |
1330 | intel_sdvo_write_sdvox(intel_output, temp | SDVO_ENABLE); | 1336 | intel_sdvo_write_sdvox(intel_encoder, temp | SDVO_ENABLE); |
1331 | for (i = 0; i < 2; i++) | 1337 | for (i = 0; i < 2; i++) |
1332 | intel_wait_for_vblank(dev); | 1338 | intel_wait_for_vblank(dev); |
1333 | 1339 | ||
1334 | status = intel_sdvo_get_trained_inputs(intel_output, &input1, | 1340 | status = intel_sdvo_get_trained_inputs(intel_encoder, &input1, |
1335 | &input2); | 1341 | &input2); |
1336 | 1342 | ||
1337 | 1343 | ||
@@ -1345,8 +1351,8 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) | |||
1345 | } | 1351 | } |
1346 | 1352 | ||
1347 | if (0) | 1353 | if (0) |
1348 | intel_sdvo_set_encoder_power_state(intel_output, mode); | 1354 | intel_sdvo_set_encoder_power_state(intel_encoder, mode); |
1349 | intel_sdvo_set_active_outputs(intel_output, sdvo_priv->controlled_output); | 1355 | intel_sdvo_set_active_outputs(intel_encoder, sdvo_priv->controlled_output); |
1350 | } | 1356 | } |
1351 | return; | 1357 | return; |
1352 | } | 1358 | } |
@@ -1355,22 +1361,22 @@ static void intel_sdvo_save(struct drm_connector *connector) | |||
1355 | { | 1361 | { |
1356 | struct drm_device *dev = connector->dev; | 1362 | struct drm_device *dev = connector->dev; |
1357 | struct drm_i915_private *dev_priv = dev->dev_private; | 1363 | struct drm_i915_private *dev_priv = dev->dev_private; |
1358 | struct intel_output *intel_output = to_intel_output(connector); | 1364 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1359 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1365 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1360 | int o; | 1366 | int o; |
1361 | 1367 | ||
1362 | sdvo_priv->save_sdvo_mult = intel_sdvo_get_clock_rate_mult(intel_output); | 1368 | sdvo_priv->save_sdvo_mult = intel_sdvo_get_clock_rate_mult(intel_encoder); |
1363 | intel_sdvo_get_active_outputs(intel_output, &sdvo_priv->save_active_outputs); | 1369 | intel_sdvo_get_active_outputs(intel_encoder, &sdvo_priv->save_active_outputs); |
1364 | 1370 | ||
1365 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { | 1371 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { |
1366 | intel_sdvo_set_target_input(intel_output, true, false); | 1372 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1367 | intel_sdvo_get_input_timing(intel_output, | 1373 | intel_sdvo_get_input_timing(intel_encoder, |
1368 | &sdvo_priv->save_input_dtd_1); | 1374 | &sdvo_priv->save_input_dtd_1); |
1369 | } | 1375 | } |
1370 | 1376 | ||
1371 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { | 1377 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { |
1372 | intel_sdvo_set_target_input(intel_output, false, true); | 1378 | intel_sdvo_set_target_input(intel_encoder, false, true); |
1373 | intel_sdvo_get_input_timing(intel_output, | 1379 | intel_sdvo_get_input_timing(intel_encoder, |
1374 | &sdvo_priv->save_input_dtd_2); | 1380 | &sdvo_priv->save_input_dtd_2); |
1375 | } | 1381 | } |
1376 | 1382 | ||
@@ -1379,8 +1385,8 @@ static void intel_sdvo_save(struct drm_connector *connector) | |||
1379 | u16 this_output = (1 << o); | 1385 | u16 this_output = (1 << o); |
1380 | if (sdvo_priv->caps.output_flags & this_output) | 1386 | if (sdvo_priv->caps.output_flags & this_output) |
1381 | { | 1387 | { |
1382 | intel_sdvo_set_target_output(intel_output, this_output); | 1388 | intel_sdvo_set_target_output(intel_encoder, this_output); |
1383 | intel_sdvo_get_output_timing(intel_output, | 1389 | intel_sdvo_get_output_timing(intel_encoder, |
1384 | &sdvo_priv->save_output_dtd[o]); | 1390 | &sdvo_priv->save_output_dtd[o]); |
1385 | } | 1391 | } |
1386 | } | 1392 | } |
@@ -1388,66 +1394,66 @@ static void intel_sdvo_save(struct drm_connector *connector) | |||
1388 | /* XXX: Save TV format/enhancements. */ | 1394 | /* XXX: Save TV format/enhancements. */ |
1389 | } | 1395 | } |
1390 | 1396 | ||
1391 | sdvo_priv->save_SDVOX = I915_READ(sdvo_priv->output_device); | 1397 | sdvo_priv->save_SDVOX = I915_READ(sdvo_priv->sdvo_reg); |
1392 | } | 1398 | } |
1393 | 1399 | ||
1394 | static void intel_sdvo_restore(struct drm_connector *connector) | 1400 | static void intel_sdvo_restore(struct drm_connector *connector) |
1395 | { | 1401 | { |
1396 | struct drm_device *dev = connector->dev; | 1402 | struct drm_device *dev = connector->dev; |
1397 | struct intel_output *intel_output = to_intel_output(connector); | 1403 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1398 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1404 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1399 | int o; | 1405 | int o; |
1400 | int i; | 1406 | int i; |
1401 | bool input1, input2; | 1407 | bool input1, input2; |
1402 | u8 status; | 1408 | u8 status; |
1403 | 1409 | ||
1404 | intel_sdvo_set_active_outputs(intel_output, 0); | 1410 | intel_sdvo_set_active_outputs(intel_encoder, 0); |
1405 | 1411 | ||
1406 | for (o = SDVO_OUTPUT_FIRST; o <= SDVO_OUTPUT_LAST; o++) | 1412 | for (o = SDVO_OUTPUT_FIRST; o <= SDVO_OUTPUT_LAST; o++) |
1407 | { | 1413 | { |
1408 | u16 this_output = (1 << o); | 1414 | u16 this_output = (1 << o); |
1409 | if (sdvo_priv->caps.output_flags & this_output) { | 1415 | if (sdvo_priv->caps.output_flags & this_output) { |
1410 | intel_sdvo_set_target_output(intel_output, this_output); | 1416 | intel_sdvo_set_target_output(intel_encoder, this_output); |
1411 | intel_sdvo_set_output_timing(intel_output, &sdvo_priv->save_output_dtd[o]); | 1417 | intel_sdvo_set_output_timing(intel_encoder, &sdvo_priv->save_output_dtd[o]); |
1412 | } | 1418 | } |
1413 | } | 1419 | } |
1414 | 1420 | ||
1415 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { | 1421 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { |
1416 | intel_sdvo_set_target_input(intel_output, true, false); | 1422 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1417 | intel_sdvo_set_input_timing(intel_output, &sdvo_priv->save_input_dtd_1); | 1423 | intel_sdvo_set_input_timing(intel_encoder, &sdvo_priv->save_input_dtd_1); |
1418 | } | 1424 | } |
1419 | 1425 | ||
1420 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { | 1426 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { |
1421 | intel_sdvo_set_target_input(intel_output, false, true); | 1427 | intel_sdvo_set_target_input(intel_encoder, false, true); |
1422 | intel_sdvo_set_input_timing(intel_output, &sdvo_priv->save_input_dtd_2); | 1428 | intel_sdvo_set_input_timing(intel_encoder, &sdvo_priv->save_input_dtd_2); |
1423 | } | 1429 | } |
1424 | 1430 | ||
1425 | intel_sdvo_set_clock_rate_mult(intel_output, sdvo_priv->save_sdvo_mult); | 1431 | intel_sdvo_set_clock_rate_mult(intel_encoder, sdvo_priv->save_sdvo_mult); |
1426 | 1432 | ||
1427 | if (sdvo_priv->is_tv) { | 1433 | if (sdvo_priv->is_tv) { |
1428 | /* XXX: Restore TV format/enhancements. */ | 1434 | /* XXX: Restore TV format/enhancements. */ |
1429 | } | 1435 | } |
1430 | 1436 | ||
1431 | intel_sdvo_write_sdvox(intel_output, sdvo_priv->save_SDVOX); | 1437 | intel_sdvo_write_sdvox(intel_encoder, sdvo_priv->save_SDVOX); |
1432 | 1438 | ||
1433 | if (sdvo_priv->save_SDVOX & SDVO_ENABLE) | 1439 | if (sdvo_priv->save_SDVOX & SDVO_ENABLE) |
1434 | { | 1440 | { |
1435 | for (i = 0; i < 2; i++) | 1441 | for (i = 0; i < 2; i++) |
1436 | intel_wait_for_vblank(dev); | 1442 | intel_wait_for_vblank(dev); |
1437 | status = intel_sdvo_get_trained_inputs(intel_output, &input1, &input2); | 1443 | status = intel_sdvo_get_trained_inputs(intel_encoder, &input1, &input2); |
1438 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) | 1444 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) |
1439 | DRM_DEBUG_KMS("First %s output reported failure to " | 1445 | DRM_DEBUG_KMS("First %s output reported failure to " |
1440 | "sync\n", SDVO_NAME(sdvo_priv)); | 1446 | "sync\n", SDVO_NAME(sdvo_priv)); |
1441 | } | 1447 | } |
1442 | 1448 | ||
1443 | intel_sdvo_set_active_outputs(intel_output, sdvo_priv->save_active_outputs); | 1449 | intel_sdvo_set_active_outputs(intel_encoder, sdvo_priv->save_active_outputs); |
1444 | } | 1450 | } |
1445 | 1451 | ||
1446 | static int intel_sdvo_mode_valid(struct drm_connector *connector, | 1452 | static int intel_sdvo_mode_valid(struct drm_connector *connector, |
1447 | struct drm_display_mode *mode) | 1453 | struct drm_display_mode *mode) |
1448 | { | 1454 | { |
1449 | struct intel_output *intel_output = to_intel_output(connector); | 1455 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1450 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1456 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1451 | 1457 | ||
1452 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | 1458 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
1453 | return MODE_NO_DBLESCAN; | 1459 | return MODE_NO_DBLESCAN; |
@@ -1472,12 +1478,12 @@ static int intel_sdvo_mode_valid(struct drm_connector *connector, | |||
1472 | return MODE_OK; | 1478 | return MODE_OK; |
1473 | } | 1479 | } |
1474 | 1480 | ||
1475 | static bool intel_sdvo_get_capabilities(struct intel_output *intel_output, struct intel_sdvo_caps *caps) | 1481 | static bool intel_sdvo_get_capabilities(struct intel_encoder *intel_encoder, struct intel_sdvo_caps *caps) |
1476 | { | 1482 | { |
1477 | u8 status; | 1483 | u8 status; |
1478 | 1484 | ||
1479 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_DEVICE_CAPS, NULL, 0); | 1485 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_DEVICE_CAPS, NULL, 0); |
1480 | status = intel_sdvo_read_response(intel_output, caps, sizeof(*caps)); | 1486 | status = intel_sdvo_read_response(intel_encoder, caps, sizeof(*caps)); |
1481 | if (status != SDVO_CMD_STATUS_SUCCESS) | 1487 | if (status != SDVO_CMD_STATUS_SUCCESS) |
1482 | return false; | 1488 | return false; |
1483 | 1489 | ||
@@ -1487,22 +1493,22 @@ static bool intel_sdvo_get_capabilities(struct intel_output *intel_output, struc | |||
1487 | struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB) | 1493 | struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB) |
1488 | { | 1494 | { |
1489 | struct drm_connector *connector = NULL; | 1495 | struct drm_connector *connector = NULL; |
1490 | struct intel_output *iout = NULL; | 1496 | struct intel_encoder *iout = NULL; |
1491 | struct intel_sdvo_priv *sdvo; | 1497 | struct intel_sdvo_priv *sdvo; |
1492 | 1498 | ||
1493 | /* find the sdvo connector */ | 1499 | /* find the sdvo connector */ |
1494 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 1500 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
1495 | iout = to_intel_output(connector); | 1501 | iout = to_intel_encoder(connector); |
1496 | 1502 | ||
1497 | if (iout->type != INTEL_OUTPUT_SDVO) | 1503 | if (iout->type != INTEL_OUTPUT_SDVO) |
1498 | continue; | 1504 | continue; |
1499 | 1505 | ||
1500 | sdvo = iout->dev_priv; | 1506 | sdvo = iout->dev_priv; |
1501 | 1507 | ||
1502 | if (sdvo->output_device == SDVOB && sdvoB) | 1508 | if (sdvo->sdvo_reg == SDVOB && sdvoB) |
1503 | return connector; | 1509 | return connector; |
1504 | 1510 | ||
1505 | if (sdvo->output_device == SDVOC && !sdvoB) | 1511 | if (sdvo->sdvo_reg == SDVOC && !sdvoB) |
1506 | return connector; | 1512 | return connector; |
1507 | 1513 | ||
1508 | } | 1514 | } |
@@ -1514,16 +1520,16 @@ int intel_sdvo_supports_hotplug(struct drm_connector *connector) | |||
1514 | { | 1520 | { |
1515 | u8 response[2]; | 1521 | u8 response[2]; |
1516 | u8 status; | 1522 | u8 status; |
1517 | struct intel_output *intel_output; | 1523 | struct intel_encoder *intel_encoder; |
1518 | DRM_DEBUG_KMS("\n"); | 1524 | DRM_DEBUG_KMS("\n"); |
1519 | 1525 | ||
1520 | if (!connector) | 1526 | if (!connector) |
1521 | return 0; | 1527 | return 0; |
1522 | 1528 | ||
1523 | intel_output = to_intel_output(connector); | 1529 | intel_encoder = to_intel_encoder(connector); |
1524 | 1530 | ||
1525 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); | 1531 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); |
1526 | status = intel_sdvo_read_response(intel_output, &response, 2); | 1532 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
1527 | 1533 | ||
1528 | if (response[0] !=0) | 1534 | if (response[0] !=0) |
1529 | return 1; | 1535 | return 1; |
@@ -1535,30 +1541,30 @@ void intel_sdvo_set_hotplug(struct drm_connector *connector, int on) | |||
1535 | { | 1541 | { |
1536 | u8 response[2]; | 1542 | u8 response[2]; |
1537 | u8 status; | 1543 | u8 status; |
1538 | struct intel_output *intel_output = to_intel_output(connector); | 1544 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1539 | 1545 | ||
1540 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); | 1546 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); |
1541 | intel_sdvo_read_response(intel_output, &response, 2); | 1547 | intel_sdvo_read_response(intel_encoder, &response, 2); |
1542 | 1548 | ||
1543 | if (on) { | 1549 | if (on) { |
1544 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); | 1550 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); |
1545 | status = intel_sdvo_read_response(intel_output, &response, 2); | 1551 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
1546 | 1552 | ||
1547 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); | 1553 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); |
1548 | } else { | 1554 | } else { |
1549 | response[0] = 0; | 1555 | response[0] = 0; |
1550 | response[1] = 0; | 1556 | response[1] = 0; |
1551 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); | 1557 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); |
1552 | } | 1558 | } |
1553 | 1559 | ||
1554 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); | 1560 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); |
1555 | intel_sdvo_read_response(intel_output, &response, 2); | 1561 | intel_sdvo_read_response(intel_encoder, &response, 2); |
1556 | } | 1562 | } |
1557 | 1563 | ||
1558 | static bool | 1564 | static bool |
1559 | intel_sdvo_multifunc_encoder(struct intel_output *intel_output) | 1565 | intel_sdvo_multifunc_encoder(struct intel_encoder *intel_encoder) |
1560 | { | 1566 | { |
1561 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1567 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1562 | int caps = 0; | 1568 | int caps = 0; |
1563 | 1569 | ||
1564 | if (sdvo_priv->caps.output_flags & | 1570 | if (sdvo_priv->caps.output_flags & |
@@ -1592,11 +1598,11 @@ static struct drm_connector * | |||
1592 | intel_find_analog_connector(struct drm_device *dev) | 1598 | intel_find_analog_connector(struct drm_device *dev) |
1593 | { | 1599 | { |
1594 | struct drm_connector *connector; | 1600 | struct drm_connector *connector; |
1595 | struct intel_output *intel_output; | 1601 | struct intel_encoder *intel_encoder; |
1596 | 1602 | ||
1597 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 1603 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
1598 | intel_output = to_intel_output(connector); | 1604 | intel_encoder = to_intel_encoder(connector); |
1599 | if (intel_output->type == INTEL_OUTPUT_ANALOG) | 1605 | if (intel_encoder->type == INTEL_OUTPUT_ANALOG) |
1600 | return connector; | 1606 | return connector; |
1601 | } | 1607 | } |
1602 | return NULL; | 1608 | return NULL; |
@@ -1621,16 +1627,16 @@ intel_analog_is_connected(struct drm_device *dev) | |||
1621 | enum drm_connector_status | 1627 | enum drm_connector_status |
1622 | intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) | 1628 | intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) |
1623 | { | 1629 | { |
1624 | struct intel_output *intel_output = to_intel_output(connector); | 1630 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1625 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1631 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1626 | enum drm_connector_status status = connector_status_connected; | 1632 | enum drm_connector_status status = connector_status_connected; |
1627 | struct edid *edid = NULL; | 1633 | struct edid *edid = NULL; |
1628 | 1634 | ||
1629 | edid = drm_get_edid(&intel_output->base, | 1635 | edid = drm_get_edid(&intel_encoder->base, |
1630 | intel_output->ddc_bus); | 1636 | intel_encoder->ddc_bus); |
1631 | 1637 | ||
1632 | /* This is only applied to SDVO cards with multiple outputs */ | 1638 | /* This is only applied to SDVO cards with multiple outputs */ |
1633 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_output)) { | 1639 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_encoder)) { |
1634 | uint8_t saved_ddc, temp_ddc; | 1640 | uint8_t saved_ddc, temp_ddc; |
1635 | saved_ddc = sdvo_priv->ddc_bus; | 1641 | saved_ddc = sdvo_priv->ddc_bus; |
1636 | temp_ddc = sdvo_priv->ddc_bus >> 1; | 1642 | temp_ddc = sdvo_priv->ddc_bus >> 1; |
@@ -1640,8 +1646,8 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) | |||
1640 | */ | 1646 | */ |
1641 | while(temp_ddc > 1) { | 1647 | while(temp_ddc > 1) { |
1642 | sdvo_priv->ddc_bus = temp_ddc; | 1648 | sdvo_priv->ddc_bus = temp_ddc; |
1643 | edid = drm_get_edid(&intel_output->base, | 1649 | edid = drm_get_edid(&intel_encoder->base, |
1644 | intel_output->ddc_bus); | 1650 | intel_encoder->ddc_bus); |
1645 | if (edid) { | 1651 | if (edid) { |
1646 | /* | 1652 | /* |
1647 | * When we can get the EDID, maybe it is the | 1653 | * When we can get the EDID, maybe it is the |
@@ -1660,8 +1666,8 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) | |||
1660 | */ | 1666 | */ |
1661 | if (edid == NULL && | 1667 | if (edid == NULL && |
1662 | sdvo_priv->analog_ddc_bus && | 1668 | sdvo_priv->analog_ddc_bus && |
1663 | !intel_analog_is_connected(intel_output->base.dev)) | 1669 | !intel_analog_is_connected(intel_encoder->base.dev)) |
1664 | edid = drm_get_edid(&intel_output->base, | 1670 | edid = drm_get_edid(&intel_encoder->base, |
1665 | sdvo_priv->analog_ddc_bus); | 1671 | sdvo_priv->analog_ddc_bus); |
1666 | if (edid != NULL) { | 1672 | if (edid != NULL) { |
1667 | /* Don't report the output as connected if it's a DVI-I | 1673 | /* Don't report the output as connected if it's a DVI-I |
@@ -1676,7 +1682,7 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) | |||
1676 | } | 1682 | } |
1677 | 1683 | ||
1678 | kfree(edid); | 1684 | kfree(edid); |
1679 | intel_output->base.display_info.raw_edid = NULL; | 1685 | intel_encoder->base.display_info.raw_edid = NULL; |
1680 | 1686 | ||
1681 | } else if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) | 1687 | } else if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) |
1682 | status = connector_status_disconnected; | 1688 | status = connector_status_disconnected; |
@@ -1688,16 +1694,16 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect | |||
1688 | { | 1694 | { |
1689 | uint16_t response; | 1695 | uint16_t response; |
1690 | u8 status; | 1696 | u8 status; |
1691 | struct intel_output *intel_output = to_intel_output(connector); | 1697 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1692 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1698 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1693 | 1699 | ||
1694 | intel_sdvo_write_cmd(intel_output, | 1700 | intel_sdvo_write_cmd(intel_encoder, |
1695 | SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0); | 1701 | SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0); |
1696 | if (sdvo_priv->is_tv) { | 1702 | if (sdvo_priv->is_tv) { |
1697 | /* add 30ms delay when the output type is SDVO-TV */ | 1703 | /* add 30ms delay when the output type is SDVO-TV */ |
1698 | mdelay(30); | 1704 | mdelay(30); |
1699 | } | 1705 | } |
1700 | status = intel_sdvo_read_response(intel_output, &response, 2); | 1706 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
1701 | 1707 | ||
1702 | DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8); | 1708 | DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8); |
1703 | 1709 | ||
@@ -1707,10 +1713,10 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect | |||
1707 | if (response == 0) | 1713 | if (response == 0) |
1708 | return connector_status_disconnected; | 1714 | return connector_status_disconnected; |
1709 | 1715 | ||
1710 | if (intel_sdvo_multifunc_encoder(intel_output) && | 1716 | if (intel_sdvo_multifunc_encoder(intel_encoder) && |
1711 | sdvo_priv->attached_output != response) { | 1717 | sdvo_priv->attached_output != response) { |
1712 | if (sdvo_priv->controlled_output != response && | 1718 | if (sdvo_priv->controlled_output != response && |
1713 | intel_sdvo_output_setup(intel_output, response) != true) | 1719 | intel_sdvo_output_setup(intel_encoder, response) != true) |
1714 | return connector_status_unknown; | 1720 | return connector_status_unknown; |
1715 | sdvo_priv->attached_output = response; | 1721 | sdvo_priv->attached_output = response; |
1716 | } | 1722 | } |
@@ -1719,12 +1725,12 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect | |||
1719 | 1725 | ||
1720 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) | 1726 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
1721 | { | 1727 | { |
1722 | struct intel_output *intel_output = to_intel_output(connector); | 1728 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1723 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1729 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1724 | int num_modes; | 1730 | int num_modes; |
1725 | 1731 | ||
1726 | /* set the bus switch and get the modes */ | 1732 | /* set the bus switch and get the modes */ |
1727 | num_modes = intel_ddc_get_modes(intel_output); | 1733 | num_modes = intel_ddc_get_modes(intel_encoder); |
1728 | 1734 | ||
1729 | /* | 1735 | /* |
1730 | * Mac mini hack. On this device, the DVI-I connector shares one DDC | 1736 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
@@ -1734,17 +1740,17 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) | |||
1734 | */ | 1740 | */ |
1735 | if (num_modes == 0 && | 1741 | if (num_modes == 0 && |
1736 | sdvo_priv->analog_ddc_bus && | 1742 | sdvo_priv->analog_ddc_bus && |
1737 | !intel_analog_is_connected(intel_output->base.dev)) { | 1743 | !intel_analog_is_connected(intel_encoder->base.dev)) { |
1738 | struct i2c_adapter *digital_ddc_bus; | 1744 | struct i2c_adapter *digital_ddc_bus; |
1739 | 1745 | ||
1740 | /* Switch to the analog ddc bus and try that | 1746 | /* Switch to the analog ddc bus and try that |
1741 | */ | 1747 | */ |
1742 | digital_ddc_bus = intel_output->ddc_bus; | 1748 | digital_ddc_bus = intel_encoder->ddc_bus; |
1743 | intel_output->ddc_bus = sdvo_priv->analog_ddc_bus; | 1749 | intel_encoder->ddc_bus = sdvo_priv->analog_ddc_bus; |
1744 | 1750 | ||
1745 | (void) intel_ddc_get_modes(intel_output); | 1751 | (void) intel_ddc_get_modes(intel_encoder); |
1746 | 1752 | ||
1747 | intel_output->ddc_bus = digital_ddc_bus; | 1753 | intel_encoder->ddc_bus = digital_ddc_bus; |
1748 | } | 1754 | } |
1749 | } | 1755 | } |
1750 | 1756 | ||
@@ -1815,7 +1821,7 @@ struct drm_display_mode sdvo_tv_modes[] = { | |||
1815 | 1821 | ||
1816 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) | 1822 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
1817 | { | 1823 | { |
1818 | struct intel_output *output = to_intel_output(connector); | 1824 | struct intel_encoder *output = to_intel_encoder(connector); |
1819 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 1825 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
1820 | struct intel_sdvo_sdtv_resolution_request tv_res; | 1826 | struct intel_sdvo_sdtv_resolution_request tv_res; |
1821 | uint32_t reply = 0, format_map = 0; | 1827 | uint32_t reply = 0, format_map = 0; |
@@ -1857,9 +1863,9 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector) | |||
1857 | 1863 | ||
1858 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) | 1864 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
1859 | { | 1865 | { |
1860 | struct intel_output *intel_output = to_intel_output(connector); | 1866 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1861 | struct drm_i915_private *dev_priv = connector->dev->dev_private; | 1867 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1862 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1868 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1863 | struct drm_display_mode *newmode; | 1869 | struct drm_display_mode *newmode; |
1864 | 1870 | ||
1865 | /* | 1871 | /* |
@@ -1867,7 +1873,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) | |||
1867 | * Assume that the preferred modes are | 1873 | * Assume that the preferred modes are |
1868 | * arranged in priority order. | 1874 | * arranged in priority order. |
1869 | */ | 1875 | */ |
1870 | intel_ddc_get_modes(intel_output); | 1876 | intel_ddc_get_modes(intel_encoder); |
1871 | if (list_empty(&connector->probed_modes) == false) | 1877 | if (list_empty(&connector->probed_modes) == false) |
1872 | goto end; | 1878 | goto end; |
1873 | 1879 | ||
@@ -1896,7 +1902,7 @@ end: | |||
1896 | 1902 | ||
1897 | static int intel_sdvo_get_modes(struct drm_connector *connector) | 1903 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
1898 | { | 1904 | { |
1899 | struct intel_output *output = to_intel_output(connector); | 1905 | struct intel_encoder *output = to_intel_encoder(connector); |
1900 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 1906 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
1901 | 1907 | ||
1902 | if (sdvo_priv->is_tv) | 1908 | if (sdvo_priv->is_tv) |
@@ -1914,8 +1920,8 @@ static int intel_sdvo_get_modes(struct drm_connector *connector) | |||
1914 | static | 1920 | static |
1915 | void intel_sdvo_destroy_enhance_property(struct drm_connector *connector) | 1921 | void intel_sdvo_destroy_enhance_property(struct drm_connector *connector) |
1916 | { | 1922 | { |
1917 | struct intel_output *intel_output = to_intel_output(connector); | 1923 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1918 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1924 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1919 | struct drm_device *dev = connector->dev; | 1925 | struct drm_device *dev = connector->dev; |
1920 | 1926 | ||
1921 | if (sdvo_priv->is_tv) { | 1927 | if (sdvo_priv->is_tv) { |
@@ -1952,13 +1958,13 @@ void intel_sdvo_destroy_enhance_property(struct drm_connector *connector) | |||
1952 | 1958 | ||
1953 | static void intel_sdvo_destroy(struct drm_connector *connector) | 1959 | static void intel_sdvo_destroy(struct drm_connector *connector) |
1954 | { | 1960 | { |
1955 | struct intel_output *intel_output = to_intel_output(connector); | 1961 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1956 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1962 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1957 | 1963 | ||
1958 | if (intel_output->i2c_bus) | 1964 | if (intel_encoder->i2c_bus) |
1959 | intel_i2c_destroy(intel_output->i2c_bus); | 1965 | intel_i2c_destroy(intel_encoder->i2c_bus); |
1960 | if (intel_output->ddc_bus) | 1966 | if (intel_encoder->ddc_bus) |
1961 | intel_i2c_destroy(intel_output->ddc_bus); | 1967 | intel_i2c_destroy(intel_encoder->ddc_bus); |
1962 | if (sdvo_priv->analog_ddc_bus) | 1968 | if (sdvo_priv->analog_ddc_bus) |
1963 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); | 1969 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); |
1964 | 1970 | ||
@@ -1976,7 +1982,7 @@ static void intel_sdvo_destroy(struct drm_connector *connector) | |||
1976 | drm_sysfs_connector_remove(connector); | 1982 | drm_sysfs_connector_remove(connector); |
1977 | drm_connector_cleanup(connector); | 1983 | drm_connector_cleanup(connector); |
1978 | 1984 | ||
1979 | kfree(intel_output); | 1985 | kfree(intel_encoder); |
1980 | } | 1986 | } |
1981 | 1987 | ||
1982 | static int | 1988 | static int |
@@ -1984,9 +1990,9 @@ intel_sdvo_set_property(struct drm_connector *connector, | |||
1984 | struct drm_property *property, | 1990 | struct drm_property *property, |
1985 | uint64_t val) | 1991 | uint64_t val) |
1986 | { | 1992 | { |
1987 | struct intel_output *intel_output = to_intel_output(connector); | 1993 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1988 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1994 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1989 | struct drm_encoder *encoder = &intel_output->enc; | 1995 | struct drm_encoder *encoder = &intel_encoder->enc; |
1990 | struct drm_crtc *crtc = encoder->crtc; | 1996 | struct drm_crtc *crtc = encoder->crtc; |
1991 | int ret = 0; | 1997 | int ret = 0; |
1992 | bool changed = false; | 1998 | bool changed = false; |
@@ -2094,8 +2100,8 @@ intel_sdvo_set_property(struct drm_connector *connector, | |||
2094 | sdvo_priv->cur_brightness = temp_value; | 2100 | sdvo_priv->cur_brightness = temp_value; |
2095 | } | 2101 | } |
2096 | if (cmd) { | 2102 | if (cmd) { |
2097 | intel_sdvo_write_cmd(intel_output, cmd, &temp_value, 2); | 2103 | intel_sdvo_write_cmd(intel_encoder, cmd, &temp_value, 2); |
2098 | status = intel_sdvo_read_response(intel_output, | 2104 | status = intel_sdvo_read_response(intel_encoder, |
2099 | NULL, 0); | 2105 | NULL, 0); |
2100 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2106 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2101 | DRM_DEBUG_KMS("Incorrect SDVO command \n"); | 2107 | DRM_DEBUG_KMS("Incorrect SDVO command \n"); |
@@ -2190,7 +2196,7 @@ intel_sdvo_select_ddc_bus(struct intel_sdvo_priv *dev_priv) | |||
2190 | } | 2196 | } |
2191 | 2197 | ||
2192 | static bool | 2198 | static bool |
2193 | intel_sdvo_get_digital_encoding_mode(struct intel_output *output) | 2199 | intel_sdvo_get_digital_encoding_mode(struct intel_encoder *output) |
2194 | { | 2200 | { |
2195 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 2201 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
2196 | uint8_t status; | 2202 | uint8_t status; |
@@ -2204,42 +2210,42 @@ intel_sdvo_get_digital_encoding_mode(struct intel_output *output) | |||
2204 | return true; | 2210 | return true; |
2205 | } | 2211 | } |
2206 | 2212 | ||
2207 | static struct intel_output * | 2213 | static struct intel_encoder * |
2208 | intel_sdvo_chan_to_intel_output(struct intel_i2c_chan *chan) | 2214 | intel_sdvo_chan_to_intel_encoder(struct intel_i2c_chan *chan) |
2209 | { | 2215 | { |
2210 | struct drm_device *dev = chan->drm_dev; | 2216 | struct drm_device *dev = chan->drm_dev; |
2211 | struct drm_connector *connector; | 2217 | struct drm_connector *connector; |
2212 | struct intel_output *intel_output = NULL; | 2218 | struct intel_encoder *intel_encoder = NULL; |
2213 | 2219 | ||
2214 | list_for_each_entry(connector, | 2220 | list_for_each_entry(connector, |
2215 | &dev->mode_config.connector_list, head) { | 2221 | &dev->mode_config.connector_list, head) { |
2216 | if (to_intel_output(connector)->ddc_bus == &chan->adapter) { | 2222 | if (to_intel_encoder(connector)->ddc_bus == &chan->adapter) { |
2217 | intel_output = to_intel_output(connector); | 2223 | intel_encoder = to_intel_encoder(connector); |
2218 | break; | 2224 | break; |
2219 | } | 2225 | } |
2220 | } | 2226 | } |
2221 | return intel_output; | 2227 | return intel_encoder; |
2222 | } | 2228 | } |
2223 | 2229 | ||
2224 | static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap, | 2230 | static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap, |
2225 | struct i2c_msg msgs[], int num) | 2231 | struct i2c_msg msgs[], int num) |
2226 | { | 2232 | { |
2227 | struct intel_output *intel_output; | 2233 | struct intel_encoder *intel_encoder; |
2228 | struct intel_sdvo_priv *sdvo_priv; | 2234 | struct intel_sdvo_priv *sdvo_priv; |
2229 | struct i2c_algo_bit_data *algo_data; | 2235 | struct i2c_algo_bit_data *algo_data; |
2230 | const struct i2c_algorithm *algo; | 2236 | const struct i2c_algorithm *algo; |
2231 | 2237 | ||
2232 | algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data; | 2238 | algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data; |
2233 | intel_output = | 2239 | intel_encoder = |
2234 | intel_sdvo_chan_to_intel_output( | 2240 | intel_sdvo_chan_to_intel_encoder( |
2235 | (struct intel_i2c_chan *)(algo_data->data)); | 2241 | (struct intel_i2c_chan *)(algo_data->data)); |
2236 | if (intel_output == NULL) | 2242 | if (intel_encoder == NULL) |
2237 | return -EINVAL; | 2243 | return -EINVAL; |
2238 | 2244 | ||
2239 | sdvo_priv = intel_output->dev_priv; | 2245 | sdvo_priv = intel_encoder->dev_priv; |
2240 | algo = intel_output->i2c_bus->algo; | 2246 | algo = intel_encoder->i2c_bus->algo; |
2241 | 2247 | ||
2242 | intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus); | 2248 | intel_sdvo_set_control_bus_switch(intel_encoder, sdvo_priv->ddc_bus); |
2243 | return algo->master_xfer(i2c_adap, msgs, num); | 2249 | return algo->master_xfer(i2c_adap, msgs, num); |
2244 | } | 2250 | } |
2245 | 2251 | ||
@@ -2248,12 +2254,12 @@ static struct i2c_algorithm intel_sdvo_i2c_bit_algo = { | |||
2248 | }; | 2254 | }; |
2249 | 2255 | ||
2250 | static u8 | 2256 | static u8 |
2251 | intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device) | 2257 | intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) |
2252 | { | 2258 | { |
2253 | struct drm_i915_private *dev_priv = dev->dev_private; | 2259 | struct drm_i915_private *dev_priv = dev->dev_private; |
2254 | struct sdvo_device_mapping *my_mapping, *other_mapping; | 2260 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
2255 | 2261 | ||
2256 | if (output_device == SDVOB) { | 2262 | if (sdvo_reg == SDVOB) { |
2257 | my_mapping = &dev_priv->sdvo_mappings[0]; | 2263 | my_mapping = &dev_priv->sdvo_mappings[0]; |
2258 | other_mapping = &dev_priv->sdvo_mappings[1]; | 2264 | other_mapping = &dev_priv->sdvo_mappings[1]; |
2259 | } else { | 2265 | } else { |
@@ -2278,7 +2284,7 @@ intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device) | |||
2278 | /* No SDVO device info is found for another DVO port, | 2284 | /* No SDVO device info is found for another DVO port, |
2279 | * so use mapping assumption we had before BIOS parsing. | 2285 | * so use mapping assumption we had before BIOS parsing. |
2280 | */ | 2286 | */ |
2281 | if (output_device == SDVOB) | 2287 | if (sdvo_reg == SDVOB) |
2282 | return 0x70; | 2288 | return 0x70; |
2283 | else | 2289 | else |
2284 | return 0x72; | 2290 | return 0x72; |
@@ -2304,15 +2310,15 @@ static struct dmi_system_id intel_sdvo_bad_tv[] = { | |||
2304 | }; | 2310 | }; |
2305 | 2311 | ||
2306 | static bool | 2312 | static bool |
2307 | intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | 2313 | intel_sdvo_output_setup(struct intel_encoder *intel_encoder, uint16_t flags) |
2308 | { | 2314 | { |
2309 | struct drm_connector *connector = &intel_output->base; | 2315 | struct drm_connector *connector = &intel_encoder->base; |
2310 | struct drm_encoder *encoder = &intel_output->enc; | 2316 | struct drm_encoder *encoder = &intel_encoder->enc; |
2311 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 2317 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
2312 | bool ret = true, registered = false; | 2318 | bool ret = true, registered = false; |
2313 | 2319 | ||
2314 | sdvo_priv->is_tv = false; | 2320 | sdvo_priv->is_tv = false; |
2315 | intel_output->needs_tv_clock = false; | 2321 | intel_encoder->needs_tv_clock = false; |
2316 | sdvo_priv->is_lvds = false; | 2322 | sdvo_priv->is_lvds = false; |
2317 | 2323 | ||
2318 | if (device_is_registered(&connector->kdev)) { | 2324 | if (device_is_registered(&connector->kdev)) { |
@@ -2330,16 +2336,16 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2330 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; | 2336 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
2331 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; | 2337 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2332 | 2338 | ||
2333 | if (intel_sdvo_get_supp_encode(intel_output, | 2339 | if (intel_sdvo_get_supp_encode(intel_encoder, |
2334 | &sdvo_priv->encode) && | 2340 | &sdvo_priv->encode) && |
2335 | intel_sdvo_get_digital_encoding_mode(intel_output) && | 2341 | intel_sdvo_get_digital_encoding_mode(intel_encoder) && |
2336 | sdvo_priv->is_hdmi) { | 2342 | sdvo_priv->is_hdmi) { |
2337 | /* enable hdmi encoding mode if supported */ | 2343 | /* enable hdmi encoding mode if supported */ |
2338 | intel_sdvo_set_encode(intel_output, SDVO_ENCODE_HDMI); | 2344 | intel_sdvo_set_encode(intel_encoder, SDVO_ENCODE_HDMI); |
2339 | intel_sdvo_set_colorimetry(intel_output, | 2345 | intel_sdvo_set_colorimetry(intel_encoder, |
2340 | SDVO_COLORIMETRY_RGB256); | 2346 | SDVO_COLORIMETRY_RGB256); |
2341 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; | 2347 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2342 | intel_output->clone_mask = | 2348 | intel_encoder->clone_mask = |
2343 | (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 2349 | (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
2344 | (1 << INTEL_ANALOG_CLONE_BIT); | 2350 | (1 << INTEL_ANALOG_CLONE_BIT); |
2345 | } | 2351 | } |
@@ -2350,21 +2356,21 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2350 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; | 2356 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2351 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; | 2357 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2352 | sdvo_priv->is_tv = true; | 2358 | sdvo_priv->is_tv = true; |
2353 | intel_output->needs_tv_clock = true; | 2359 | intel_encoder->needs_tv_clock = true; |
2354 | intel_output->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; | 2360 | intel_encoder->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; |
2355 | } else if (flags & SDVO_OUTPUT_RGB0) { | 2361 | } else if (flags & SDVO_OUTPUT_RGB0) { |
2356 | 2362 | ||
2357 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0; | 2363 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0; |
2358 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; | 2364 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2359 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; | 2365 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2360 | intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 2366 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
2361 | (1 << INTEL_ANALOG_CLONE_BIT); | 2367 | (1 << INTEL_ANALOG_CLONE_BIT); |
2362 | } else if (flags & SDVO_OUTPUT_RGB1) { | 2368 | } else if (flags & SDVO_OUTPUT_RGB1) { |
2363 | 2369 | ||
2364 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1; | 2370 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1; |
2365 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; | 2371 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2366 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; | 2372 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2367 | intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 2373 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
2368 | (1 << INTEL_ANALOG_CLONE_BIT); | 2374 | (1 << INTEL_ANALOG_CLONE_BIT); |
2369 | } else if (flags & SDVO_OUTPUT_CVBS0) { | 2375 | } else if (flags & SDVO_OUTPUT_CVBS0) { |
2370 | 2376 | ||
@@ -2372,15 +2378,15 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2372 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; | 2378 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2373 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; | 2379 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2374 | sdvo_priv->is_tv = true; | 2380 | sdvo_priv->is_tv = true; |
2375 | intel_output->needs_tv_clock = true; | 2381 | intel_encoder->needs_tv_clock = true; |
2376 | intel_output->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; | 2382 | intel_encoder->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; |
2377 | } else if (flags & SDVO_OUTPUT_LVDS0) { | 2383 | } else if (flags & SDVO_OUTPUT_LVDS0) { |
2378 | 2384 | ||
2379 | sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0; | 2385 | sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0; |
2380 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; | 2386 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2381 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; | 2387 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2382 | sdvo_priv->is_lvds = true; | 2388 | sdvo_priv->is_lvds = true; |
2383 | intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | | 2389 | intel_encoder->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | |
2384 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); | 2390 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); |
2385 | } else if (flags & SDVO_OUTPUT_LVDS1) { | 2391 | } else if (flags & SDVO_OUTPUT_LVDS1) { |
2386 | 2392 | ||
@@ -2388,7 +2394,7 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2388 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; | 2394 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2389 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; | 2395 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2390 | sdvo_priv->is_lvds = true; | 2396 | sdvo_priv->is_lvds = true; |
2391 | intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | | 2397 | intel_encoder->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | |
2392 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); | 2398 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); |
2393 | } else { | 2399 | } else { |
2394 | 2400 | ||
@@ -2401,7 +2407,7 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2401 | bytes[0], bytes[1]); | 2407 | bytes[0], bytes[1]); |
2402 | ret = false; | 2408 | ret = false; |
2403 | } | 2409 | } |
2404 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 2410 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
2405 | 2411 | ||
2406 | if (ret && registered) | 2412 | if (ret && registered) |
2407 | ret = drm_sysfs_connector_add(connector) == 0 ? true : false; | 2413 | ret = drm_sysfs_connector_add(connector) == 0 ? true : false; |
@@ -2413,18 +2419,18 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2413 | 2419 | ||
2414 | static void intel_sdvo_tv_create_property(struct drm_connector *connector) | 2420 | static void intel_sdvo_tv_create_property(struct drm_connector *connector) |
2415 | { | 2421 | { |
2416 | struct intel_output *intel_output = to_intel_output(connector); | 2422 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
2417 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 2423 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
2418 | struct intel_sdvo_tv_format format; | 2424 | struct intel_sdvo_tv_format format; |
2419 | uint32_t format_map, i; | 2425 | uint32_t format_map, i; |
2420 | uint8_t status; | 2426 | uint8_t status; |
2421 | 2427 | ||
2422 | intel_sdvo_set_target_output(intel_output, | 2428 | intel_sdvo_set_target_output(intel_encoder, |
2423 | sdvo_priv->controlled_output); | 2429 | sdvo_priv->controlled_output); |
2424 | 2430 | ||
2425 | intel_sdvo_write_cmd(intel_output, | 2431 | intel_sdvo_write_cmd(intel_encoder, |
2426 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, NULL, 0); | 2432 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, NULL, 0); |
2427 | status = intel_sdvo_read_response(intel_output, | 2433 | status = intel_sdvo_read_response(intel_encoder, |
2428 | &format, sizeof(format)); | 2434 | &format, sizeof(format)); |
2429 | if (status != SDVO_CMD_STATUS_SUCCESS) | 2435 | if (status != SDVO_CMD_STATUS_SUCCESS) |
2430 | return; | 2436 | return; |
@@ -2462,16 +2468,16 @@ static void intel_sdvo_tv_create_property(struct drm_connector *connector) | |||
2462 | 2468 | ||
2463 | static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | 2469 | static void intel_sdvo_create_enhance_property(struct drm_connector *connector) |
2464 | { | 2470 | { |
2465 | struct intel_output *intel_output = to_intel_output(connector); | 2471 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
2466 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 2472 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
2467 | struct intel_sdvo_enhancements_reply sdvo_data; | 2473 | struct intel_sdvo_enhancements_reply sdvo_data; |
2468 | struct drm_device *dev = connector->dev; | 2474 | struct drm_device *dev = connector->dev; |
2469 | uint8_t status; | 2475 | uint8_t status; |
2470 | uint16_t response, data_value[2]; | 2476 | uint16_t response, data_value[2]; |
2471 | 2477 | ||
2472 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, | 2478 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
2473 | NULL, 0); | 2479 | NULL, 0); |
2474 | status = intel_sdvo_read_response(intel_output, &sdvo_data, | 2480 | status = intel_sdvo_read_response(intel_encoder, &sdvo_data, |
2475 | sizeof(sdvo_data)); | 2481 | sizeof(sdvo_data)); |
2476 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2482 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2477 | DRM_DEBUG_KMS(" incorrect response is returned\n"); | 2483 | DRM_DEBUG_KMS(" incorrect response is returned\n"); |
@@ -2487,18 +2493,18 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2487 | * property | 2493 | * property |
2488 | */ | 2494 | */ |
2489 | if (sdvo_data.overscan_h) { | 2495 | if (sdvo_data.overscan_h) { |
2490 | intel_sdvo_write_cmd(intel_output, | 2496 | intel_sdvo_write_cmd(intel_encoder, |
2491 | SDVO_CMD_GET_MAX_OVERSCAN_H, NULL, 0); | 2497 | SDVO_CMD_GET_MAX_OVERSCAN_H, NULL, 0); |
2492 | status = intel_sdvo_read_response(intel_output, | 2498 | status = intel_sdvo_read_response(intel_encoder, |
2493 | &data_value, 4); | 2499 | &data_value, 4); |
2494 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2500 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2495 | DRM_DEBUG_KMS("Incorrect SDVO max " | 2501 | DRM_DEBUG_KMS("Incorrect SDVO max " |
2496 | "h_overscan\n"); | 2502 | "h_overscan\n"); |
2497 | return; | 2503 | return; |
2498 | } | 2504 | } |
2499 | intel_sdvo_write_cmd(intel_output, | 2505 | intel_sdvo_write_cmd(intel_encoder, |
2500 | SDVO_CMD_GET_OVERSCAN_H, NULL, 0); | 2506 | SDVO_CMD_GET_OVERSCAN_H, NULL, 0); |
2501 | status = intel_sdvo_read_response(intel_output, | 2507 | status = intel_sdvo_read_response(intel_encoder, |
2502 | &response, 2); | 2508 | &response, 2); |
2503 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2509 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2504 | DRM_DEBUG_KMS("Incorrect SDVO h_overscan\n"); | 2510 | DRM_DEBUG_KMS("Incorrect SDVO h_overscan\n"); |
@@ -2528,18 +2534,18 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2528 | data_value[0], data_value[1], response); | 2534 | data_value[0], data_value[1], response); |
2529 | } | 2535 | } |
2530 | if (sdvo_data.overscan_v) { | 2536 | if (sdvo_data.overscan_v) { |
2531 | intel_sdvo_write_cmd(intel_output, | 2537 | intel_sdvo_write_cmd(intel_encoder, |
2532 | SDVO_CMD_GET_MAX_OVERSCAN_V, NULL, 0); | 2538 | SDVO_CMD_GET_MAX_OVERSCAN_V, NULL, 0); |
2533 | status = intel_sdvo_read_response(intel_output, | 2539 | status = intel_sdvo_read_response(intel_encoder, |
2534 | &data_value, 4); | 2540 | &data_value, 4); |
2535 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2541 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2536 | DRM_DEBUG_KMS("Incorrect SDVO max " | 2542 | DRM_DEBUG_KMS("Incorrect SDVO max " |
2537 | "v_overscan\n"); | 2543 | "v_overscan\n"); |
2538 | return; | 2544 | return; |
2539 | } | 2545 | } |
2540 | intel_sdvo_write_cmd(intel_output, | 2546 | intel_sdvo_write_cmd(intel_encoder, |
2541 | SDVO_CMD_GET_OVERSCAN_V, NULL, 0); | 2547 | SDVO_CMD_GET_OVERSCAN_V, NULL, 0); |
2542 | status = intel_sdvo_read_response(intel_output, | 2548 | status = intel_sdvo_read_response(intel_encoder, |
2543 | &response, 2); | 2549 | &response, 2); |
2544 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2550 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2545 | DRM_DEBUG_KMS("Incorrect SDVO v_overscan\n"); | 2551 | DRM_DEBUG_KMS("Incorrect SDVO v_overscan\n"); |
@@ -2569,17 +2575,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2569 | data_value[0], data_value[1], response); | 2575 | data_value[0], data_value[1], response); |
2570 | } | 2576 | } |
2571 | if (sdvo_data.position_h) { | 2577 | if (sdvo_data.position_h) { |
2572 | intel_sdvo_write_cmd(intel_output, | 2578 | intel_sdvo_write_cmd(intel_encoder, |
2573 | SDVO_CMD_GET_MAX_POSITION_H, NULL, 0); | 2579 | SDVO_CMD_GET_MAX_POSITION_H, NULL, 0); |
2574 | status = intel_sdvo_read_response(intel_output, | 2580 | status = intel_sdvo_read_response(intel_encoder, |
2575 | &data_value, 4); | 2581 | &data_value, 4); |
2576 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2582 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2577 | DRM_DEBUG_KMS("Incorrect SDVO Max h_pos\n"); | 2583 | DRM_DEBUG_KMS("Incorrect SDVO Max h_pos\n"); |
2578 | return; | 2584 | return; |
2579 | } | 2585 | } |
2580 | intel_sdvo_write_cmd(intel_output, | 2586 | intel_sdvo_write_cmd(intel_encoder, |
2581 | SDVO_CMD_GET_POSITION_H, NULL, 0); | 2587 | SDVO_CMD_GET_POSITION_H, NULL, 0); |
2582 | status = intel_sdvo_read_response(intel_output, | 2588 | status = intel_sdvo_read_response(intel_encoder, |
2583 | &response, 2); | 2589 | &response, 2); |
2584 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2590 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2585 | DRM_DEBUG_KMS("Incorrect SDVO get h_postion\n"); | 2591 | DRM_DEBUG_KMS("Incorrect SDVO get h_postion\n"); |
@@ -2600,17 +2606,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2600 | data_value[0], data_value[1], response); | 2606 | data_value[0], data_value[1], response); |
2601 | } | 2607 | } |
2602 | if (sdvo_data.position_v) { | 2608 | if (sdvo_data.position_v) { |
2603 | intel_sdvo_write_cmd(intel_output, | 2609 | intel_sdvo_write_cmd(intel_encoder, |
2604 | SDVO_CMD_GET_MAX_POSITION_V, NULL, 0); | 2610 | SDVO_CMD_GET_MAX_POSITION_V, NULL, 0); |
2605 | status = intel_sdvo_read_response(intel_output, | 2611 | status = intel_sdvo_read_response(intel_encoder, |
2606 | &data_value, 4); | 2612 | &data_value, 4); |
2607 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2613 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2608 | DRM_DEBUG_KMS("Incorrect SDVO Max v_pos\n"); | 2614 | DRM_DEBUG_KMS("Incorrect SDVO Max v_pos\n"); |
2609 | return; | 2615 | return; |
2610 | } | 2616 | } |
2611 | intel_sdvo_write_cmd(intel_output, | 2617 | intel_sdvo_write_cmd(intel_encoder, |
2612 | SDVO_CMD_GET_POSITION_V, NULL, 0); | 2618 | SDVO_CMD_GET_POSITION_V, NULL, 0); |
2613 | status = intel_sdvo_read_response(intel_output, | 2619 | status = intel_sdvo_read_response(intel_encoder, |
2614 | &response, 2); | 2620 | &response, 2); |
2615 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2621 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2616 | DRM_DEBUG_KMS("Incorrect SDVO get v_postion\n"); | 2622 | DRM_DEBUG_KMS("Incorrect SDVO get v_postion\n"); |
@@ -2633,17 +2639,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2633 | } | 2639 | } |
2634 | if (sdvo_priv->is_tv) { | 2640 | if (sdvo_priv->is_tv) { |
2635 | if (sdvo_data.saturation) { | 2641 | if (sdvo_data.saturation) { |
2636 | intel_sdvo_write_cmd(intel_output, | 2642 | intel_sdvo_write_cmd(intel_encoder, |
2637 | SDVO_CMD_GET_MAX_SATURATION, NULL, 0); | 2643 | SDVO_CMD_GET_MAX_SATURATION, NULL, 0); |
2638 | status = intel_sdvo_read_response(intel_output, | 2644 | status = intel_sdvo_read_response(intel_encoder, |
2639 | &data_value, 4); | 2645 | &data_value, 4); |
2640 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2646 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2641 | DRM_DEBUG_KMS("Incorrect SDVO Max sat\n"); | 2647 | DRM_DEBUG_KMS("Incorrect SDVO Max sat\n"); |
2642 | return; | 2648 | return; |
2643 | } | 2649 | } |
2644 | intel_sdvo_write_cmd(intel_output, | 2650 | intel_sdvo_write_cmd(intel_encoder, |
2645 | SDVO_CMD_GET_SATURATION, NULL, 0); | 2651 | SDVO_CMD_GET_SATURATION, NULL, 0); |
2646 | status = intel_sdvo_read_response(intel_output, | 2652 | status = intel_sdvo_read_response(intel_encoder, |
2647 | &response, 2); | 2653 | &response, 2); |
2648 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2654 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2649 | DRM_DEBUG_KMS("Incorrect SDVO get sat\n"); | 2655 | DRM_DEBUG_KMS("Incorrect SDVO get sat\n"); |
@@ -2665,17 +2671,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2665 | data_value[0], data_value[1], response); | 2671 | data_value[0], data_value[1], response); |
2666 | } | 2672 | } |
2667 | if (sdvo_data.contrast) { | 2673 | if (sdvo_data.contrast) { |
2668 | intel_sdvo_write_cmd(intel_output, | 2674 | intel_sdvo_write_cmd(intel_encoder, |
2669 | SDVO_CMD_GET_MAX_CONTRAST, NULL, 0); | 2675 | SDVO_CMD_GET_MAX_CONTRAST, NULL, 0); |
2670 | status = intel_sdvo_read_response(intel_output, | 2676 | status = intel_sdvo_read_response(intel_encoder, |
2671 | &data_value, 4); | 2677 | &data_value, 4); |
2672 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2678 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2673 | DRM_DEBUG_KMS("Incorrect SDVO Max contrast\n"); | 2679 | DRM_DEBUG_KMS("Incorrect SDVO Max contrast\n"); |
2674 | return; | 2680 | return; |
2675 | } | 2681 | } |
2676 | intel_sdvo_write_cmd(intel_output, | 2682 | intel_sdvo_write_cmd(intel_encoder, |
2677 | SDVO_CMD_GET_CONTRAST, NULL, 0); | 2683 | SDVO_CMD_GET_CONTRAST, NULL, 0); |
2678 | status = intel_sdvo_read_response(intel_output, | 2684 | status = intel_sdvo_read_response(intel_encoder, |
2679 | &response, 2); | 2685 | &response, 2); |
2680 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2686 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2681 | DRM_DEBUG_KMS("Incorrect SDVO get contrast\n"); | 2687 | DRM_DEBUG_KMS("Incorrect SDVO get contrast\n"); |
@@ -2696,17 +2702,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2696 | data_value[0], data_value[1], response); | 2702 | data_value[0], data_value[1], response); |
2697 | } | 2703 | } |
2698 | if (sdvo_data.hue) { | 2704 | if (sdvo_data.hue) { |
2699 | intel_sdvo_write_cmd(intel_output, | 2705 | intel_sdvo_write_cmd(intel_encoder, |
2700 | SDVO_CMD_GET_MAX_HUE, NULL, 0); | 2706 | SDVO_CMD_GET_MAX_HUE, NULL, 0); |
2701 | status = intel_sdvo_read_response(intel_output, | 2707 | status = intel_sdvo_read_response(intel_encoder, |
2702 | &data_value, 4); | 2708 | &data_value, 4); |
2703 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2709 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2704 | DRM_DEBUG_KMS("Incorrect SDVO Max hue\n"); | 2710 | DRM_DEBUG_KMS("Incorrect SDVO Max hue\n"); |
2705 | return; | 2711 | return; |
2706 | } | 2712 | } |
2707 | intel_sdvo_write_cmd(intel_output, | 2713 | intel_sdvo_write_cmd(intel_encoder, |
2708 | SDVO_CMD_GET_HUE, NULL, 0); | 2714 | SDVO_CMD_GET_HUE, NULL, 0); |
2709 | status = intel_sdvo_read_response(intel_output, | 2715 | status = intel_sdvo_read_response(intel_encoder, |
2710 | &response, 2); | 2716 | &response, 2); |
2711 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2717 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2712 | DRM_DEBUG_KMS("Incorrect SDVO get hue\n"); | 2718 | DRM_DEBUG_KMS("Incorrect SDVO get hue\n"); |
@@ -2729,17 +2735,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2729 | } | 2735 | } |
2730 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { | 2736 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { |
2731 | if (sdvo_data.brightness) { | 2737 | if (sdvo_data.brightness) { |
2732 | intel_sdvo_write_cmd(intel_output, | 2738 | intel_sdvo_write_cmd(intel_encoder, |
2733 | SDVO_CMD_GET_MAX_BRIGHTNESS, NULL, 0); | 2739 | SDVO_CMD_GET_MAX_BRIGHTNESS, NULL, 0); |
2734 | status = intel_sdvo_read_response(intel_output, | 2740 | status = intel_sdvo_read_response(intel_encoder, |
2735 | &data_value, 4); | 2741 | &data_value, 4); |
2736 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2742 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2737 | DRM_DEBUG_KMS("Incorrect SDVO Max bright\n"); | 2743 | DRM_DEBUG_KMS("Incorrect SDVO Max bright\n"); |
2738 | return; | 2744 | return; |
2739 | } | 2745 | } |
2740 | intel_sdvo_write_cmd(intel_output, | 2746 | intel_sdvo_write_cmd(intel_encoder, |
2741 | SDVO_CMD_GET_BRIGHTNESS, NULL, 0); | 2747 | SDVO_CMD_GET_BRIGHTNESS, NULL, 0); |
2742 | status = intel_sdvo_read_response(intel_output, | 2748 | status = intel_sdvo_read_response(intel_encoder, |
2743 | &response, 2); | 2749 | &response, 2); |
2744 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2750 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2745 | DRM_DEBUG_KMS("Incorrect SDVO get brigh\n"); | 2751 | DRM_DEBUG_KMS("Incorrect SDVO get brigh\n"); |
@@ -2764,81 +2770,81 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2764 | return; | 2770 | return; |
2765 | } | 2771 | } |
2766 | 2772 | ||
2767 | bool intel_sdvo_init(struct drm_device *dev, int output_device) | 2773 | bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg) |
2768 | { | 2774 | { |
2769 | struct drm_i915_private *dev_priv = dev->dev_private; | 2775 | struct drm_i915_private *dev_priv = dev->dev_private; |
2770 | struct drm_connector *connector; | 2776 | struct drm_connector *connector; |
2771 | struct intel_output *intel_output; | 2777 | struct intel_encoder *intel_encoder; |
2772 | struct intel_sdvo_priv *sdvo_priv; | 2778 | struct intel_sdvo_priv *sdvo_priv; |
2773 | 2779 | ||
2774 | u8 ch[0x40]; | 2780 | u8 ch[0x40]; |
2775 | int i; | 2781 | int i; |
2776 | 2782 | ||
2777 | intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL); | 2783 | intel_encoder = kcalloc(sizeof(struct intel_encoder)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL); |
2778 | if (!intel_output) { | 2784 | if (!intel_encoder) { |
2779 | return false; | 2785 | return false; |
2780 | } | 2786 | } |
2781 | 2787 | ||
2782 | sdvo_priv = (struct intel_sdvo_priv *)(intel_output + 1); | 2788 | sdvo_priv = (struct intel_sdvo_priv *)(intel_encoder + 1); |
2783 | sdvo_priv->output_device = output_device; | 2789 | sdvo_priv->sdvo_reg = sdvo_reg; |
2784 | 2790 | ||
2785 | intel_output->dev_priv = sdvo_priv; | 2791 | intel_encoder->dev_priv = sdvo_priv; |
2786 | intel_output->type = INTEL_OUTPUT_SDVO; | 2792 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2787 | 2793 | ||
2788 | /* setup the DDC bus. */ | 2794 | /* setup the DDC bus. */ |
2789 | if (output_device == SDVOB) | 2795 | if (sdvo_reg == SDVOB) |
2790 | intel_output->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB"); | 2796 | intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB"); |
2791 | else | 2797 | else |
2792 | intel_output->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC"); | 2798 | intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC"); |
2793 | 2799 | ||
2794 | if (!intel_output->i2c_bus) | 2800 | if (!intel_encoder->i2c_bus) |
2795 | goto err_inteloutput; | 2801 | goto err_inteloutput; |
2796 | 2802 | ||
2797 | sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, output_device); | 2803 | sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg); |
2798 | 2804 | ||
2799 | /* Save the bit-banging i2c functionality for use by the DDC wrapper */ | 2805 | /* Save the bit-banging i2c functionality for use by the DDC wrapper */ |
2800 | intel_sdvo_i2c_bit_algo.functionality = intel_output->i2c_bus->algo->functionality; | 2806 | intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality; |
2801 | 2807 | ||
2802 | /* Read the regs to test if we can talk to the device */ | 2808 | /* Read the regs to test if we can talk to the device */ |
2803 | for (i = 0; i < 0x40; i++) { | 2809 | for (i = 0; i < 0x40; i++) { |
2804 | if (!intel_sdvo_read_byte(intel_output, i, &ch[i])) { | 2810 | if (!intel_sdvo_read_byte(intel_encoder, i, &ch[i])) { |
2805 | DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", | 2811 | DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", |
2806 | output_device == SDVOB ? 'B' : 'C'); | 2812 | sdvo_reg == SDVOB ? 'B' : 'C'); |
2807 | goto err_i2c; | 2813 | goto err_i2c; |
2808 | } | 2814 | } |
2809 | } | 2815 | } |
2810 | 2816 | ||
2811 | /* setup the DDC bus. */ | 2817 | /* setup the DDC bus. */ |
2812 | if (output_device == SDVOB) { | 2818 | if (sdvo_reg == SDVOB) { |
2813 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); | 2819 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); |
2814 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, | 2820 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, |
2815 | "SDVOB/VGA DDC BUS"); | 2821 | "SDVOB/VGA DDC BUS"); |
2816 | dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; | 2822 | dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; |
2817 | } else { | 2823 | } else { |
2818 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); | 2824 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); |
2819 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, | 2825 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, |
2820 | "SDVOC/VGA DDC BUS"); | 2826 | "SDVOC/VGA DDC BUS"); |
2821 | dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; | 2827 | dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; |
2822 | } | 2828 | } |
2823 | 2829 | ||
2824 | if (intel_output->ddc_bus == NULL) | 2830 | if (intel_encoder->ddc_bus == NULL) |
2825 | goto err_i2c; | 2831 | goto err_i2c; |
2826 | 2832 | ||
2827 | /* Wrap with our custom algo which switches to DDC mode */ | 2833 | /* Wrap with our custom algo which switches to DDC mode */ |
2828 | intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; | 2834 | intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; |
2829 | 2835 | ||
2830 | /* In default case sdvo lvds is false */ | 2836 | /* In default case sdvo lvds is false */ |
2831 | intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps); | 2837 | intel_sdvo_get_capabilities(intel_encoder, &sdvo_priv->caps); |
2832 | 2838 | ||
2833 | if (intel_sdvo_output_setup(intel_output, | 2839 | if (intel_sdvo_output_setup(intel_encoder, |
2834 | sdvo_priv->caps.output_flags) != true) { | 2840 | sdvo_priv->caps.output_flags) != true) { |
2835 | DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", | 2841 | DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", |
2836 | output_device == SDVOB ? 'B' : 'C'); | 2842 | sdvo_reg == SDVOB ? 'B' : 'C'); |
2837 | goto err_i2c; | 2843 | goto err_i2c; |
2838 | } | 2844 | } |
2839 | 2845 | ||
2840 | 2846 | ||
2841 | connector = &intel_output->base; | 2847 | connector = &intel_encoder->base; |
2842 | drm_connector_init(dev, connector, &intel_sdvo_connector_funcs, | 2848 | drm_connector_init(dev, connector, &intel_sdvo_connector_funcs, |
2843 | connector->connector_type); | 2849 | connector->connector_type); |
2844 | 2850 | ||
@@ -2847,12 +2853,12 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device) | |||
2847 | connector->doublescan_allowed = 0; | 2853 | connector->doublescan_allowed = 0; |
2848 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; | 2854 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
2849 | 2855 | ||
2850 | drm_encoder_init(dev, &intel_output->enc, | 2856 | drm_encoder_init(dev, &intel_encoder->enc, |
2851 | &intel_sdvo_enc_funcs, intel_output->enc.encoder_type); | 2857 | &intel_sdvo_enc_funcs, intel_encoder->enc.encoder_type); |
2852 | 2858 | ||
2853 | drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs); | 2859 | drm_encoder_helper_add(&intel_encoder->enc, &intel_sdvo_helper_funcs); |
2854 | 2860 | ||
2855 | drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); | 2861 | drm_mode_connector_attach_encoder(&intel_encoder->base, &intel_encoder->enc); |
2856 | if (sdvo_priv->is_tv) | 2862 | if (sdvo_priv->is_tv) |
2857 | intel_sdvo_tv_create_property(connector); | 2863 | intel_sdvo_tv_create_property(connector); |
2858 | 2864 | ||
@@ -2864,9 +2870,9 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device) | |||
2864 | intel_sdvo_select_ddc_bus(sdvo_priv); | 2870 | intel_sdvo_select_ddc_bus(sdvo_priv); |
2865 | 2871 | ||
2866 | /* Set the input timing to the screen. Assume always input 0. */ | 2872 | /* Set the input timing to the screen. Assume always input 0. */ |
2867 | intel_sdvo_set_target_input(intel_output, true, false); | 2873 | intel_sdvo_set_target_input(intel_encoder, true, false); |
2868 | 2874 | ||
2869 | intel_sdvo_get_input_pixel_clock_range(intel_output, | 2875 | intel_sdvo_get_input_pixel_clock_range(intel_encoder, |
2870 | &sdvo_priv->pixel_clock_min, | 2876 | &sdvo_priv->pixel_clock_min, |
2871 | &sdvo_priv->pixel_clock_max); | 2877 | &sdvo_priv->pixel_clock_max); |
2872 | 2878 | ||
@@ -2893,12 +2899,12 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device) | |||
2893 | err_i2c: | 2899 | err_i2c: |
2894 | if (sdvo_priv->analog_ddc_bus != NULL) | 2900 | if (sdvo_priv->analog_ddc_bus != NULL) |
2895 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); | 2901 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); |
2896 | if (intel_output->ddc_bus != NULL) | 2902 | if (intel_encoder->ddc_bus != NULL) |
2897 | intel_i2c_destroy(intel_output->ddc_bus); | 2903 | intel_i2c_destroy(intel_encoder->ddc_bus); |
2898 | if (intel_output->i2c_bus != NULL) | 2904 | if (intel_encoder->i2c_bus != NULL) |
2899 | intel_i2c_destroy(intel_output->i2c_bus); | 2905 | intel_i2c_destroy(intel_encoder->i2c_bus); |
2900 | err_inteloutput: | 2906 | err_inteloutput: |
2901 | kfree(intel_output); | 2907 | kfree(intel_encoder); |
2902 | 2908 | ||
2903 | return false; | 2909 | return false; |
2904 | } | 2910 | } |
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 552ec110b741..d7d39b2327df 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c | |||
@@ -921,8 +921,8 @@ intel_tv_save(struct drm_connector *connector) | |||
921 | { | 921 | { |
922 | struct drm_device *dev = connector->dev; | 922 | struct drm_device *dev = connector->dev; |
923 | struct drm_i915_private *dev_priv = dev->dev_private; | 923 | struct drm_i915_private *dev_priv = dev->dev_private; |
924 | struct intel_output *intel_output = to_intel_output(connector); | 924 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
925 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 925 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
926 | int i; | 926 | int i; |
927 | 927 | ||
928 | tv_priv->save_TV_H_CTL_1 = I915_READ(TV_H_CTL_1); | 928 | tv_priv->save_TV_H_CTL_1 = I915_READ(TV_H_CTL_1); |
@@ -971,8 +971,8 @@ intel_tv_restore(struct drm_connector *connector) | |||
971 | { | 971 | { |
972 | struct drm_device *dev = connector->dev; | 972 | struct drm_device *dev = connector->dev; |
973 | struct drm_i915_private *dev_priv = dev->dev_private; | 973 | struct drm_i915_private *dev_priv = dev->dev_private; |
974 | struct intel_output *intel_output = to_intel_output(connector); | 974 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
975 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 975 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
976 | struct drm_crtc *crtc = connector->encoder->crtc; | 976 | struct drm_crtc *crtc = connector->encoder->crtc; |
977 | struct intel_crtc *intel_crtc; | 977 | struct intel_crtc *intel_crtc; |
978 | int i; | 978 | int i; |
@@ -1068,9 +1068,9 @@ intel_tv_mode_lookup (char *tv_format) | |||
1068 | } | 1068 | } |
1069 | 1069 | ||
1070 | static const struct tv_mode * | 1070 | static const struct tv_mode * |
1071 | intel_tv_mode_find (struct intel_output *intel_output) | 1071 | intel_tv_mode_find (struct intel_encoder *intel_encoder) |
1072 | { | 1072 | { |
1073 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1073 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1074 | 1074 | ||
1075 | return intel_tv_mode_lookup(tv_priv->tv_format); | 1075 | return intel_tv_mode_lookup(tv_priv->tv_format); |
1076 | } | 1076 | } |
@@ -1078,8 +1078,8 @@ intel_tv_mode_find (struct intel_output *intel_output) | |||
1078 | static enum drm_mode_status | 1078 | static enum drm_mode_status |
1079 | intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) | 1079 | intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) |
1080 | { | 1080 | { |
1081 | struct intel_output *intel_output = to_intel_output(connector); | 1081 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1082 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1082 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1083 | 1083 | ||
1084 | /* Ensure TV refresh is close to desired refresh */ | 1084 | /* Ensure TV refresh is close to desired refresh */ |
1085 | if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) | 1085 | if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) |
@@ -1095,8 +1095,8 @@ intel_tv_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
1095 | { | 1095 | { |
1096 | struct drm_device *dev = encoder->dev; | 1096 | struct drm_device *dev = encoder->dev; |
1097 | struct drm_mode_config *drm_config = &dev->mode_config; | 1097 | struct drm_mode_config *drm_config = &dev->mode_config; |
1098 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 1098 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1099 | const struct tv_mode *tv_mode = intel_tv_mode_find (intel_output); | 1099 | const struct tv_mode *tv_mode = intel_tv_mode_find (intel_encoder); |
1100 | struct drm_encoder *other_encoder; | 1100 | struct drm_encoder *other_encoder; |
1101 | 1101 | ||
1102 | if (!tv_mode) | 1102 | if (!tv_mode) |
@@ -1121,9 +1121,9 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
1121 | struct drm_i915_private *dev_priv = dev->dev_private; | 1121 | struct drm_i915_private *dev_priv = dev->dev_private; |
1122 | struct drm_crtc *crtc = encoder->crtc; | 1122 | struct drm_crtc *crtc = encoder->crtc; |
1123 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1123 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1124 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 1124 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1125 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1125 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1126 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1126 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1127 | u32 tv_ctl; | 1127 | u32 tv_ctl; |
1128 | u32 hctl1, hctl2, hctl3; | 1128 | u32 hctl1, hctl2, hctl3; |
1129 | u32 vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7; | 1129 | u32 vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7; |
@@ -1360,9 +1360,9 @@ static const struct drm_display_mode reported_modes[] = { | |||
1360 | * \return false if TV is disconnected. | 1360 | * \return false if TV is disconnected. |
1361 | */ | 1361 | */ |
1362 | static int | 1362 | static int |
1363 | intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output) | 1363 | intel_tv_detect_type (struct drm_crtc *crtc, struct intel_encoder *intel_encoder) |
1364 | { | 1364 | { |
1365 | struct drm_encoder *encoder = &intel_output->enc; | 1365 | struct drm_encoder *encoder = &intel_encoder->enc; |
1366 | struct drm_device *dev = encoder->dev; | 1366 | struct drm_device *dev = encoder->dev; |
1367 | struct drm_i915_private *dev_priv = dev->dev_private; | 1367 | struct drm_i915_private *dev_priv = dev->dev_private; |
1368 | unsigned long irqflags; | 1368 | unsigned long irqflags; |
@@ -1441,9 +1441,9 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output) | |||
1441 | */ | 1441 | */ |
1442 | static void intel_tv_find_better_format(struct drm_connector *connector) | 1442 | static void intel_tv_find_better_format(struct drm_connector *connector) |
1443 | { | 1443 | { |
1444 | struct intel_output *intel_output = to_intel_output(connector); | 1444 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1445 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1445 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1446 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1446 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1447 | int i; | 1447 | int i; |
1448 | 1448 | ||
1449 | if ((tv_priv->type == DRM_MODE_CONNECTOR_Component) == | 1449 | if ((tv_priv->type == DRM_MODE_CONNECTOR_Component) == |
@@ -1475,9 +1475,9 @@ intel_tv_detect(struct drm_connector *connector) | |||
1475 | { | 1475 | { |
1476 | struct drm_crtc *crtc; | 1476 | struct drm_crtc *crtc; |
1477 | struct drm_display_mode mode; | 1477 | struct drm_display_mode mode; |
1478 | struct intel_output *intel_output = to_intel_output(connector); | 1478 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1479 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1479 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1480 | struct drm_encoder *encoder = &intel_output->enc; | 1480 | struct drm_encoder *encoder = &intel_encoder->enc; |
1481 | int dpms_mode; | 1481 | int dpms_mode; |
1482 | int type = tv_priv->type; | 1482 | int type = tv_priv->type; |
1483 | 1483 | ||
@@ -1485,12 +1485,12 @@ intel_tv_detect(struct drm_connector *connector) | |||
1485 | drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V); | 1485 | drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V); |
1486 | 1486 | ||
1487 | if (encoder->crtc && encoder->crtc->enabled) { | 1487 | if (encoder->crtc && encoder->crtc->enabled) { |
1488 | type = intel_tv_detect_type(encoder->crtc, intel_output); | 1488 | type = intel_tv_detect_type(encoder->crtc, intel_encoder); |
1489 | } else { | 1489 | } else { |
1490 | crtc = intel_get_load_detect_pipe(intel_output, &mode, &dpms_mode); | 1490 | crtc = intel_get_load_detect_pipe(intel_encoder, &mode, &dpms_mode); |
1491 | if (crtc) { | 1491 | if (crtc) { |
1492 | type = intel_tv_detect_type(crtc, intel_output); | 1492 | type = intel_tv_detect_type(crtc, intel_encoder); |
1493 | intel_release_load_detect_pipe(intel_output, dpms_mode); | 1493 | intel_release_load_detect_pipe(intel_encoder, dpms_mode); |
1494 | } else | 1494 | } else |
1495 | type = -1; | 1495 | type = -1; |
1496 | } | 1496 | } |
@@ -1525,8 +1525,8 @@ static void | |||
1525 | intel_tv_chose_preferred_modes(struct drm_connector *connector, | 1525 | intel_tv_chose_preferred_modes(struct drm_connector *connector, |
1526 | struct drm_display_mode *mode_ptr) | 1526 | struct drm_display_mode *mode_ptr) |
1527 | { | 1527 | { |
1528 | struct intel_output *intel_output = to_intel_output(connector); | 1528 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1529 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1529 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1530 | 1530 | ||
1531 | if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480) | 1531 | if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480) |
1532 | mode_ptr->type |= DRM_MODE_TYPE_PREFERRED; | 1532 | mode_ptr->type |= DRM_MODE_TYPE_PREFERRED; |
@@ -1550,8 +1550,8 @@ static int | |||
1550 | intel_tv_get_modes(struct drm_connector *connector) | 1550 | intel_tv_get_modes(struct drm_connector *connector) |
1551 | { | 1551 | { |
1552 | struct drm_display_mode *mode_ptr; | 1552 | struct drm_display_mode *mode_ptr; |
1553 | struct intel_output *intel_output = to_intel_output(connector); | 1553 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1554 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1554 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1555 | int j, count = 0; | 1555 | int j, count = 0; |
1556 | u64 tmp; | 1556 | u64 tmp; |
1557 | 1557 | ||
@@ -1604,11 +1604,11 @@ intel_tv_get_modes(struct drm_connector *connector) | |||
1604 | static void | 1604 | static void |
1605 | intel_tv_destroy (struct drm_connector *connector) | 1605 | intel_tv_destroy (struct drm_connector *connector) |
1606 | { | 1606 | { |
1607 | struct intel_output *intel_output = to_intel_output(connector); | 1607 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1608 | 1608 | ||
1609 | drm_sysfs_connector_remove(connector); | 1609 | drm_sysfs_connector_remove(connector); |
1610 | drm_connector_cleanup(connector); | 1610 | drm_connector_cleanup(connector); |
1611 | kfree(intel_output); | 1611 | kfree(intel_encoder); |
1612 | } | 1612 | } |
1613 | 1613 | ||
1614 | 1614 | ||
@@ -1617,9 +1617,9 @@ intel_tv_set_property(struct drm_connector *connector, struct drm_property *prop | |||
1617 | uint64_t val) | 1617 | uint64_t val) |
1618 | { | 1618 | { |
1619 | struct drm_device *dev = connector->dev; | 1619 | struct drm_device *dev = connector->dev; |
1620 | struct intel_output *intel_output = to_intel_output(connector); | 1620 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1621 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1621 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1622 | struct drm_encoder *encoder = &intel_output->enc; | 1622 | struct drm_encoder *encoder = &intel_encoder->enc; |
1623 | struct drm_crtc *crtc = encoder->crtc; | 1623 | struct drm_crtc *crtc = encoder->crtc; |
1624 | int ret = 0; | 1624 | int ret = 0; |
1625 | bool changed = false; | 1625 | bool changed = false; |
@@ -1740,7 +1740,7 @@ intel_tv_init(struct drm_device *dev) | |||
1740 | { | 1740 | { |
1741 | struct drm_i915_private *dev_priv = dev->dev_private; | 1741 | struct drm_i915_private *dev_priv = dev->dev_private; |
1742 | struct drm_connector *connector; | 1742 | struct drm_connector *connector; |
1743 | struct intel_output *intel_output; | 1743 | struct intel_encoder *intel_encoder; |
1744 | struct intel_tv_priv *tv_priv; | 1744 | struct intel_tv_priv *tv_priv; |
1745 | u32 tv_dac_on, tv_dac_off, save_tv_dac; | 1745 | u32 tv_dac_on, tv_dac_off, save_tv_dac; |
1746 | char **tv_format_names; | 1746 | char **tv_format_names; |
@@ -1780,28 +1780,28 @@ intel_tv_init(struct drm_device *dev) | |||
1780 | (tv_dac_off & TVDAC_STATE_CHG_EN) != 0) | 1780 | (tv_dac_off & TVDAC_STATE_CHG_EN) != 0) |
1781 | return; | 1781 | return; |
1782 | 1782 | ||
1783 | intel_output = kzalloc(sizeof(struct intel_output) + | 1783 | intel_encoder = kzalloc(sizeof(struct intel_encoder) + |
1784 | sizeof(struct intel_tv_priv), GFP_KERNEL); | 1784 | sizeof(struct intel_tv_priv), GFP_KERNEL); |
1785 | if (!intel_output) { | 1785 | if (!intel_encoder) { |
1786 | return; | 1786 | return; |
1787 | } | 1787 | } |
1788 | 1788 | ||
1789 | connector = &intel_output->base; | 1789 | connector = &intel_encoder->base; |
1790 | 1790 | ||
1791 | drm_connector_init(dev, connector, &intel_tv_connector_funcs, | 1791 | drm_connector_init(dev, connector, &intel_tv_connector_funcs, |
1792 | DRM_MODE_CONNECTOR_SVIDEO); | 1792 | DRM_MODE_CONNECTOR_SVIDEO); |
1793 | 1793 | ||
1794 | drm_encoder_init(dev, &intel_output->enc, &intel_tv_enc_funcs, | 1794 | drm_encoder_init(dev, &intel_encoder->enc, &intel_tv_enc_funcs, |
1795 | DRM_MODE_ENCODER_TVDAC); | 1795 | DRM_MODE_ENCODER_TVDAC); |
1796 | 1796 | ||
1797 | drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); | 1797 | drm_mode_connector_attach_encoder(&intel_encoder->base, &intel_encoder->enc); |
1798 | tv_priv = (struct intel_tv_priv *)(intel_output + 1); | 1798 | tv_priv = (struct intel_tv_priv *)(intel_encoder + 1); |
1799 | intel_output->type = INTEL_OUTPUT_TVOUT; | 1799 | intel_encoder->type = INTEL_OUTPUT_TVOUT; |
1800 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 1800 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
1801 | intel_output->clone_mask = (1 << INTEL_TV_CLONE_BIT); | 1801 | intel_encoder->clone_mask = (1 << INTEL_TV_CLONE_BIT); |
1802 | intel_output->enc.possible_crtcs = ((1 << 0) | (1 << 1)); | 1802 | intel_encoder->enc.possible_crtcs = ((1 << 0) | (1 << 1)); |
1803 | intel_output->enc.possible_clones = (1 << INTEL_OUTPUT_TVOUT); | 1803 | intel_encoder->enc.possible_clones = (1 << INTEL_OUTPUT_TVOUT); |
1804 | intel_output->dev_priv = tv_priv; | 1804 | intel_encoder->dev_priv = tv_priv; |
1805 | tv_priv->type = DRM_MODE_CONNECTOR_Unknown; | 1805 | tv_priv->type = DRM_MODE_CONNECTOR_Unknown; |
1806 | 1806 | ||
1807 | /* BIOS margin values */ | 1807 | /* BIOS margin values */ |
@@ -1812,7 +1812,7 @@ intel_tv_init(struct drm_device *dev) | |||
1812 | 1812 | ||
1813 | tv_priv->tv_format = kstrdup(tv_modes[initial_mode].name, GFP_KERNEL); | 1813 | tv_priv->tv_format = kstrdup(tv_modes[initial_mode].name, GFP_KERNEL); |
1814 | 1814 | ||
1815 | drm_encoder_helper_add(&intel_output->enc, &intel_tv_helper_funcs); | 1815 | drm_encoder_helper_add(&intel_encoder->enc, &intel_tv_helper_funcs); |
1816 | drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs); | 1816 | drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs); |
1817 | connector->interlace_allowed = false; | 1817 | connector->interlace_allowed = false; |
1818 | connector->doublescan_allowed = false; | 1818 | connector->doublescan_allowed = false; |