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path: root/drivers/gpu/drm/i915/intel_sdvo.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c45
1 files changed, 28 insertions, 17 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 46be00d66df3..6a4d5bc17697 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1153,20 +1153,21 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1153 pipe_config->pixel_multiplier = 1153 pipe_config->pixel_multiplier =
1154 intel_sdvo_get_pixel_multiplier(adjusted_mode); 1154 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1155 1155
1156 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1157
1156 if (intel_sdvo->color_range_auto) { 1158 if (intel_sdvo->color_range_auto) {
1157 /* See CEA-861-E - 5.1 Default Encoding Parameters */ 1159 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1158 /* FIXME: This bit is only valid when using TMDS encoding and 8 1160 /* FIXME: This bit is only valid when using TMDS encoding and 8
1159 * bit per color mode. */ 1161 * bit per color mode. */
1160 if (intel_sdvo->has_hdmi_monitor && 1162 if (pipe_config->has_hdmi_sink &&
1161 drm_match_cea_mode(adjusted_mode) > 1) 1163 drm_match_cea_mode(adjusted_mode) > 1)
1162 intel_sdvo->color_range = HDMI_COLOR_RANGE_16_235; 1164 pipe_config->limited_color_range = true;
1163 else 1165 } else {
1164 intel_sdvo->color_range = 0; 1166 if (pipe_config->has_hdmi_sink &&
1167 intel_sdvo->color_range == HDMI_COLOR_RANGE_16_235)
1168 pipe_config->limited_color_range = true;
1165 } 1169 }
1166 1170
1167 if (intel_sdvo->color_range)
1168 pipe_config->limited_color_range = true;
1169
1170 /* Clock computation needs to happen after pixel multiplier. */ 1171 /* Clock computation needs to happen after pixel multiplier. */
1171 if (intel_sdvo->is_tv) 1172 if (intel_sdvo->is_tv)
1172 i9xx_adjust_sdvo_tv_clock(pipe_config); 1173 i9xx_adjust_sdvo_tv_clock(pipe_config);
@@ -1174,7 +1175,7 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1174 return true; 1175 return true;
1175} 1176}
1176 1177
1177static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder) 1178static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder)
1178{ 1179{
1179 struct drm_device *dev = intel_encoder->base.dev; 1180 struct drm_device *dev = intel_encoder->base.dev;
1180 struct drm_i915_private *dev_priv = dev->dev_private; 1181 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1223,7 +1224,7 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
1223 if (!intel_sdvo_set_target_input(intel_sdvo)) 1224 if (!intel_sdvo_set_target_input(intel_sdvo))
1224 return; 1225 return;
1225 1226
1226 if (intel_sdvo->has_hdmi_monitor) { 1227 if (crtc->config.has_hdmi_sink) {
1227 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1228 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1228 intel_sdvo_set_colorimetry(intel_sdvo, 1229 intel_sdvo_set_colorimetry(intel_sdvo,
1229 SDVO_COLORIMETRY_RGB256); 1230 SDVO_COLORIMETRY_RGB256);
@@ -1258,8 +1259,8 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
1258 /* The real mode polarity is set by the SDVO commands, using 1259 /* The real mode polarity is set by the SDVO commands, using
1259 * struct intel_sdvo_dtd. */ 1260 * struct intel_sdvo_dtd. */
1260 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1261 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1261 if (!HAS_PCH_SPLIT(dev) && intel_sdvo->is_hdmi) 1262 if (!HAS_PCH_SPLIT(dev) && crtc->config.limited_color_range)
1262 sdvox |= intel_sdvo->color_range; 1263 sdvox |= HDMI_COLOR_RANGE_16_235;
1263 if (INTEL_INFO(dev)->gen < 5) 1264 if (INTEL_INFO(dev)->gen < 5)
1264 sdvox |= SDVO_BORDER_ENABLE; 1265 sdvox |= SDVO_BORDER_ENABLE;
1265 } else { 1266 } else {
@@ -1349,6 +1350,8 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
1349 u8 val; 1350 u8 val;
1350 bool ret; 1351 bool ret;
1351 1352
1353 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1354
1352 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); 1355 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1353 if (!ret) { 1356 if (!ret) {
1354 /* Some sdvo encoders are not spec compliant and don't 1357 /* Some sdvo encoders are not spec compliant and don't
@@ -1377,7 +1380,6 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
1377 * other platfroms. 1380 * other platfroms.
1378 */ 1381 */
1379 if (IS_I915G(dev) || IS_I915GM(dev)) { 1382 if (IS_I915G(dev) || IS_I915GM(dev)) {
1380 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1381 pipe_config->pixel_multiplier = 1383 pipe_config->pixel_multiplier =
1382 ((sdvox & SDVO_PORT_MULTIPLY_MASK) 1384 ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1383 >> SDVO_PORT_MULTIPLY_SHIFT) + 1; 1385 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
@@ -1406,6 +1408,15 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
1406 } 1408 }
1407 } 1409 }
1408 1410
1411 if (sdvox & HDMI_COLOR_RANGE_16_235)
1412 pipe_config->limited_color_range = true;
1413
1414 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1415 &val, 1)) {
1416 if (val == SDVO_ENCODE_HDMI)
1417 pipe_config->has_hdmi_sink = true;
1418 }
1419
1409 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier, 1420 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1410 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", 1421 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1411 pipe_config->pixel_multiplier, encoder_pixel_multiplier); 1422 pipe_config->pixel_multiplier, encoder_pixel_multiplier);
@@ -1732,7 +1743,7 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
1732 enum drm_connector_status ret; 1743 enum drm_connector_status ret;
1733 1744
1734 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1745 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1735 connector->base.id, drm_get_connector_name(connector)); 1746 connector->base.id, connector->name);
1736 1747
1737 if (!intel_sdvo_get_value(intel_sdvo, 1748 if (!intel_sdvo_get_value(intel_sdvo,
1738 SDVO_CMD_GET_ATTACHED_DISPLAYS, 1749 SDVO_CMD_GET_ATTACHED_DISPLAYS,
@@ -1794,7 +1805,7 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1794 struct edid *edid; 1805 struct edid *edid;
1795 1806
1796 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1807 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1797 connector->base.id, drm_get_connector_name(connector)); 1808 connector->base.id, connector->name);
1798 1809
1799 /* set the bus switch and get the modes */ 1810 /* set the bus switch and get the modes */
1800 edid = intel_sdvo_get_edid(connector); 1811 edid = intel_sdvo_get_edid(connector);
@@ -1892,7 +1903,7 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1892 int i; 1903 int i;
1893 1904
1894 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1905 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1895 connector->base.id, drm_get_connector_name(connector)); 1906 connector->base.id, connector->name);
1896 1907
1897 /* Read the list of supported input resolutions for the selected TV 1908 /* Read the list of supported input resolutions for the selected TV
1898 * format. 1909 * format.
@@ -1929,7 +1940,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1929 struct drm_display_mode *newmode; 1940 struct drm_display_mode *newmode;
1930 1941
1931 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", 1942 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1932 connector->base.id, drm_get_connector_name(connector)); 1943 connector->base.id, connector->name);
1933 1944
1934 /* 1945 /*
1935 * Fetch modes from VBT. For SDVO prefer the VBT mode since some 1946 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
@@ -2999,7 +3010,7 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2999 3010
3000 intel_encoder->compute_config = intel_sdvo_compute_config; 3011 intel_encoder->compute_config = intel_sdvo_compute_config;
3001 intel_encoder->disable = intel_disable_sdvo; 3012 intel_encoder->disable = intel_disable_sdvo;
3002 intel_encoder->mode_set = intel_sdvo_mode_set; 3013 intel_encoder->pre_enable = intel_sdvo_pre_enable;
3003 intel_encoder->enable = intel_enable_sdvo; 3014 intel_encoder->enable = intel_enable_sdvo;
3004 intel_encoder->get_hw_state = intel_sdvo_get_hw_state; 3015 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3005 intel_encoder->get_config = intel_sdvo_get_config; 3016 intel_encoder->get_config = intel_sdvo_get_config;