diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 37 |
1 files changed, 15 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 54242e4f6f4c..9ad0c6afc487 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -5603,8 +5603,8 @@ static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv, | |||
5603 | (HSW_PWR_WELL_ENABLE_REQUEST | HSW_PWR_WELL_STATE_ENABLED); | 5603 | (HSW_PWR_WELL_ENABLE_REQUEST | HSW_PWR_WELL_STATE_ENABLED); |
5604 | } | 5604 | } |
5605 | 5605 | ||
5606 | bool intel_display_power_enabled_sw(struct drm_i915_private *dev_priv, | 5606 | bool intel_display_power_enabled_unlocked(struct drm_i915_private *dev_priv, |
5607 | enum intel_display_power_domain domain) | 5607 | enum intel_display_power_domain domain) |
5608 | { | 5608 | { |
5609 | struct i915_power_domains *power_domains; | 5609 | struct i915_power_domains *power_domains; |
5610 | struct i915_power_well *power_well; | 5610 | struct i915_power_well *power_well; |
@@ -5615,16 +5615,19 @@ bool intel_display_power_enabled_sw(struct drm_i915_private *dev_priv, | |||
5615 | return false; | 5615 | return false; |
5616 | 5616 | ||
5617 | power_domains = &dev_priv->power_domains; | 5617 | power_domains = &dev_priv->power_domains; |
5618 | |||
5618 | is_enabled = true; | 5619 | is_enabled = true; |
5620 | |||
5619 | for_each_power_well_rev(i, power_well, BIT(domain), power_domains) { | 5621 | for_each_power_well_rev(i, power_well, BIT(domain), power_domains) { |
5620 | if (power_well->always_on) | 5622 | if (power_well->always_on) |
5621 | continue; | 5623 | continue; |
5622 | 5624 | ||
5623 | if (!power_well->count) { | 5625 | if (!power_well->hw_enabled) { |
5624 | is_enabled = false; | 5626 | is_enabled = false; |
5625 | break; | 5627 | break; |
5626 | } | 5628 | } |
5627 | } | 5629 | } |
5630 | |||
5628 | return is_enabled; | 5631 | return is_enabled; |
5629 | } | 5632 | } |
5630 | 5633 | ||
@@ -5632,30 +5635,15 @@ bool intel_display_power_enabled(struct drm_i915_private *dev_priv, | |||
5632 | enum intel_display_power_domain domain) | 5635 | enum intel_display_power_domain domain) |
5633 | { | 5636 | { |
5634 | struct i915_power_domains *power_domains; | 5637 | struct i915_power_domains *power_domains; |
5635 | struct i915_power_well *power_well; | 5638 | bool ret; |
5636 | bool is_enabled; | ||
5637 | int i; | ||
5638 | |||
5639 | if (dev_priv->pm.suspended) | ||
5640 | return false; | ||
5641 | 5639 | ||
5642 | power_domains = &dev_priv->power_domains; | 5640 | power_domains = &dev_priv->power_domains; |
5643 | 5641 | ||
5644 | is_enabled = true; | ||
5645 | |||
5646 | mutex_lock(&power_domains->lock); | 5642 | mutex_lock(&power_domains->lock); |
5647 | for_each_power_well_rev(i, power_well, BIT(domain), power_domains) { | 5643 | ret = intel_display_power_enabled_unlocked(dev_priv, domain); |
5648 | if (power_well->always_on) | ||
5649 | continue; | ||
5650 | |||
5651 | if (!power_well->ops->is_enabled(dev_priv, power_well)) { | ||
5652 | is_enabled = false; | ||
5653 | break; | ||
5654 | } | ||
5655 | } | ||
5656 | mutex_unlock(&power_domains->lock); | 5644 | mutex_unlock(&power_domains->lock); |
5657 | 5645 | ||
5658 | return is_enabled; | 5646 | return ret; |
5659 | } | 5647 | } |
5660 | 5648 | ||
5661 | /* | 5649 | /* |
@@ -5976,6 +5964,7 @@ void intel_display_power_get(struct drm_i915_private *dev_priv, | |||
5976 | if (!power_well->count++) { | 5964 | if (!power_well->count++) { |
5977 | DRM_DEBUG_KMS("enabling %s\n", power_well->name); | 5965 | DRM_DEBUG_KMS("enabling %s\n", power_well->name); |
5978 | power_well->ops->enable(dev_priv, power_well); | 5966 | power_well->ops->enable(dev_priv, power_well); |
5967 | power_well->hw_enabled = true; | ||
5979 | } | 5968 | } |
5980 | 5969 | ||
5981 | check_power_well_state(dev_priv, power_well); | 5970 | check_power_well_state(dev_priv, power_well); |
@@ -6005,6 +5994,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, | |||
6005 | 5994 | ||
6006 | if (!--power_well->count && i915.disable_power_well) { | 5995 | if (!--power_well->count && i915.disable_power_well) { |
6007 | DRM_DEBUG_KMS("disabling %s\n", power_well->name); | 5996 | DRM_DEBUG_KMS("disabling %s\n", power_well->name); |
5997 | power_well->hw_enabled = false; | ||
6008 | power_well->ops->disable(dev_priv, power_well); | 5998 | power_well->ops->disable(dev_priv, power_well); |
6009 | } | 5999 | } |
6010 | 6000 | ||
@@ -6267,8 +6257,11 @@ static void intel_power_domains_resume(struct drm_i915_private *dev_priv) | |||
6267 | int i; | 6257 | int i; |
6268 | 6258 | ||
6269 | mutex_lock(&power_domains->lock); | 6259 | mutex_lock(&power_domains->lock); |
6270 | for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) | 6260 | for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) { |
6271 | power_well->ops->sync_hw(dev_priv, power_well); | 6261 | power_well->ops->sync_hw(dev_priv, power_well); |
6262 | power_well->hw_enabled = power_well->ops->is_enabled(dev_priv, | ||
6263 | power_well); | ||
6264 | } | ||
6272 | mutex_unlock(&power_domains->lock); | 6265 | mutex_unlock(&power_domains->lock); |
6273 | } | 6266 | } |
6274 | 6267 | ||