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path: root/drivers/gpu/drm/i915/intel_panel.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_panel.c')
-rw-r--r--drivers/gpu/drm/i915/intel_panel.c37
1 files changed, 0 insertions, 37 deletions
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index c65992df458d..d860abeda70f 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -30,8 +30,6 @@
30 30
31#include "intel_drv.h" 31#include "intel_drv.h"
32 32
33#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
34
35void 33void
36intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 34intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
37 struct drm_display_mode *adjusted_mode) 35 struct drm_display_mode *adjusted_mode)
@@ -112,19 +110,6 @@ done:
112 dev_priv->pch_pf_size = (width << 16) | height; 110 dev_priv->pch_pf_size = (width << 16) | height;
113} 111}
114 112
115static int is_backlight_combination_mode(struct drm_device *dev)
116{
117 struct drm_i915_private *dev_priv = dev->dev_private;
118
119 if (INTEL_INFO(dev)->gen >= 4)
120 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
121
122 if (IS_GEN2(dev))
123 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
124
125 return 0;
126}
127
128static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) 113static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv)
129{ 114{
130 u32 val; 115 u32 val;
@@ -181,9 +166,6 @@ u32 intel_panel_get_max_backlight(struct drm_device *dev)
181 if (INTEL_INFO(dev)->gen < 4) 166 if (INTEL_INFO(dev)->gen < 4)
182 max &= ~1; 167 max &= ~1;
183 } 168 }
184
185 if (is_backlight_combination_mode(dev))
186 max *= 0xff;
187 } 169 }
188 170
189 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max); 171 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
@@ -201,15 +183,6 @@ u32 intel_panel_get_backlight(struct drm_device *dev)
201 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 183 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
202 if (IS_PINEVIEW(dev)) 184 if (IS_PINEVIEW(dev))
203 val >>= 1; 185 val >>= 1;
204
205 if (is_backlight_combination_mode(dev)){
206 u8 lbpc;
207
208 val &= ~1;
209 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
210 val *= lbpc;
211 val >>= 1;
212 }
213 } 186 }
214 187
215 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val); 188 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
@@ -232,16 +205,6 @@ void intel_panel_set_backlight(struct drm_device *dev, u32 level)
232 205
233 if (HAS_PCH_SPLIT(dev)) 206 if (HAS_PCH_SPLIT(dev))
234 return intel_pch_panel_set_backlight(dev, level); 207 return intel_pch_panel_set_backlight(dev, level);
235
236 if (is_backlight_combination_mode(dev)){
237 u32 max = intel_panel_get_max_backlight(dev);
238 u8 lpbc;
239
240 lpbc = level * 0xfe / max + 1;
241 level /= lpbc;
242 pci_write_config_byte(dev->pdev, PCI_LBPC, lpbc);
243 }
244
245 tmp = I915_READ(BLC_PWM_CTL); 208 tmp = I915_READ(BLC_PWM_CTL);
246 if (IS_PINEVIEW(dev)) { 209 if (IS_PINEVIEW(dev)) {
247 tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1); 210 tmp &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);