diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 555 |
1 files changed, 301 insertions, 254 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 6ec39a86ed06..b28f7bd9f88a 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -43,102 +43,110 @@ | |||
43 | /* Private structure for the integrated LVDS support */ | 43 | /* Private structure for the integrated LVDS support */ |
44 | struct intel_lvds { | 44 | struct intel_lvds { |
45 | struct intel_encoder base; | 45 | struct intel_encoder base; |
46 | |||
47 | struct edid *edid; | ||
48 | |||
46 | int fitting_mode; | 49 | int fitting_mode; |
47 | u32 pfit_control; | 50 | u32 pfit_control; |
48 | u32 pfit_pgm_ratios; | 51 | u32 pfit_pgm_ratios; |
52 | bool pfit_dirty; | ||
53 | |||
54 | struct drm_display_mode *fixed_mode; | ||
49 | }; | 55 | }; |
50 | 56 | ||
51 | static struct intel_lvds *enc_to_intel_lvds(struct drm_encoder *encoder) | 57 | static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder) |
52 | { | 58 | { |
53 | return container_of(enc_to_intel_encoder(encoder), struct intel_lvds, base); | 59 | return container_of(encoder, struct intel_lvds, base.base); |
54 | } | 60 | } |
55 | 61 | ||
56 | /** | 62 | static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector) |
57 | * Sets the backlight level. | ||
58 | * | ||
59 | * \param level backlight level, from 0 to intel_lvds_get_max_backlight(). | ||
60 | */ | ||
61 | static void intel_lvds_set_backlight(struct drm_device *dev, int level) | ||
62 | { | 63 | { |
63 | struct drm_i915_private *dev_priv = dev->dev_private; | 64 | return container_of(intel_attached_encoder(connector), |
64 | u32 blc_pwm_ctl, reg; | 65 | struct intel_lvds, base); |
65 | |||
66 | if (HAS_PCH_SPLIT(dev)) | ||
67 | reg = BLC_PWM_CPU_CTL; | ||
68 | else | ||
69 | reg = BLC_PWM_CTL; | ||
70 | |||
71 | blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK; | ||
72 | I915_WRITE(reg, (blc_pwm_ctl | | ||
73 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT))); | ||
74 | } | 66 | } |
75 | 67 | ||
76 | /** | 68 | /** |
77 | * Returns the maximum level of the backlight duty cycle field. | 69 | * Sets the power state for the panel. |
78 | */ | 70 | */ |
79 | static u32 intel_lvds_get_max_backlight(struct drm_device *dev) | 71 | static void intel_lvds_enable(struct intel_lvds *intel_lvds) |
80 | { | 72 | { |
73 | struct drm_device *dev = intel_lvds->base.base.dev; | ||
81 | struct drm_i915_private *dev_priv = dev->dev_private; | 74 | struct drm_i915_private *dev_priv = dev->dev_private; |
82 | u32 reg; | 75 | u32 ctl_reg, lvds_reg; |
83 | 76 | ||
84 | if (HAS_PCH_SPLIT(dev)) | 77 | if (HAS_PCH_SPLIT(dev)) { |
85 | reg = BLC_PWM_PCH_CTL2; | 78 | ctl_reg = PCH_PP_CONTROL; |
86 | else | 79 | lvds_reg = PCH_LVDS; |
87 | reg = BLC_PWM_CTL; | 80 | } else { |
81 | ctl_reg = PP_CONTROL; | ||
82 | lvds_reg = LVDS; | ||
83 | } | ||
84 | |||
85 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); | ||
88 | 86 | ||
89 | return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >> | 87 | if (intel_lvds->pfit_dirty) { |
90 | BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; | 88 | /* |
89 | * Enable automatic panel scaling so that non-native modes | ||
90 | * fill the screen. The panel fitter should only be | ||
91 | * adjusted whilst the pipe is disabled, according to | ||
92 | * register description and PRM. | ||
93 | */ | ||
94 | DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", | ||
95 | intel_lvds->pfit_control, | ||
96 | intel_lvds->pfit_pgm_ratios); | ||
97 | if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) { | ||
98 | DRM_ERROR("timed out waiting for panel to power off\n"); | ||
99 | } else { | ||
100 | I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); | ||
101 | I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); | ||
102 | intel_lvds->pfit_dirty = false; | ||
103 | } | ||
104 | } | ||
105 | |||
106 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON); | ||
107 | POSTING_READ(lvds_reg); | ||
108 | |||
109 | intel_panel_enable_backlight(dev); | ||
91 | } | 110 | } |
92 | 111 | ||
93 | /** | 112 | static void intel_lvds_disable(struct intel_lvds *intel_lvds) |
94 | * Sets the power state for the panel. | ||
95 | */ | ||
96 | static void intel_lvds_set_power(struct drm_device *dev, bool on) | ||
97 | { | 113 | { |
114 | struct drm_device *dev = intel_lvds->base.base.dev; | ||
98 | struct drm_i915_private *dev_priv = dev->dev_private; | 115 | struct drm_i915_private *dev_priv = dev->dev_private; |
99 | u32 ctl_reg, status_reg, lvds_reg; | 116 | u32 ctl_reg, lvds_reg; |
100 | 117 | ||
101 | if (HAS_PCH_SPLIT(dev)) { | 118 | if (HAS_PCH_SPLIT(dev)) { |
102 | ctl_reg = PCH_PP_CONTROL; | 119 | ctl_reg = PCH_PP_CONTROL; |
103 | status_reg = PCH_PP_STATUS; | ||
104 | lvds_reg = PCH_LVDS; | 120 | lvds_reg = PCH_LVDS; |
105 | } else { | 121 | } else { |
106 | ctl_reg = PP_CONTROL; | 122 | ctl_reg = PP_CONTROL; |
107 | status_reg = PP_STATUS; | ||
108 | lvds_reg = LVDS; | 123 | lvds_reg = LVDS; |
109 | } | 124 | } |
110 | 125 | ||
111 | if (on) { | 126 | intel_panel_disable_backlight(dev); |
112 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); | ||
113 | POSTING_READ(lvds_reg); | ||
114 | 127 | ||
115 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | | 128 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON); |
116 | POWER_TARGET_ON); | ||
117 | if (wait_for(I915_READ(status_reg) & PP_ON, 1000, 0)) | ||
118 | DRM_ERROR("timed out waiting to enable LVDS pipe"); | ||
119 | |||
120 | intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle); | ||
121 | } else { | ||
122 | intel_lvds_set_backlight(dev, 0); | ||
123 | 129 | ||
124 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & | 130 | if (intel_lvds->pfit_control) { |
125 | ~POWER_TARGET_ON); | 131 | if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) |
126 | if (wait_for((I915_READ(status_reg) & PP_ON) == 0, 1000, 0)) | 132 | DRM_ERROR("timed out waiting for panel to power off\n"); |
127 | DRM_ERROR("timed out waiting for LVDS pipe to turn off"); | ||
128 | 133 | ||
129 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); | 134 | I915_WRITE(PFIT_CONTROL, 0); |
130 | POSTING_READ(lvds_reg); | 135 | intel_lvds->pfit_dirty = true; |
131 | } | 136 | } |
137 | |||
138 | I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); | ||
139 | POSTING_READ(lvds_reg); | ||
132 | } | 140 | } |
133 | 141 | ||
134 | static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) | 142 | static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) |
135 | { | 143 | { |
136 | struct drm_device *dev = encoder->dev; | 144 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
137 | 145 | ||
138 | if (mode == DRM_MODE_DPMS_ON) | 146 | if (mode == DRM_MODE_DPMS_ON) |
139 | intel_lvds_set_power(dev, true); | 147 | intel_lvds_enable(intel_lvds); |
140 | else | 148 | else |
141 | intel_lvds_set_power(dev, false); | 149 | intel_lvds_disable(intel_lvds); |
142 | 150 | ||
143 | /* XXX: We never power down the LVDS pairs. */ | 151 | /* XXX: We never power down the LVDS pairs. */ |
144 | } | 152 | } |
@@ -146,16 +154,13 @@ static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
146 | static int intel_lvds_mode_valid(struct drm_connector *connector, | 154 | static int intel_lvds_mode_valid(struct drm_connector *connector, |
147 | struct drm_display_mode *mode) | 155 | struct drm_display_mode *mode) |
148 | { | 156 | { |
149 | struct drm_device *dev = connector->dev; | 157 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); |
150 | struct drm_i915_private *dev_priv = dev->dev_private; | 158 | struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode; |
151 | struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode; | ||
152 | 159 | ||
153 | if (fixed_mode) { | 160 | if (mode->hdisplay > fixed_mode->hdisplay) |
154 | if (mode->hdisplay > fixed_mode->hdisplay) | 161 | return MODE_PANEL; |
155 | return MODE_PANEL; | 162 | if (mode->vdisplay > fixed_mode->vdisplay) |
156 | if (mode->vdisplay > fixed_mode->vdisplay) | 163 | return MODE_PANEL; |
157 | return MODE_PANEL; | ||
158 | } | ||
159 | 164 | ||
160 | return MODE_OK; | 165 | return MODE_OK; |
161 | } | 166 | } |
@@ -223,12 +228,13 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
223 | struct drm_device *dev = encoder->dev; | 228 | struct drm_device *dev = encoder->dev; |
224 | struct drm_i915_private *dev_priv = dev->dev_private; | 229 | struct drm_i915_private *dev_priv = dev->dev_private; |
225 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); | 230 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
226 | struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder); | 231 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
227 | struct drm_encoder *tmp_encoder; | 232 | struct drm_encoder *tmp_encoder; |
228 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; | 233 | u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; |
234 | int pipe; | ||
229 | 235 | ||
230 | /* Should never happen!! */ | 236 | /* Should never happen!! */ |
231 | if (!IS_I965G(dev) && intel_crtc->pipe == 0) { | 237 | if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { |
232 | DRM_ERROR("Can't support LVDS on pipe A\n"); | 238 | DRM_ERROR("Can't support LVDS on pipe A\n"); |
233 | return false; | 239 | return false; |
234 | } | 240 | } |
@@ -241,9 +247,6 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
241 | return false; | 247 | return false; |
242 | } | 248 | } |
243 | } | 249 | } |
244 | /* If we don't have a panel mode, there is nothing we can do */ | ||
245 | if (dev_priv->panel_fixed_mode == NULL) | ||
246 | return true; | ||
247 | 250 | ||
248 | /* | 251 | /* |
249 | * We have timings from the BIOS for the panel, put them in | 252 | * We have timings from the BIOS for the panel, put them in |
@@ -251,7 +254,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
251 | * with the panel scaling set up to source from the H/VDisplay | 254 | * with the panel scaling set up to source from the H/VDisplay |
252 | * of the original mode. | 255 | * of the original mode. |
253 | */ | 256 | */ |
254 | intel_fixed_panel_mode(dev_priv->panel_fixed_mode, adjusted_mode); | 257 | intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode); |
255 | 258 | ||
256 | if (HAS_PCH_SPLIT(dev)) { | 259 | if (HAS_PCH_SPLIT(dev)) { |
257 | intel_pch_panel_fitting(dev, intel_lvds->fitting_mode, | 260 | intel_pch_panel_fitting(dev, intel_lvds->fitting_mode, |
@@ -259,19 +262,13 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
259 | return true; | 262 | return true; |
260 | } | 263 | } |
261 | 264 | ||
262 | /* Make sure pre-965s set dither correctly */ | ||
263 | if (!IS_I965G(dev)) { | ||
264 | if (dev_priv->panel_wants_dither || dev_priv->lvds_dither) | ||
265 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | ||
266 | } | ||
267 | |||
268 | /* Native modes don't need fitting */ | 265 | /* Native modes don't need fitting */ |
269 | if (adjusted_mode->hdisplay == mode->hdisplay && | 266 | if (adjusted_mode->hdisplay == mode->hdisplay && |
270 | adjusted_mode->vdisplay == mode->vdisplay) | 267 | adjusted_mode->vdisplay == mode->vdisplay) |
271 | goto out; | 268 | goto out; |
272 | 269 | ||
273 | /* 965+ wants fuzzy fitting */ | 270 | /* 965+ wants fuzzy fitting */ |
274 | if (IS_I965G(dev)) | 271 | if (INTEL_INFO(dev)->gen >= 4) |
275 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | | 272 | pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | |
276 | PFIT_FILTER_FUZZY); | 273 | PFIT_FILTER_FUZZY); |
277 | 274 | ||
@@ -281,8 +278,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
281 | * to register description and PRM. | 278 | * to register description and PRM. |
282 | * Change the value here to see the borders for debugging | 279 | * Change the value here to see the borders for debugging |
283 | */ | 280 | */ |
284 | I915_WRITE(BCLRPAT_A, 0); | 281 | for_each_pipe(pipe) |
285 | I915_WRITE(BCLRPAT_B, 0); | 282 | I915_WRITE(BCLRPAT(pipe), 0); |
286 | 283 | ||
287 | switch (intel_lvds->fitting_mode) { | 284 | switch (intel_lvds->fitting_mode) { |
288 | case DRM_MODE_SCALE_CENTER: | 285 | case DRM_MODE_SCALE_CENTER: |
@@ -297,18 +294,17 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
297 | 294 | ||
298 | case DRM_MODE_SCALE_ASPECT: | 295 | case DRM_MODE_SCALE_ASPECT: |
299 | /* Scale but preserve the aspect ratio */ | 296 | /* Scale but preserve the aspect ratio */ |
300 | if (IS_I965G(dev)) { | 297 | if (INTEL_INFO(dev)->gen >= 4) { |
301 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; | 298 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
302 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; | 299 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
303 | 300 | ||
304 | pfit_control |= PFIT_ENABLE; | ||
305 | /* 965+ is easy, it does everything in hw */ | 301 | /* 965+ is easy, it does everything in hw */ |
306 | if (scaled_width > scaled_height) | 302 | if (scaled_width > scaled_height) |
307 | pfit_control |= PFIT_SCALING_PILLAR; | 303 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR; |
308 | else if (scaled_width < scaled_height) | 304 | else if (scaled_width < scaled_height) |
309 | pfit_control |= PFIT_SCALING_LETTER; | 305 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER; |
310 | else | 306 | else if (adjusted_mode->hdisplay != mode->hdisplay) |
311 | pfit_control |= PFIT_SCALING_AUTO; | 307 | pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; |
312 | } else { | 308 | } else { |
313 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; | 309 | u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; |
314 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; | 310 | u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; |
@@ -355,13 +351,17 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
355 | * Full scaling, even if it changes the aspect ratio. | 351 | * Full scaling, even if it changes the aspect ratio. |
356 | * Fortunately this is all done for us in hw. | 352 | * Fortunately this is all done for us in hw. |
357 | */ | 353 | */ |
358 | pfit_control |= PFIT_ENABLE; | 354 | if (mode->vdisplay != adjusted_mode->vdisplay || |
359 | if (IS_I965G(dev)) | 355 | mode->hdisplay != adjusted_mode->hdisplay) { |
360 | pfit_control |= PFIT_SCALING_AUTO; | 356 | pfit_control |= PFIT_ENABLE; |
361 | else | 357 | if (INTEL_INFO(dev)->gen >= 4) |
362 | pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | | 358 | pfit_control |= PFIT_SCALING_AUTO; |
363 | VERT_INTERP_BILINEAR | | 359 | else |
364 | HORIZ_INTERP_BILINEAR); | 360 | pfit_control |= (VERT_AUTO_SCALE | |
361 | VERT_INTERP_BILINEAR | | ||
362 | HORIZ_AUTO_SCALE | | ||
363 | HORIZ_INTERP_BILINEAR); | ||
364 | } | ||
365 | break; | 365 | break; |
366 | 366 | ||
367 | default: | 367 | default: |
@@ -369,8 +369,22 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
369 | } | 369 | } |
370 | 370 | ||
371 | out: | 371 | out: |
372 | intel_lvds->pfit_control = pfit_control; | 372 | /* If not enabling scaling, be consistent and always use 0. */ |
373 | intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios; | 373 | if ((pfit_control & PFIT_ENABLE) == 0) { |
374 | pfit_control = 0; | ||
375 | pfit_pgm_ratios = 0; | ||
376 | } | ||
377 | |||
378 | /* Make sure pre-965 set dither correctly */ | ||
379 | if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither) | ||
380 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | ||
381 | |||
382 | if (pfit_control != intel_lvds->pfit_control || | ||
383 | pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) { | ||
384 | intel_lvds->pfit_control = pfit_control; | ||
385 | intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios; | ||
386 | intel_lvds->pfit_dirty = true; | ||
387 | } | ||
374 | dev_priv->lvds_border_bits = border; | 388 | dev_priv->lvds_border_bits = border; |
375 | 389 | ||
376 | /* | 390 | /* |
@@ -386,56 +400,66 @@ static void intel_lvds_prepare(struct drm_encoder *encoder) | |||
386 | { | 400 | { |
387 | struct drm_device *dev = encoder->dev; | 401 | struct drm_device *dev = encoder->dev; |
388 | struct drm_i915_private *dev_priv = dev->dev_private; | 402 | struct drm_i915_private *dev_priv = dev->dev_private; |
389 | u32 reg; | 403 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); |
390 | 404 | ||
391 | if (HAS_PCH_SPLIT(dev)) | 405 | /* We try to do the minimum that is necessary in order to unlock |
392 | reg = BLC_PWM_CPU_CTL; | 406 | * the registers for mode setting. |
393 | else | 407 | * |
394 | reg = BLC_PWM_CTL; | 408 | * On Ironlake, this is quite simple as we just set the unlock key |
395 | 409 | * and ignore all subtleties. (This may cause some issues...) | |
396 | dev_priv->saveBLC_PWM_CTL = I915_READ(reg); | 410 | * |
397 | dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL & | 411 | * Prior to Ironlake, we must disable the pipe if we want to adjust |
398 | BACKLIGHT_DUTY_CYCLE_MASK); | 412 | * the panel fitter. However at all other times we can just reset |
413 | * the registers regardless. | ||
414 | */ | ||
399 | 415 | ||
400 | intel_lvds_set_power(dev, false); | 416 | if (HAS_PCH_SPLIT(dev)) { |
417 | I915_WRITE(PCH_PP_CONTROL, | ||
418 | I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); | ||
419 | } else if (intel_lvds->pfit_dirty) { | ||
420 | I915_WRITE(PP_CONTROL, | ||
421 | (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS) | ||
422 | & ~POWER_TARGET_ON); | ||
423 | } else { | ||
424 | I915_WRITE(PP_CONTROL, | ||
425 | I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); | ||
426 | } | ||
401 | } | 427 | } |
402 | 428 | ||
403 | static void intel_lvds_commit( struct drm_encoder *encoder) | 429 | static void intel_lvds_commit(struct drm_encoder *encoder) |
404 | { | 430 | { |
405 | struct drm_device *dev = encoder->dev; | 431 | struct drm_device *dev = encoder->dev; |
406 | struct drm_i915_private *dev_priv = dev->dev_private; | 432 | struct drm_i915_private *dev_priv = dev->dev_private; |
433 | struct intel_lvds *intel_lvds = to_intel_lvds(encoder); | ||
407 | 434 | ||
408 | if (dev_priv->backlight_duty_cycle == 0) | 435 | /* Undo any unlocking done in prepare to prevent accidental |
409 | dev_priv->backlight_duty_cycle = | 436 | * adjustment of the registers. |
410 | intel_lvds_get_max_backlight(dev); | 437 | */ |
438 | if (HAS_PCH_SPLIT(dev)) { | ||
439 | u32 val = I915_READ(PCH_PP_CONTROL); | ||
440 | if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS) | ||
441 | I915_WRITE(PCH_PP_CONTROL, val & 0x3); | ||
442 | } else { | ||
443 | u32 val = I915_READ(PP_CONTROL); | ||
444 | if ((val & PANEL_UNLOCK_REGS) == PANEL_UNLOCK_REGS) | ||
445 | I915_WRITE(PP_CONTROL, val & 0x3); | ||
446 | } | ||
411 | 447 | ||
412 | intel_lvds_set_power(dev, true); | 448 | /* Always do a full power on as we do not know what state |
449 | * we were left in. | ||
450 | */ | ||
451 | intel_lvds_enable(intel_lvds); | ||
413 | } | 452 | } |
414 | 453 | ||
415 | static void intel_lvds_mode_set(struct drm_encoder *encoder, | 454 | static void intel_lvds_mode_set(struct drm_encoder *encoder, |
416 | struct drm_display_mode *mode, | 455 | struct drm_display_mode *mode, |
417 | struct drm_display_mode *adjusted_mode) | 456 | struct drm_display_mode *adjusted_mode) |
418 | { | 457 | { |
419 | struct drm_device *dev = encoder->dev; | ||
420 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
421 | struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder); | ||
422 | |||
423 | /* | 458 | /* |
424 | * The LVDS pin pair will already have been turned on in the | 459 | * The LVDS pin pair will already have been turned on in the |
425 | * intel_crtc_mode_set since it has a large impact on the DPLL | 460 | * intel_crtc_mode_set since it has a large impact on the DPLL |
426 | * settings. | 461 | * settings. |
427 | */ | 462 | */ |
428 | |||
429 | if (HAS_PCH_SPLIT(dev)) | ||
430 | return; | ||
431 | |||
432 | /* | ||
433 | * Enable automatic panel scaling so that non-native modes fill the | ||
434 | * screen. Should be enabled before the pipe is enabled, according to | ||
435 | * register description and PRM. | ||
436 | */ | ||
437 | I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios); | ||
438 | I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control); | ||
439 | } | 463 | } |
440 | 464 | ||
441 | /** | 465 | /** |
@@ -449,15 +473,13 @@ static enum drm_connector_status | |||
449 | intel_lvds_detect(struct drm_connector *connector, bool force) | 473 | intel_lvds_detect(struct drm_connector *connector, bool force) |
450 | { | 474 | { |
451 | struct drm_device *dev = connector->dev; | 475 | struct drm_device *dev = connector->dev; |
452 | enum drm_connector_status status = connector_status_connected; | 476 | enum drm_connector_status status; |
453 | 477 | ||
454 | /* ACPI lid methods were generally unreliable in this generation, so | 478 | status = intel_panel_detect(dev); |
455 | * don't even bother. | 479 | if (status != connector_status_unknown) |
456 | */ | 480 | return status; |
457 | if (IS_GEN2(dev) || IS_GEN3(dev)) | ||
458 | return connector_status_connected; | ||
459 | 481 | ||
460 | return status; | 482 | return connector_status_connected; |
461 | } | 483 | } |
462 | 484 | ||
463 | /** | 485 | /** |
@@ -465,38 +487,19 @@ intel_lvds_detect(struct drm_connector *connector, bool force) | |||
465 | */ | 487 | */ |
466 | static int intel_lvds_get_modes(struct drm_connector *connector) | 488 | static int intel_lvds_get_modes(struct drm_connector *connector) |
467 | { | 489 | { |
490 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); | ||
468 | struct drm_device *dev = connector->dev; | 491 | struct drm_device *dev = connector->dev; |
469 | struct drm_encoder *encoder = intel_attached_encoder(connector); | 492 | struct drm_display_mode *mode; |
470 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); | ||
471 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
472 | int ret = 0; | ||
473 | |||
474 | if (dev_priv->lvds_edid_good) { | ||
475 | ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus); | ||
476 | |||
477 | if (ret) | ||
478 | return ret; | ||
479 | } | ||
480 | |||
481 | /* Didn't get an EDID, so | ||
482 | * Set wide sync ranges so we get all modes | ||
483 | * handed to valid_mode for checking | ||
484 | */ | ||
485 | connector->display_info.min_vfreq = 0; | ||
486 | connector->display_info.max_vfreq = 200; | ||
487 | connector->display_info.min_hfreq = 0; | ||
488 | connector->display_info.max_hfreq = 200; | ||
489 | |||
490 | if (dev_priv->panel_fixed_mode != NULL) { | ||
491 | struct drm_display_mode *mode; | ||
492 | 493 | ||
493 | mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); | 494 | if (intel_lvds->edid) |
494 | drm_mode_probed_add(connector, mode); | 495 | return drm_add_edid_modes(connector, intel_lvds->edid); |
495 | 496 | ||
496 | return 1; | 497 | mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode); |
497 | } | 498 | if (mode == NULL) |
499 | return 0; | ||
498 | 500 | ||
499 | return 0; | 501 | drm_mode_probed_add(connector, mode); |
502 | return 1; | ||
500 | } | 503 | } |
501 | 504 | ||
502 | static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) | 505 | static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) |
@@ -536,6 +539,9 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val, | |||
536 | struct drm_device *dev = dev_priv->dev; | 539 | struct drm_device *dev = dev_priv->dev; |
537 | struct drm_connector *connector = dev_priv->int_lvds_connector; | 540 | struct drm_connector *connector = dev_priv->int_lvds_connector; |
538 | 541 | ||
542 | if (dev->switch_power_state != DRM_SWITCH_POWER_ON) | ||
543 | return NOTIFY_OK; | ||
544 | |||
539 | /* | 545 | /* |
540 | * check and update the status of LVDS connector after receiving | 546 | * check and update the status of LVDS connector after receiving |
541 | * the LID nofication event. | 547 | * the LID nofication event. |
@@ -587,18 +593,17 @@ static int intel_lvds_set_property(struct drm_connector *connector, | |||
587 | struct drm_property *property, | 593 | struct drm_property *property, |
588 | uint64_t value) | 594 | uint64_t value) |
589 | { | 595 | { |
596 | struct intel_lvds *intel_lvds = intel_attached_lvds(connector); | ||
590 | struct drm_device *dev = connector->dev; | 597 | struct drm_device *dev = connector->dev; |
591 | 598 | ||
592 | if (property == dev->mode_config.scaling_mode_property && | 599 | if (property == dev->mode_config.scaling_mode_property) { |
593 | connector->encoder) { | 600 | struct drm_crtc *crtc = intel_lvds->base.base.crtc; |
594 | struct drm_crtc *crtc = connector->encoder->crtc; | ||
595 | struct drm_encoder *encoder = connector->encoder; | ||
596 | struct intel_lvds *intel_lvds = enc_to_intel_lvds(encoder); | ||
597 | 601 | ||
598 | if (value == DRM_MODE_SCALE_NONE) { | 602 | if (value == DRM_MODE_SCALE_NONE) { |
599 | DRM_DEBUG_KMS("no scaling not supported\n"); | 603 | DRM_DEBUG_KMS("no scaling not supported\n"); |
600 | return 0; | 604 | return -EINVAL; |
601 | } | 605 | } |
606 | |||
602 | if (intel_lvds->fitting_mode == value) { | 607 | if (intel_lvds->fitting_mode == value) { |
603 | /* the LVDS scaling property is not changed */ | 608 | /* the LVDS scaling property is not changed */ |
604 | return 0; | 609 | return 0; |
@@ -628,7 +633,7 @@ static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { | |||
628 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { | 633 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { |
629 | .get_modes = intel_lvds_get_modes, | 634 | .get_modes = intel_lvds_get_modes, |
630 | .mode_valid = intel_lvds_mode_valid, | 635 | .mode_valid = intel_lvds_mode_valid, |
631 | .best_encoder = intel_attached_encoder, | 636 | .best_encoder = intel_best_encoder, |
632 | }; | 637 | }; |
633 | 638 | ||
634 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { | 639 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { |
@@ -701,6 +706,14 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
701 | }, | 706 | }, |
702 | { | 707 | { |
703 | .callback = intel_no_lvds_dmi_callback, | 708 | .callback = intel_no_lvds_dmi_callback, |
709 | .ident = "AOpen i915GMm-HFS", | ||
710 | .matches = { | ||
711 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), | ||
712 | DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), | ||
713 | }, | ||
714 | }, | ||
715 | { | ||
716 | .callback = intel_no_lvds_dmi_callback, | ||
704 | .ident = "Aopen i945GTt-VFA", | 717 | .ident = "Aopen i945GTt-VFA", |
705 | .matches = { | 718 | .matches = { |
706 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), | 719 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
@@ -714,6 +727,14 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
714 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), | 727 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), |
715 | }, | 728 | }, |
716 | }, | 729 | }, |
730 | { | ||
731 | .callback = intel_no_lvds_dmi_callback, | ||
732 | .ident = "Asus EeeBox PC EB1007", | ||
733 | .matches = { | ||
734 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), | ||
735 | DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), | ||
736 | }, | ||
737 | }, | ||
717 | 738 | ||
718 | { } /* terminating entry */ | 739 | { } /* terminating entry */ |
719 | }; | 740 | }; |
@@ -726,16 +747,14 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
726 | * Find the reduced downclock for LVDS in EDID. | 747 | * Find the reduced downclock for LVDS in EDID. |
727 | */ | 748 | */ |
728 | static void intel_find_lvds_downclock(struct drm_device *dev, | 749 | static void intel_find_lvds_downclock(struct drm_device *dev, |
729 | struct drm_connector *connector) | 750 | struct drm_display_mode *fixed_mode, |
751 | struct drm_connector *connector) | ||
730 | { | 752 | { |
731 | struct drm_i915_private *dev_priv = dev->dev_private; | 753 | struct drm_i915_private *dev_priv = dev->dev_private; |
732 | struct drm_display_mode *scan, *panel_fixed_mode; | 754 | struct drm_display_mode *scan; |
733 | int temp_downclock; | 755 | int temp_downclock; |
734 | 756 | ||
735 | panel_fixed_mode = dev_priv->panel_fixed_mode; | 757 | temp_downclock = fixed_mode->clock; |
736 | temp_downclock = panel_fixed_mode->clock; | ||
737 | |||
738 | mutex_lock(&dev->mode_config.mutex); | ||
739 | list_for_each_entry(scan, &connector->probed_modes, head) { | 758 | list_for_each_entry(scan, &connector->probed_modes, head) { |
740 | /* | 759 | /* |
741 | * If one mode has the same resolution with the fixed_panel | 760 | * If one mode has the same resolution with the fixed_panel |
@@ -744,14 +763,14 @@ static void intel_find_lvds_downclock(struct drm_device *dev, | |||
744 | * case we can set the different FPx0/1 to dynamically select | 763 | * case we can set the different FPx0/1 to dynamically select |
745 | * between low and high frequency. | 764 | * between low and high frequency. |
746 | */ | 765 | */ |
747 | if (scan->hdisplay == panel_fixed_mode->hdisplay && | 766 | if (scan->hdisplay == fixed_mode->hdisplay && |
748 | scan->hsync_start == panel_fixed_mode->hsync_start && | 767 | scan->hsync_start == fixed_mode->hsync_start && |
749 | scan->hsync_end == panel_fixed_mode->hsync_end && | 768 | scan->hsync_end == fixed_mode->hsync_end && |
750 | scan->htotal == panel_fixed_mode->htotal && | 769 | scan->htotal == fixed_mode->htotal && |
751 | scan->vdisplay == panel_fixed_mode->vdisplay && | 770 | scan->vdisplay == fixed_mode->vdisplay && |
752 | scan->vsync_start == panel_fixed_mode->vsync_start && | 771 | scan->vsync_start == fixed_mode->vsync_start && |
753 | scan->vsync_end == panel_fixed_mode->vsync_end && | 772 | scan->vsync_end == fixed_mode->vsync_end && |
754 | scan->vtotal == panel_fixed_mode->vtotal) { | 773 | scan->vtotal == fixed_mode->vtotal) { |
755 | if (scan->clock < temp_downclock) { | 774 | if (scan->clock < temp_downclock) { |
756 | /* | 775 | /* |
757 | * The downclock is already found. But we | 776 | * The downclock is already found. But we |
@@ -761,17 +780,14 @@ static void intel_find_lvds_downclock(struct drm_device *dev, | |||
761 | } | 780 | } |
762 | } | 781 | } |
763 | } | 782 | } |
764 | mutex_unlock(&dev->mode_config.mutex); | 783 | if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) { |
765 | if (temp_downclock < panel_fixed_mode->clock && | ||
766 | i915_lvds_downclock) { | ||
767 | /* We found the downclock for LVDS. */ | 784 | /* We found the downclock for LVDS. */ |
768 | dev_priv->lvds_downclock_avail = 1; | 785 | dev_priv->lvds_downclock_avail = 1; |
769 | dev_priv->lvds_downclock = temp_downclock; | 786 | dev_priv->lvds_downclock = temp_downclock; |
770 | DRM_DEBUG_KMS("LVDS downclock is found in EDID. " | 787 | DRM_DEBUG_KMS("LVDS downclock is found in EDID. " |
771 | "Normal clock %dKhz, downclock %dKhz\n", | 788 | "Normal clock %dKhz, downclock %dKhz\n", |
772 | panel_fixed_mode->clock, temp_downclock); | 789 | fixed_mode->clock, temp_downclock); |
773 | } | 790 | } |
774 | return; | ||
775 | } | 791 | } |
776 | 792 | ||
777 | /* | 793 | /* |
@@ -780,38 +796,48 @@ static void intel_find_lvds_downclock(struct drm_device *dev, | |||
780 | * If it is present, return 1. | 796 | * If it is present, return 1. |
781 | * If it is not present, return false. | 797 | * If it is not present, return false. |
782 | * If no child dev is parsed from VBT, it assumes that the LVDS is present. | 798 | * If no child dev is parsed from VBT, it assumes that the LVDS is present. |
783 | * Note: The addin_offset should also be checked for LVDS panel. | ||
784 | * Only when it is non-zero, it is assumed that it is present. | ||
785 | */ | 799 | */ |
786 | static int lvds_is_present_in_vbt(struct drm_device *dev) | 800 | static bool lvds_is_present_in_vbt(struct drm_device *dev, |
801 | u8 *i2c_pin) | ||
787 | { | 802 | { |
788 | struct drm_i915_private *dev_priv = dev->dev_private; | 803 | struct drm_i915_private *dev_priv = dev->dev_private; |
789 | struct child_device_config *p_child; | 804 | int i; |
790 | int i, ret; | ||
791 | 805 | ||
792 | if (!dev_priv->child_dev_num) | 806 | if (!dev_priv->child_dev_num) |
793 | return 1; | 807 | return true; |
794 | 808 | ||
795 | ret = 0; | ||
796 | for (i = 0; i < dev_priv->child_dev_num; i++) { | 809 | for (i = 0; i < dev_priv->child_dev_num; i++) { |
797 | p_child = dev_priv->child_dev + i; | 810 | struct child_device_config *child = dev_priv->child_dev + i; |
798 | /* | 811 | |
799 | * If the device type is not LFP, continue. | 812 | /* If the device type is not LFP, continue. |
800 | * If the device type is 0x22, it is also regarded as LFP. | 813 | * We have to check both the new identifiers as well as the |
814 | * old for compatibility with some BIOSes. | ||
801 | */ | 815 | */ |
802 | if (p_child->device_type != DEVICE_TYPE_INT_LFP && | 816 | if (child->device_type != DEVICE_TYPE_INT_LFP && |
803 | p_child->device_type != DEVICE_TYPE_LFP) | 817 | child->device_type != DEVICE_TYPE_LFP) |
804 | continue; | 818 | continue; |
805 | 819 | ||
806 | /* The addin_offset should be checked. Only when it is | 820 | if (child->i2c_pin) |
807 | * non-zero, it is regarded as present. | 821 | *i2c_pin = child->i2c_pin; |
822 | |||
823 | /* However, we cannot trust the BIOS writers to populate | ||
824 | * the VBT correctly. Since LVDS requires additional | ||
825 | * information from AIM blocks, a non-zero addin offset is | ||
826 | * a good indicator that the LVDS is actually present. | ||
808 | */ | 827 | */ |
809 | if (p_child->addin_offset) { | 828 | if (child->addin_offset) |
810 | ret = 1; | 829 | return true; |
811 | break; | 830 | |
812 | } | 831 | /* But even then some BIOS writers perform some black magic |
832 | * and instantiate the device without reference to any | ||
833 | * additional data. Trust that if the VBT was written into | ||
834 | * the OpRegion then they have validated the LVDS's existence. | ||
835 | */ | ||
836 | if (dev_priv->opregion.vbt) | ||
837 | return true; | ||
813 | } | 838 | } |
814 | return ret; | 839 | |
840 | return false; | ||
815 | } | 841 | } |
816 | 842 | ||
817 | /** | 843 | /** |
@@ -821,7 +847,7 @@ static int lvds_is_present_in_vbt(struct drm_device *dev) | |||
821 | * Create the connector, register the LVDS DDC bus, and try to figure out what | 847 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
822 | * modes we can display on the LVDS panel (if present). | 848 | * modes we can display on the LVDS panel (if present). |
823 | */ | 849 | */ |
824 | void intel_lvds_init(struct drm_device *dev) | 850 | bool intel_lvds_init(struct drm_device *dev) |
825 | { | 851 | { |
826 | struct drm_i915_private *dev_priv = dev->dev_private; | 852 | struct drm_i915_private *dev_priv = dev->dev_private; |
827 | struct intel_lvds *intel_lvds; | 853 | struct intel_lvds *intel_lvds; |
@@ -832,52 +858,59 @@ void intel_lvds_init(struct drm_device *dev) | |||
832 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ | 858 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
833 | struct drm_crtc *crtc; | 859 | struct drm_crtc *crtc; |
834 | u32 lvds; | 860 | u32 lvds; |
835 | int pipe, gpio = GPIOC; | 861 | int pipe; |
862 | u8 pin; | ||
836 | 863 | ||
837 | /* Skip init on machines we know falsely report LVDS */ | 864 | /* Skip init on machines we know falsely report LVDS */ |
838 | if (dmi_check_system(intel_no_lvds)) | 865 | if (dmi_check_system(intel_no_lvds)) |
839 | return; | 866 | return false; |
840 | 867 | ||
841 | if (!lvds_is_present_in_vbt(dev)) { | 868 | pin = GMBUS_PORT_PANEL; |
869 | if (!lvds_is_present_in_vbt(dev, &pin)) { | ||
842 | DRM_DEBUG_KMS("LVDS is not present in VBT\n"); | 870 | DRM_DEBUG_KMS("LVDS is not present in VBT\n"); |
843 | return; | 871 | return false; |
844 | } | 872 | } |
845 | 873 | ||
846 | if (HAS_PCH_SPLIT(dev)) { | 874 | if (HAS_PCH_SPLIT(dev)) { |
847 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) | 875 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) |
848 | return; | 876 | return false; |
849 | if (dev_priv->edp_support) { | 877 | if (dev_priv->edp.support) { |
850 | DRM_DEBUG_KMS("disable LVDS for eDP support\n"); | 878 | DRM_DEBUG_KMS("disable LVDS for eDP support\n"); |
851 | return; | 879 | return false; |
852 | } | 880 | } |
853 | gpio = PCH_GPIOC; | ||
854 | } | 881 | } |
855 | 882 | ||
856 | intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL); | 883 | intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL); |
857 | if (!intel_lvds) { | 884 | if (!intel_lvds) { |
858 | return; | 885 | return false; |
859 | } | 886 | } |
860 | 887 | ||
861 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); | 888 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
862 | if (!intel_connector) { | 889 | if (!intel_connector) { |
863 | kfree(intel_lvds); | 890 | kfree(intel_lvds); |
864 | return; | 891 | return false; |
892 | } | ||
893 | |||
894 | if (!HAS_PCH_SPLIT(dev)) { | ||
895 | intel_lvds->pfit_control = I915_READ(PFIT_CONTROL); | ||
865 | } | 896 | } |
866 | 897 | ||
867 | intel_encoder = &intel_lvds->base; | 898 | intel_encoder = &intel_lvds->base; |
868 | encoder = &intel_encoder->enc; | 899 | encoder = &intel_encoder->base; |
869 | connector = &intel_connector->base; | 900 | connector = &intel_connector->base; |
870 | drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, | 901 | drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, |
871 | DRM_MODE_CONNECTOR_LVDS); | 902 | DRM_MODE_CONNECTOR_LVDS); |
872 | 903 | ||
873 | drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs, | 904 | drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, |
874 | DRM_MODE_ENCODER_LVDS); | 905 | DRM_MODE_ENCODER_LVDS); |
875 | 906 | ||
876 | drm_mode_connector_attach_encoder(&intel_connector->base, &intel_encoder->enc); | 907 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
877 | intel_encoder->type = INTEL_OUTPUT_LVDS; | 908 | intel_encoder->type = INTEL_OUTPUT_LVDS; |
878 | 909 | ||
879 | intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); | 910 | intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); |
880 | intel_encoder->crtc_mask = (1 << 1); | 911 | intel_encoder->crtc_mask = (1 << 1); |
912 | if (INTEL_INFO(dev)->gen >= 5) | ||
913 | intel_encoder->crtc_mask |= (1 << 0); | ||
881 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); | 914 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
882 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); | 915 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
883 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; | 916 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
@@ -904,43 +937,50 @@ void intel_lvds_init(struct drm_device *dev) | |||
904 | * if closed, act like it's not there for now | 937 | * if closed, act like it's not there for now |
905 | */ | 938 | */ |
906 | 939 | ||
907 | /* Set up the DDC bus. */ | ||
908 | intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C"); | ||
909 | if (!intel_encoder->ddc_bus) { | ||
910 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " | ||
911 | "failed.\n"); | ||
912 | goto failed; | ||
913 | } | ||
914 | |||
915 | /* | 940 | /* |
916 | * Attempt to get the fixed panel mode from DDC. Assume that the | 941 | * Attempt to get the fixed panel mode from DDC. Assume that the |
917 | * preferred mode is the right one. | 942 | * preferred mode is the right one. |
918 | */ | 943 | */ |
919 | dev_priv->lvds_edid_good = true; | 944 | intel_lvds->edid = drm_get_edid(connector, |
920 | 945 | &dev_priv->gmbus[pin].adapter); | |
921 | if (!intel_ddc_get_modes(connector, intel_encoder->ddc_bus)) | 946 | if (intel_lvds->edid) { |
922 | dev_priv->lvds_edid_good = false; | 947 | if (drm_add_edid_modes(connector, |
948 | intel_lvds->edid)) { | ||
949 | drm_mode_connector_update_edid_property(connector, | ||
950 | intel_lvds->edid); | ||
951 | } else { | ||
952 | kfree(intel_lvds->edid); | ||
953 | intel_lvds->edid = NULL; | ||
954 | } | ||
955 | } | ||
956 | if (!intel_lvds->edid) { | ||
957 | /* Didn't get an EDID, so | ||
958 | * Set wide sync ranges so we get all modes | ||
959 | * handed to valid_mode for checking | ||
960 | */ | ||
961 | connector->display_info.min_vfreq = 0; | ||
962 | connector->display_info.max_vfreq = 200; | ||
963 | connector->display_info.min_hfreq = 0; | ||
964 | connector->display_info.max_hfreq = 200; | ||
965 | } | ||
923 | 966 | ||
924 | list_for_each_entry(scan, &connector->probed_modes, head) { | 967 | list_for_each_entry(scan, &connector->probed_modes, head) { |
925 | mutex_lock(&dev->mode_config.mutex); | ||
926 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { | 968 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
927 | dev_priv->panel_fixed_mode = | 969 | intel_lvds->fixed_mode = |
928 | drm_mode_duplicate(dev, scan); | 970 | drm_mode_duplicate(dev, scan); |
929 | mutex_unlock(&dev->mode_config.mutex); | 971 | intel_find_lvds_downclock(dev, |
930 | intel_find_lvds_downclock(dev, connector); | 972 | intel_lvds->fixed_mode, |
973 | connector); | ||
931 | goto out; | 974 | goto out; |
932 | } | 975 | } |
933 | mutex_unlock(&dev->mode_config.mutex); | ||
934 | } | 976 | } |
935 | 977 | ||
936 | /* Failed to get EDID, what about VBT? */ | 978 | /* Failed to get EDID, what about VBT? */ |
937 | if (dev_priv->lfp_lvds_vbt_mode) { | 979 | if (dev_priv->lfp_lvds_vbt_mode) { |
938 | mutex_lock(&dev->mode_config.mutex); | 980 | intel_lvds->fixed_mode = |
939 | dev_priv->panel_fixed_mode = | ||
940 | drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); | 981 | drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); |
941 | mutex_unlock(&dev->mode_config.mutex); | 982 | if (intel_lvds->fixed_mode) { |
942 | if (dev_priv->panel_fixed_mode) { | 983 | intel_lvds->fixed_mode->type |= |
943 | dev_priv->panel_fixed_mode->type |= | ||
944 | DRM_MODE_TYPE_PREFERRED; | 984 | DRM_MODE_TYPE_PREFERRED; |
945 | goto out; | 985 | goto out; |
946 | } | 986 | } |
@@ -958,28 +998,36 @@ void intel_lvds_init(struct drm_device *dev) | |||
958 | 998 | ||
959 | lvds = I915_READ(LVDS); | 999 | lvds = I915_READ(LVDS); |
960 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; | 1000 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
961 | crtc = intel_get_crtc_from_pipe(dev, pipe); | 1001 | crtc = intel_get_crtc_for_pipe(dev, pipe); |
962 | 1002 | ||
963 | if (crtc && (lvds & LVDS_PORT_EN)) { | 1003 | if (crtc && (lvds & LVDS_PORT_EN)) { |
964 | dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc); | 1004 | intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc); |
965 | if (dev_priv->panel_fixed_mode) { | 1005 | if (intel_lvds->fixed_mode) { |
966 | dev_priv->panel_fixed_mode->type |= | 1006 | intel_lvds->fixed_mode->type |= |
967 | DRM_MODE_TYPE_PREFERRED; | 1007 | DRM_MODE_TYPE_PREFERRED; |
968 | goto out; | 1008 | goto out; |
969 | } | 1009 | } |
970 | } | 1010 | } |
971 | 1011 | ||
972 | /* If we still don't have a mode after all that, give up. */ | 1012 | /* If we still don't have a mode after all that, give up. */ |
973 | if (!dev_priv->panel_fixed_mode) | 1013 | if (!intel_lvds->fixed_mode) |
974 | goto failed; | 1014 | goto failed; |
975 | 1015 | ||
976 | out: | 1016 | out: |
977 | if (HAS_PCH_SPLIT(dev)) { | 1017 | if (HAS_PCH_SPLIT(dev)) { |
978 | u32 pwm; | 1018 | u32 pwm; |
979 | /* make sure PWM is enabled */ | 1019 | |
1020 | pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0; | ||
1021 | |||
1022 | /* make sure PWM is enabled and locked to the LVDS pipe */ | ||
980 | pwm = I915_READ(BLC_PWM_CPU_CTL2); | 1023 | pwm = I915_READ(BLC_PWM_CPU_CTL2); |
981 | pwm |= (PWM_ENABLE | PWM_PIPE_B); | 1024 | if (pipe == 0 && (pwm & PWM_PIPE_B)) |
982 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm); | 1025 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE); |
1026 | if (pipe) | ||
1027 | pwm |= PWM_PIPE_B; | ||
1028 | else | ||
1029 | pwm &= ~PWM_PIPE_B; | ||
1030 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE); | ||
983 | 1031 | ||
984 | pwm = I915_READ(BLC_PWM_PCH_CTL1); | 1032 | pwm = I915_READ(BLC_PWM_PCH_CTL1); |
985 | pwm |= PWM_PCH_ENABLE; | 1033 | pwm |= PWM_PCH_ENABLE; |
@@ -993,14 +1041,13 @@ out: | |||
993 | /* keep the LVDS connector */ | 1041 | /* keep the LVDS connector */ |
994 | dev_priv->int_lvds_connector = connector; | 1042 | dev_priv->int_lvds_connector = connector; |
995 | drm_sysfs_connector_add(connector); | 1043 | drm_sysfs_connector_add(connector); |
996 | return; | 1044 | return true; |
997 | 1045 | ||
998 | failed: | 1046 | failed: |
999 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); | 1047 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
1000 | if (intel_encoder->ddc_bus) | ||
1001 | intel_i2c_destroy(intel_encoder->ddc_bus); | ||
1002 | drm_connector_cleanup(connector); | 1048 | drm_connector_cleanup(connector); |
1003 | drm_encoder_cleanup(encoder); | 1049 | drm_encoder_cleanup(encoder); |
1004 | kfree(intel_lvds); | 1050 | kfree(intel_lvds); |
1005 | kfree(intel_connector); | 1051 | kfree(intel_connector); |
1052 | return false; | ||
1006 | } | 1053 | } |