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path: root/drivers/gpu/drm/i915/intel_lrc.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_lrc.c')
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c187
1 files changed, 82 insertions, 105 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index e405b61cdac5..a94346fee160 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -283,7 +283,6 @@ static void execlists_elsp_write(struct intel_engine_cs *ring,
283 struct drm_i915_private *dev_priv = dev->dev_private; 283 struct drm_i915_private *dev_priv = dev->dev_private;
284 uint64_t temp = 0; 284 uint64_t temp = 0;
285 uint32_t desc[4]; 285 uint32_t desc[4];
286 unsigned long flags;
287 286
288 /* XXX: You must always write both descriptors in the order below. */ 287 /* XXX: You must always write both descriptors in the order below. */
289 if (ctx_obj1) 288 if (ctx_obj1)
@@ -297,63 +296,17 @@ static void execlists_elsp_write(struct intel_engine_cs *ring,
297 desc[3] = (u32)(temp >> 32); 296 desc[3] = (u32)(temp >> 32);
298 desc[2] = (u32)temp; 297 desc[2] = (u32)temp;
299 298
300 /* Set Force Wakeup bit to prevent GT from entering C6 while ELSP writes 299 intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
301 * are in progress.
302 *
303 * The other problem is that we can't just call gen6_gt_force_wake_get()
304 * because that function calls intel_runtime_pm_get(), which might sleep.
305 * Instead, we do the runtime_pm_get/put when creating/destroying requests.
306 */
307 spin_lock_irqsave(&dev_priv->uncore.lock, flags);
308 if (IS_CHERRYVIEW(dev) || INTEL_INFO(dev)->gen >= 9) {
309 if (dev_priv->uncore.fw_rendercount++ == 0)
310 dev_priv->uncore.funcs.force_wake_get(dev_priv,
311 FORCEWAKE_RENDER);
312 if (dev_priv->uncore.fw_mediacount++ == 0)
313 dev_priv->uncore.funcs.force_wake_get(dev_priv,
314 FORCEWAKE_MEDIA);
315 if (INTEL_INFO(dev)->gen >= 9) {
316 if (dev_priv->uncore.fw_blittercount++ == 0)
317 dev_priv->uncore.funcs.force_wake_get(dev_priv,
318 FORCEWAKE_BLITTER);
319 }
320 } else {
321 if (dev_priv->uncore.forcewake_count++ == 0)
322 dev_priv->uncore.funcs.force_wake_get(dev_priv,
323 FORCEWAKE_ALL);
324 }
325 spin_unlock_irqrestore(&dev_priv->uncore.lock, flags);
326
327 I915_WRITE(RING_ELSP(ring), desc[1]); 300 I915_WRITE(RING_ELSP(ring), desc[1]);
328 I915_WRITE(RING_ELSP(ring), desc[0]); 301 I915_WRITE(RING_ELSP(ring), desc[0]);
329 I915_WRITE(RING_ELSP(ring), desc[3]); 302 I915_WRITE(RING_ELSP(ring), desc[3]);
303
330 /* The context is automatically loaded after the following */ 304 /* The context is automatically loaded after the following */
331 I915_WRITE(RING_ELSP(ring), desc[2]); 305 I915_WRITE(RING_ELSP(ring), desc[2]);
332 306
333 /* ELSP is a wo register, so use another nearby reg for posting instead */ 307 /* ELSP is a wo register, so use another nearby reg for posting instead */
334 POSTING_READ(RING_EXECLIST_STATUS(ring)); 308 POSTING_READ(RING_EXECLIST_STATUS(ring));
335 309 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
336 /* Release Force Wakeup (see the big comment above). */
337 spin_lock_irqsave(&dev_priv->uncore.lock, flags);
338 if (IS_CHERRYVIEW(dev) || INTEL_INFO(dev)->gen >= 9) {
339 if (--dev_priv->uncore.fw_rendercount == 0)
340 dev_priv->uncore.funcs.force_wake_put(dev_priv,
341 FORCEWAKE_RENDER);
342 if (--dev_priv->uncore.fw_mediacount == 0)
343 dev_priv->uncore.funcs.force_wake_put(dev_priv,
344 FORCEWAKE_MEDIA);
345 if (INTEL_INFO(dev)->gen >= 9) {
346 if (--dev_priv->uncore.fw_blittercount == 0)
347 dev_priv->uncore.funcs.force_wake_put(dev_priv,
348 FORCEWAKE_BLITTER);
349 }
350 } else {
351 if (--dev_priv->uncore.forcewake_count == 0)
352 dev_priv->uncore.funcs.force_wake_put(dev_priv,
353 FORCEWAKE_ALL);
354 }
355
356 spin_unlock_irqrestore(&dev_priv->uncore.lock, flags);
357} 310}
358 311
359static int execlists_update_context(struct drm_i915_gem_object *ctx_obj, 312static int execlists_update_context(struct drm_i915_gem_object *ctx_obj,
@@ -404,8 +357,8 @@ static void execlists_submit_contexts(struct intel_engine_cs *ring,
404 357
405static void execlists_context_unqueue(struct intel_engine_cs *ring) 358static void execlists_context_unqueue(struct intel_engine_cs *ring)
406{ 359{
407 struct intel_ctx_submit_request *req0 = NULL, *req1 = NULL; 360 struct drm_i915_gem_request *req0 = NULL, *req1 = NULL;
408 struct intel_ctx_submit_request *cursor = NULL, *tmp = NULL; 361 struct drm_i915_gem_request *cursor = NULL, *tmp = NULL;
409 362
410 assert_spin_locked(&ring->execlist_lock); 363 assert_spin_locked(&ring->execlist_lock);
411 364
@@ -445,12 +398,12 @@ static void execlists_context_unqueue(struct intel_engine_cs *ring)
445static bool execlists_check_remove_request(struct intel_engine_cs *ring, 398static bool execlists_check_remove_request(struct intel_engine_cs *ring,
446 u32 request_id) 399 u32 request_id)
447{ 400{
448 struct intel_ctx_submit_request *head_req; 401 struct drm_i915_gem_request *head_req;
449 402
450 assert_spin_locked(&ring->execlist_lock); 403 assert_spin_locked(&ring->execlist_lock);
451 404
452 head_req = list_first_entry_or_null(&ring->execlist_queue, 405 head_req = list_first_entry_or_null(&ring->execlist_queue,
453 struct intel_ctx_submit_request, 406 struct drm_i915_gem_request,
454 execlist_link); 407 execlist_link);
455 408
456 if (head_req != NULL) { 409 if (head_req != NULL) {
@@ -534,24 +487,34 @@ void intel_lrc_irq_handler(struct intel_engine_cs *ring)
534 487
535static int execlists_context_queue(struct intel_engine_cs *ring, 488static int execlists_context_queue(struct intel_engine_cs *ring,
536 struct intel_context *to, 489 struct intel_context *to,
537 u32 tail) 490 u32 tail,
491 struct drm_i915_gem_request *request)
538{ 492{
539 struct intel_ctx_submit_request *req = NULL, *cursor; 493 struct drm_i915_gem_request *cursor;
540 struct drm_i915_private *dev_priv = ring->dev->dev_private; 494 struct drm_i915_private *dev_priv = ring->dev->dev_private;
541 unsigned long flags; 495 unsigned long flags;
542 int num_elements = 0; 496 int num_elements = 0;
543 497
544 req = kzalloc(sizeof(*req), GFP_KERNEL);
545 if (req == NULL)
546 return -ENOMEM;
547 req->ctx = to;
548 i915_gem_context_reference(req->ctx);
549
550 if (to != ring->default_context) 498 if (to != ring->default_context)
551 intel_lr_context_pin(ring, to); 499 intel_lr_context_pin(ring, to);
552 500
553 req->ring = ring; 501 if (!request) {
554 req->tail = tail; 502 /*
503 * If there isn't a request associated with this submission,
504 * create one as a temporary holder.
505 */
506 WARN(1, "execlist context submission without request");
507 request = kzalloc(sizeof(*request), GFP_KERNEL);
508 if (request == NULL)
509 return -ENOMEM;
510 request->ring = ring;
511 request->ctx = to;
512 } else {
513 WARN_ON(to != request->ctx);
514 }
515 request->tail = tail;
516 i915_gem_request_reference(request);
517 i915_gem_context_reference(request->ctx);
555 518
556 intel_runtime_pm_get(dev_priv); 519 intel_runtime_pm_get(dev_priv);
557 520
@@ -562,10 +525,10 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
562 break; 525 break;
563 526
564 if (num_elements > 2) { 527 if (num_elements > 2) {
565 struct intel_ctx_submit_request *tail_req; 528 struct drm_i915_gem_request *tail_req;
566 529
567 tail_req = list_last_entry(&ring->execlist_queue, 530 tail_req = list_last_entry(&ring->execlist_queue,
568 struct intel_ctx_submit_request, 531 struct drm_i915_gem_request,
569 execlist_link); 532 execlist_link);
570 533
571 if (to == tail_req->ctx) { 534 if (to == tail_req->ctx) {
@@ -577,7 +540,7 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
577 } 540 }
578 } 541 }
579 542
580 list_add_tail(&req->execlist_link, &ring->execlist_queue); 543 list_add_tail(&request->execlist_link, &ring->execlist_queue);
581 if (num_elements == 0) 544 if (num_elements == 0)
582 execlists_context_unqueue(ring); 545 execlists_context_unqueue(ring);
583 546
@@ -586,7 +549,8 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
586 return 0; 549 return 0;
587} 550}
588 551
589static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf) 552static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf,
553 struct intel_context *ctx)
590{ 554{
591 struct intel_engine_cs *ring = ringbuf->ring; 555 struct intel_engine_cs *ring = ringbuf->ring;
592 uint32_t flush_domains; 556 uint32_t flush_domains;
@@ -596,7 +560,8 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf)
596 if (ring->gpu_caches_dirty) 560 if (ring->gpu_caches_dirty)
597 flush_domains = I915_GEM_GPU_DOMAINS; 561 flush_domains = I915_GEM_GPU_DOMAINS;
598 562
599 ret = ring->emit_flush(ringbuf, I915_GEM_GPU_DOMAINS, flush_domains); 563 ret = ring->emit_flush(ringbuf, ctx,
564 I915_GEM_GPU_DOMAINS, flush_domains);
600 if (ret) 565 if (ret)
601 return ret; 566 return ret;
602 567
@@ -605,6 +570,7 @@ static int logical_ring_invalidate_all_caches(struct intel_ringbuffer *ringbuf)
605} 570}
606 571
607static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf, 572static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
573 struct intel_context *ctx,
608 struct list_head *vmas) 574 struct list_head *vmas)
609{ 575{
610 struct intel_engine_cs *ring = ringbuf->ring; 576 struct intel_engine_cs *ring = ringbuf->ring;
@@ -632,7 +598,7 @@ static int execlists_move_to_gpu(struct intel_ringbuffer *ringbuf,
632 /* Unconditionally invalidate gpu caches and ensure that we do flush 598 /* Unconditionally invalidate gpu caches and ensure that we do flush
633 * any residual writes from the previous batch. 599 * any residual writes from the previous batch.
634 */ 600 */
635 return logical_ring_invalidate_all_caches(ringbuf); 601 return logical_ring_invalidate_all_caches(ringbuf, ctx);
636} 602}
637 603
638/** 604/**
@@ -712,13 +678,13 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
712 return -EINVAL; 678 return -EINVAL;
713 } 679 }
714 680
715 ret = execlists_move_to_gpu(ringbuf, vmas); 681 ret = execlists_move_to_gpu(ringbuf, ctx, vmas);
716 if (ret) 682 if (ret)
717 return ret; 683 return ret;
718 684
719 if (ring == &dev_priv->ring[RCS] && 685 if (ring == &dev_priv->ring[RCS] &&
720 instp_mode != dev_priv->relative_constants_mode) { 686 instp_mode != dev_priv->relative_constants_mode) {
721 ret = intel_logical_ring_begin(ringbuf, 4); 687 ret = intel_logical_ring_begin(ringbuf, ctx, 4);
722 if (ret) 688 if (ret)
723 return ret; 689 return ret;
724 690
@@ -731,7 +697,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
731 dev_priv->relative_constants_mode = instp_mode; 697 dev_priv->relative_constants_mode = instp_mode;
732 } 698 }
733 699
734 ret = ring->emit_bb_start(ringbuf, exec_start, flags); 700 ret = ring->emit_bb_start(ringbuf, ctx, exec_start, flags);
735 if (ret) 701 if (ret)
736 return ret; 702 return ret;
737 703
@@ -743,7 +709,7 @@ int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
743 709
744void intel_execlists_retire_requests(struct intel_engine_cs *ring) 710void intel_execlists_retire_requests(struct intel_engine_cs *ring)
745{ 711{
746 struct intel_ctx_submit_request *req, *tmp; 712 struct drm_i915_gem_request *req, *tmp;
747 struct drm_i915_private *dev_priv = ring->dev->dev_private; 713 struct drm_i915_private *dev_priv = ring->dev->dev_private;
748 unsigned long flags; 714 unsigned long flags;
749 struct list_head retired_list; 715 struct list_head retired_list;
@@ -765,9 +731,9 @@ void intel_execlists_retire_requests(struct intel_engine_cs *ring)
765 if (ctx_obj && (ctx != ring->default_context)) 731 if (ctx_obj && (ctx != ring->default_context))
766 intel_lr_context_unpin(ring, ctx); 732 intel_lr_context_unpin(ring, ctx);
767 intel_runtime_pm_put(dev_priv); 733 intel_runtime_pm_put(dev_priv);
768 i915_gem_context_unreference(req->ctx); 734 i915_gem_context_unreference(ctx);
769 list_del(&req->execlist_link); 735 list_del(&req->execlist_link);
770 kfree(req); 736 i915_gem_request_unreference(req);
771 } 737 }
772} 738}
773 739
@@ -793,7 +759,8 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring)
793 I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING)); 759 I915_WRITE_MODE(ring, _MASKED_BIT_DISABLE(STOP_RING));
794} 760}
795 761
796int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf) 762int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf,
763 struct intel_context *ctx)
797{ 764{
798 struct intel_engine_cs *ring = ringbuf->ring; 765 struct intel_engine_cs *ring = ringbuf->ring;
799 int ret; 766 int ret;
@@ -801,7 +768,7 @@ int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf)
801 if (!ring->gpu_caches_dirty) 768 if (!ring->gpu_caches_dirty)
802 return 0; 769 return 0;
803 770
804 ret = ring->emit_flush(ringbuf, 0, I915_GEM_GPU_DOMAINS); 771 ret = ring->emit_flush(ringbuf, ctx, 0, I915_GEM_GPU_DOMAINS);
805 if (ret) 772 if (ret)
806 return ret; 773 return ret;
807 774
@@ -818,17 +785,18 @@ int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf)
818 * on a queue waiting for the ELSP to be ready to accept a new context submission. At that 785 * on a queue waiting for the ELSP to be ready to accept a new context submission. At that
819 * point, the tail *inside* the context is updated and the ELSP written to. 786 * point, the tail *inside* the context is updated and the ELSP written to.
820 */ 787 */
821void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf) 788void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf,
789 struct intel_context *ctx,
790 struct drm_i915_gem_request *request)
822{ 791{
823 struct intel_engine_cs *ring = ringbuf->ring; 792 struct intel_engine_cs *ring = ringbuf->ring;
824 struct intel_context *ctx = ringbuf->FIXME_lrc_ctx;
825 793
826 intel_logical_ring_advance(ringbuf); 794 intel_logical_ring_advance(ringbuf);
827 795
828 if (intel_ring_stopped(ring)) 796 if (intel_ring_stopped(ring))
829 return; 797 return;
830 798
831 execlists_context_queue(ring, ctx, ringbuf->tail); 799 execlists_context_queue(ring, ctx, ringbuf->tail, request);
832} 800}
833 801
834static int intel_lr_context_pin(struct intel_engine_cs *ring, 802static int intel_lr_context_pin(struct intel_engine_cs *ring,
@@ -839,11 +807,11 @@ static int intel_lr_context_pin(struct intel_engine_cs *ring,
839 int ret = 0; 807 int ret = 0;
840 808
841 WARN_ON(!mutex_is_locked(&ring->dev->struct_mutex)); 809 WARN_ON(!mutex_is_locked(&ring->dev->struct_mutex));
842 if (ctx->engine[ring->id].unpin_count++ == 0) { 810 if (ctx->engine[ring->id].pin_count++ == 0) {
843 ret = i915_gem_obj_ggtt_pin(ctx_obj, 811 ret = i915_gem_obj_ggtt_pin(ctx_obj,
844 GEN8_LR_CONTEXT_ALIGN, 0); 812 GEN8_LR_CONTEXT_ALIGN, 0);
845 if (ret) 813 if (ret)
846 goto reset_unpin_count; 814 goto reset_pin_count;
847 815
848 ret = intel_pin_and_map_ringbuffer_obj(ring->dev, ringbuf); 816 ret = intel_pin_and_map_ringbuffer_obj(ring->dev, ringbuf);
849 if (ret) 817 if (ret)
@@ -854,8 +822,8 @@ static int intel_lr_context_pin(struct intel_engine_cs *ring,
854 822
855unpin_ctx_obj: 823unpin_ctx_obj:
856 i915_gem_object_ggtt_unpin(ctx_obj); 824 i915_gem_object_ggtt_unpin(ctx_obj);
857reset_unpin_count: 825reset_pin_count:
858 ctx->engine[ring->id].unpin_count = 0; 826 ctx->engine[ring->id].pin_count = 0;
859 827
860 return ret; 828 return ret;
861} 829}
@@ -868,7 +836,7 @@ void intel_lr_context_unpin(struct intel_engine_cs *ring,
868 836
869 if (ctx_obj) { 837 if (ctx_obj) {
870 WARN_ON(!mutex_is_locked(&ring->dev->struct_mutex)); 838 WARN_ON(!mutex_is_locked(&ring->dev->struct_mutex));
871 if (--ctx->engine[ring->id].unpin_count == 0) { 839 if (--ctx->engine[ring->id].pin_count == 0) {
872 intel_unpin_ringbuffer_obj(ringbuf); 840 intel_unpin_ringbuffer_obj(ringbuf);
873 i915_gem_object_ggtt_unpin(ctx_obj); 841 i915_gem_object_ggtt_unpin(ctx_obj);
874 } 842 }
@@ -959,6 +927,7 @@ static int logical_ring_wait_request(struct intel_ringbuffer *ringbuf,
959} 927}
960 928
961static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf, 929static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
930 struct intel_context *ctx,
962 int bytes) 931 int bytes)
963{ 932{
964 struct intel_engine_cs *ring = ringbuf->ring; 933 struct intel_engine_cs *ring = ringbuf->ring;
@@ -972,7 +941,7 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
972 return ret; 941 return ret;
973 942
974 /* Force the context submission in case we have been skipping it */ 943 /* Force the context submission in case we have been skipping it */
975 intel_logical_ring_advance_and_submit(ringbuf); 944 intel_logical_ring_advance_and_submit(ringbuf, ctx, NULL);
976 945
977 /* With GEM the hangcheck timer should kick us out of the loop, 946 /* With GEM the hangcheck timer should kick us out of the loop,
978 * leaving it early runs the risk of corrupting GEM state (due 947 * leaving it early runs the risk of corrupting GEM state (due
@@ -1007,13 +976,14 @@ static int logical_ring_wait_for_space(struct intel_ringbuffer *ringbuf,
1007 return ret; 976 return ret;
1008} 977}
1009 978
1010static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf) 979static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf,
980 struct intel_context *ctx)
1011{ 981{
1012 uint32_t __iomem *virt; 982 uint32_t __iomem *virt;
1013 int rem = ringbuf->size - ringbuf->tail; 983 int rem = ringbuf->size - ringbuf->tail;
1014 984
1015 if (ringbuf->space < rem) { 985 if (ringbuf->space < rem) {
1016 int ret = logical_ring_wait_for_space(ringbuf, rem); 986 int ret = logical_ring_wait_for_space(ringbuf, ctx, rem);
1017 987
1018 if (ret) 988 if (ret)
1019 return ret; 989 return ret;
@@ -1030,18 +1000,19 @@ static int logical_ring_wrap_buffer(struct intel_ringbuffer *ringbuf)
1030 return 0; 1000 return 0;
1031} 1001}
1032 1002
1033static int logical_ring_prepare(struct intel_ringbuffer *ringbuf, int bytes) 1003static int logical_ring_prepare(struct intel_ringbuffer *ringbuf,
1004 struct intel_context *ctx, int bytes)
1034{ 1005{
1035 int ret; 1006 int ret;
1036 1007
1037 if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) { 1008 if (unlikely(ringbuf->tail + bytes > ringbuf->effective_size)) {
1038 ret = logical_ring_wrap_buffer(ringbuf); 1009 ret = logical_ring_wrap_buffer(ringbuf, ctx);
1039 if (unlikely(ret)) 1010 if (unlikely(ret))
1040 return ret; 1011 return ret;
1041 } 1012 }
1042 1013
1043 if (unlikely(ringbuf->space < bytes)) { 1014 if (unlikely(ringbuf->space < bytes)) {
1044 ret = logical_ring_wait_for_space(ringbuf, bytes); 1015 ret = logical_ring_wait_for_space(ringbuf, ctx, bytes);
1045 if (unlikely(ret)) 1016 if (unlikely(ret))
1046 return ret; 1017 return ret;
1047 } 1018 }
@@ -1062,7 +1033,8 @@ static int logical_ring_prepare(struct intel_ringbuffer *ringbuf, int bytes)
1062 * 1033 *
1063 * Return: non-zero if the ringbuffer is not ready to be written to. 1034 * Return: non-zero if the ringbuffer is not ready to be written to.
1064 */ 1035 */
1065int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords) 1036int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf,
1037 struct intel_context *ctx, int num_dwords)
1066{ 1038{
1067 struct intel_engine_cs *ring = ringbuf->ring; 1039 struct intel_engine_cs *ring = ringbuf->ring;
1068 struct drm_device *dev = ring->dev; 1040 struct drm_device *dev = ring->dev;
@@ -1074,12 +1046,12 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords)
1074 if (ret) 1046 if (ret)
1075 return ret; 1047 return ret;
1076 1048
1077 ret = logical_ring_prepare(ringbuf, num_dwords * sizeof(uint32_t)); 1049 ret = logical_ring_prepare(ringbuf, ctx, num_dwords * sizeof(uint32_t));
1078 if (ret) 1050 if (ret)
1079 return ret; 1051 return ret;
1080 1052
1081 /* Preallocate the olr before touching the ring */ 1053 /* Preallocate the olr before touching the ring */
1082 ret = logical_ring_alloc_request(ring, ringbuf->FIXME_lrc_ctx); 1054 ret = logical_ring_alloc_request(ring, ctx);
1083 if (ret) 1055 if (ret)
1084 return ret; 1056 return ret;
1085 1057
@@ -1100,11 +1072,11 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
1100 return 0; 1072 return 0;
1101 1073
1102 ring->gpu_caches_dirty = true; 1074 ring->gpu_caches_dirty = true;
1103 ret = logical_ring_flush_all_caches(ringbuf); 1075 ret = logical_ring_flush_all_caches(ringbuf, ctx);
1104 if (ret) 1076 if (ret)
1105 return ret; 1077 return ret;
1106 1078
1107 ret = intel_logical_ring_begin(ringbuf, w->count * 2 + 2); 1079 ret = intel_logical_ring_begin(ringbuf, ctx, w->count * 2 + 2);
1108 if (ret) 1080 if (ret)
1109 return ret; 1081 return ret;
1110 1082
@@ -1118,7 +1090,7 @@ static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
1118 intel_logical_ring_advance(ringbuf); 1090 intel_logical_ring_advance(ringbuf);
1119 1091
1120 ring->gpu_caches_dirty = true; 1092 ring->gpu_caches_dirty = true;
1121 ret = logical_ring_flush_all_caches(ringbuf); 1093 ret = logical_ring_flush_all_caches(ringbuf, ctx);
1122 if (ret) 1094 if (ret)
1123 return ret; 1095 return ret;
1124 1096
@@ -1169,12 +1141,13 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
1169} 1141}
1170 1142
1171static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf, 1143static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
1144 struct intel_context *ctx,
1172 u64 offset, unsigned flags) 1145 u64 offset, unsigned flags)
1173{ 1146{
1174 bool ppgtt = !(flags & I915_DISPATCH_SECURE); 1147 bool ppgtt = !(flags & I915_DISPATCH_SECURE);
1175 int ret; 1148 int ret;
1176 1149
1177 ret = intel_logical_ring_begin(ringbuf, 4); 1150 ret = intel_logical_ring_begin(ringbuf, ctx, 4);
1178 if (ret) 1151 if (ret)
1179 return ret; 1152 return ret;
1180 1153
@@ -1222,6 +1195,7 @@ static void gen8_logical_ring_put_irq(struct intel_engine_cs *ring)
1222} 1195}
1223 1196
1224static int gen8_emit_flush(struct intel_ringbuffer *ringbuf, 1197static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
1198 struct intel_context *ctx,
1225 u32 invalidate_domains, 1199 u32 invalidate_domains,
1226 u32 unused) 1200 u32 unused)
1227{ 1201{
@@ -1231,7 +1205,7 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
1231 uint32_t cmd; 1205 uint32_t cmd;
1232 int ret; 1206 int ret;
1233 1207
1234 ret = intel_logical_ring_begin(ringbuf, 4); 1208 ret = intel_logical_ring_begin(ringbuf, ctx, 4);
1235 if (ret) 1209 if (ret)
1236 return ret; 1210 return ret;
1237 1211
@@ -1260,6 +1234,7 @@ static int gen8_emit_flush(struct intel_ringbuffer *ringbuf,
1260} 1234}
1261 1235
1262static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf, 1236static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
1237 struct intel_context *ctx,
1263 u32 invalidate_domains, 1238 u32 invalidate_domains,
1264 u32 flush_domains) 1239 u32 flush_domains)
1265{ 1240{
@@ -1286,7 +1261,7 @@ static int gen8_emit_flush_render(struct intel_ringbuffer *ringbuf,
1286 flags |= PIPE_CONTROL_GLOBAL_GTT_IVB; 1261 flags |= PIPE_CONTROL_GLOBAL_GTT_IVB;
1287 } 1262 }
1288 1263
1289 ret = intel_logical_ring_begin(ringbuf, 6); 1264 ret = intel_logical_ring_begin(ringbuf, ctx, 6);
1290 if (ret) 1265 if (ret)
1291 return ret; 1266 return ret;
1292 1267
@@ -1311,13 +1286,14 @@ static void gen8_set_seqno(struct intel_engine_cs *ring, u32 seqno)
1311 intel_write_status_page(ring, I915_GEM_HWS_INDEX, seqno); 1286 intel_write_status_page(ring, I915_GEM_HWS_INDEX, seqno);
1312} 1287}
1313 1288
1314static int gen8_emit_request(struct intel_ringbuffer *ringbuf) 1289static int gen8_emit_request(struct intel_ringbuffer *ringbuf,
1290 struct drm_i915_gem_request *request)
1315{ 1291{
1316 struct intel_engine_cs *ring = ringbuf->ring; 1292 struct intel_engine_cs *ring = ringbuf->ring;
1317 u32 cmd; 1293 u32 cmd;
1318 int ret; 1294 int ret;
1319 1295
1320 ret = intel_logical_ring_begin(ringbuf, 6); 1296 ret = intel_logical_ring_begin(ringbuf, request->ctx, 6);
1321 if (ret) 1297 if (ret)
1322 return ret; 1298 return ret;
1323 1299
@@ -1333,7 +1309,7 @@ static int gen8_emit_request(struct intel_ringbuffer *ringbuf)
1333 i915_gem_request_get_seqno(ring->outstanding_lazy_request)); 1309 i915_gem_request_get_seqno(ring->outstanding_lazy_request));
1334 intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT); 1310 intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
1335 intel_logical_ring_emit(ringbuf, MI_NOOP); 1311 intel_logical_ring_emit(ringbuf, MI_NOOP);
1336 intel_logical_ring_advance_and_submit(ringbuf); 1312 intel_logical_ring_advance_and_submit(ringbuf, request->ctx, request);
1337 1313
1338 return 0; 1314 return 0;
1339} 1315}
@@ -1620,6 +1596,7 @@ int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
1620 return 0; 1596 return 0;
1621 1597
1622 ret = ring->emit_bb_start(ringbuf, 1598 ret = ring->emit_bb_start(ringbuf,
1599 ctx,
1623 so.ggtt_offset, 1600 so.ggtt_offset,
1624 I915_DISPATCH_SECURE); 1601 I915_DISPATCH_SECURE);
1625 if (ret) 1602 if (ret)
@@ -1774,6 +1751,7 @@ void intel_lr_context_free(struct intel_context *ctx)
1774 intel_unpin_ringbuffer_obj(ringbuf); 1751 intel_unpin_ringbuffer_obj(ringbuf);
1775 i915_gem_object_ggtt_unpin(ctx_obj); 1752 i915_gem_object_ggtt_unpin(ctx_obj);
1776 } 1753 }
1754 WARN_ON(ctx->engine[ring->id].pin_count);
1777 intel_destroy_ringbuffer_obj(ringbuf); 1755 intel_destroy_ringbuffer_obj(ringbuf);
1778 kfree(ringbuf); 1756 kfree(ringbuf);
1779 drm_gem_object_unreference(&ctx_obj->base); 1757 drm_gem_object_unreference(&ctx_obj->base);
@@ -1876,7 +1854,6 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
1876 } 1854 }
1877 1855
1878 ringbuf->ring = ring; 1856 ringbuf->ring = ring;
1879 ringbuf->FIXME_lrc_ctx = ctx;
1880 1857
1881 ringbuf->size = 32 * PAGE_SIZE; 1858 ringbuf->size = 32 * PAGE_SIZE;
1882 ringbuf->effective_size = ringbuf->size; 1859 ringbuf->effective_size = ringbuf->size;