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path: root/drivers/gpu/drm/i915/intel_dp.c
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Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c24
1 files changed, 14 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 71c7096e3869..296cfc201a81 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -266,6 +266,9 @@ intel_dp_mode_valid(struct drm_connector *connector,
266 if (mode->clock < 10000) 266 if (mode->clock < 10000)
267 return MODE_CLOCK_LOW; 267 return MODE_CLOCK_LOW;
268 268
269 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
270 return MODE_H_ILLEGAL;
271
269 return MODE_OK; 272 return MODE_OK;
270} 273}
271 274
@@ -702,6 +705,9 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
702 mode->clock = intel_dp->panel_fixed_mode->clock; 705 mode->clock = intel_dp->panel_fixed_mode->clock;
703 } 706 }
704 707
708 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
709 return false;
710
705 DRM_DEBUG_KMS("DP link computation with max lane count %i " 711 DRM_DEBUG_KMS("DP link computation with max lane count %i "
706 "max bw %02x pixel clock %iKHz\n", 712 "max bw %02x pixel clock %iKHz\n",
707 max_lane_count, bws[max_clock], mode->clock); 713 max_lane_count, bws[max_clock], mode->clock);
@@ -1154,11 +1160,10 @@ static void ironlake_edp_panel_off(struct intel_dp *intel_dp)
1154 1160
1155 DRM_DEBUG_KMS("Turn eDP power off\n"); 1161 DRM_DEBUG_KMS("Turn eDP power off\n");
1156 1162
1157 WARN(intel_dp->want_panel_vdd, "Cannot turn power off while VDD is on\n"); 1163 WARN(!intel_dp->want_panel_vdd, "Need VDD to turn off panel\n");
1158 ironlake_panel_vdd_off_sync(intel_dp); /* finish any pending work */
1159 1164
1160 pp = ironlake_get_pp_control(dev_priv); 1165 pp = ironlake_get_pp_control(dev_priv);
1161 pp &= ~(POWER_TARGET_ON | EDP_FORCE_VDD | PANEL_POWER_RESET | EDP_BLC_ENABLE); 1166 pp &= ~(POWER_TARGET_ON | PANEL_POWER_RESET | EDP_BLC_ENABLE);
1162 I915_WRITE(PCH_PP_CONTROL, pp); 1167 I915_WRITE(PCH_PP_CONTROL, pp);
1163 POSTING_READ(PCH_PP_CONTROL); 1168 POSTING_READ(PCH_PP_CONTROL);
1164 1169
@@ -1266,18 +1271,16 @@ static void intel_dp_prepare(struct drm_encoder *encoder)
1266{ 1271{
1267 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1272 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1268 1273
1274
1275 /* Make sure the panel is off before trying to change the mode. But also
1276 * ensure that we have vdd while we switch off the panel. */
1277 ironlake_edp_panel_vdd_on(intel_dp);
1269 ironlake_edp_backlight_off(intel_dp); 1278 ironlake_edp_backlight_off(intel_dp);
1270 ironlake_edp_panel_off(intel_dp); 1279 ironlake_edp_panel_off(intel_dp);
1271 1280
1272 /* Wake up the sink first */
1273 ironlake_edp_panel_vdd_on(intel_dp);
1274 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); 1281 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
1275 intel_dp_link_down(intel_dp); 1282 intel_dp_link_down(intel_dp);
1276 ironlake_edp_panel_vdd_off(intel_dp, false); 1283 ironlake_edp_panel_vdd_off(intel_dp, false);
1277
1278 /* Make sure the panel is off before trying to
1279 * change the mode
1280 */
1281} 1284}
1282 1285
1283static void intel_dp_commit(struct drm_encoder *encoder) 1286static void intel_dp_commit(struct drm_encoder *encoder)
@@ -1309,10 +1312,11 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
1309 uint32_t dp_reg = I915_READ(intel_dp->output_reg); 1312 uint32_t dp_reg = I915_READ(intel_dp->output_reg);
1310 1313
1311 if (mode != DRM_MODE_DPMS_ON) { 1314 if (mode != DRM_MODE_DPMS_ON) {
1315 /* Switching the panel off requires vdd. */
1316 ironlake_edp_panel_vdd_on(intel_dp);
1312 ironlake_edp_backlight_off(intel_dp); 1317 ironlake_edp_backlight_off(intel_dp);
1313 ironlake_edp_panel_off(intel_dp); 1318 ironlake_edp_panel_off(intel_dp);
1314 1319
1315 ironlake_edp_panel_vdd_on(intel_dp);
1316 intel_dp_sink_dpms(intel_dp, mode); 1320 intel_dp_sink_dpms(intel_dp, mode);
1317 intel_dp_link_down(intel_dp); 1321 intel_dp_link_down(intel_dp);
1318 ironlake_edp_panel_vdd_off(intel_dp, false); 1322 ironlake_edp_panel_vdd_off(intel_dp, false);