diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dp.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6f728e5ee793..d7d4afe01341 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -820,6 +820,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
820 | struct intel_link_m_n m_n; | 820 | struct intel_link_m_n m_n; |
821 | int pipe = intel_crtc->pipe; | 821 | int pipe = intel_crtc->pipe; |
822 | enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; | 822 | enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; |
823 | int target_clock; | ||
823 | 824 | ||
824 | /* | 825 | /* |
825 | * Find the lane count in the intel_encoder private | 826 | * Find the lane count in the intel_encoder private |
@@ -835,13 +836,22 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
835 | } | 836 | } |
836 | } | 837 | } |
837 | 838 | ||
839 | target_clock = mode->clock; | ||
840 | for_each_encoder_on_crtc(dev, crtc, intel_encoder) { | ||
841 | if (intel_encoder->type == INTEL_OUTPUT_EDP) { | ||
842 | target_clock = intel_edp_target_clock(intel_encoder, | ||
843 | mode); | ||
844 | break; | ||
845 | } | ||
846 | } | ||
847 | |||
838 | /* | 848 | /* |
839 | * Compute the GMCH and Link ratios. The '3' here is | 849 | * Compute the GMCH and Link ratios. The '3' here is |
840 | * the number of bytes_per_pixel post-LUT, which we always | 850 | * the number of bytes_per_pixel post-LUT, which we always |
841 | * set up for 8-bits of R/G/B, or 3 bytes total. | 851 | * set up for 8-bits of R/G/B, or 3 bytes total. |
842 | */ | 852 | */ |
843 | intel_link_compute_m_n(intel_crtc->bpp, lane_count, | 853 | intel_link_compute_m_n(intel_crtc->bpp, lane_count, |
844 | mode->clock, adjusted_mode->clock, &m_n); | 854 | target_clock, adjusted_mode->clock, &m_n); |
845 | 855 | ||
846 | if (IS_HASWELL(dev)) { | 856 | if (IS_HASWELL(dev)) { |
847 | I915_WRITE(PIPE_DATA_M1(cpu_transcoder), | 857 | I915_WRITE(PIPE_DATA_M1(cpu_transcoder), |
@@ -1930,7 +1940,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) | |||
1930 | for (i = 0; i < intel_dp->lane_count; i++) | 1940 | for (i = 0; i < intel_dp->lane_count; i++) |
1931 | if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) | 1941 | if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) |
1932 | break; | 1942 | break; |
1933 | if (i == intel_dp->lane_count && voltage_tries == 5) { | 1943 | if (i == intel_dp->lane_count) { |
1934 | ++loop_tries; | 1944 | ++loop_tries; |
1935 | if (loop_tries == 5) { | 1945 | if (loop_tries == 5) { |
1936 | DRM_DEBUG_KMS("too many full retries, give up\n"); | 1946 | DRM_DEBUG_KMS("too many full retries, give up\n"); |