diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7ec8b488bb1d..080f6fd4e839 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -5815,7 +5815,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc) | |||
5815 | uint16_t postoff = 0; | 5815 | uint16_t postoff = 0; |
5816 | 5816 | ||
5817 | if (intel_crtc->config.limited_color_range) | 5817 | if (intel_crtc->config.limited_color_range) |
5818 | postoff = (16 * (1 << 13) / 255) & 0x1fff; | 5818 | postoff = (16 * (1 << 12) / 255) & 0x1fff; |
5819 | 5819 | ||
5820 | I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff); | 5820 | I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff); |
5821 | I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff); | 5821 | I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff); |
@@ -6402,7 +6402,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv) | |||
6402 | 6402 | ||
6403 | /* Make sure we're not on PC8 state before disabling PC8, otherwise | 6403 | /* Make sure we're not on PC8 state before disabling PC8, otherwise |
6404 | * we'll hang the machine! */ | 6404 | * we'll hang the machine! */ |
6405 | dev_priv->uncore.funcs.force_wake_get(dev_priv); | 6405 | gen6_gt_force_wake_get(dev_priv); |
6406 | 6406 | ||
6407 | if (val & LCPLL_POWER_DOWN_ALLOW) { | 6407 | if (val & LCPLL_POWER_DOWN_ALLOW) { |
6408 | val &= ~LCPLL_POWER_DOWN_ALLOW; | 6408 | val &= ~LCPLL_POWER_DOWN_ALLOW; |
@@ -6436,7 +6436,7 @@ static void hsw_restore_lcpll(struct drm_i915_private *dev_priv) | |||
6436 | DRM_ERROR("Switching back to LCPLL failed\n"); | 6436 | DRM_ERROR("Switching back to LCPLL failed\n"); |
6437 | } | 6437 | } |
6438 | 6438 | ||
6439 | dev_priv->uncore.funcs.force_wake_put(dev_priv); | 6439 | gen6_gt_force_wake_put(dev_priv); |
6440 | } | 6440 | } |
6441 | 6441 | ||
6442 | void hsw_enable_pc8_work(struct work_struct *__work) | 6442 | void hsw_enable_pc8_work(struct work_struct *__work) |
@@ -8354,7 +8354,8 @@ static int intel_gen7_queue_flip(struct drm_device *dev, | |||
8354 | intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE | | 8354 | intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE | |
8355 | DERRMR_PIPEB_PRI_FLIP_DONE | | 8355 | DERRMR_PIPEB_PRI_FLIP_DONE | |
8356 | DERRMR_PIPEC_PRI_FLIP_DONE)); | 8356 | DERRMR_PIPEC_PRI_FLIP_DONE)); |
8357 | intel_ring_emit(ring, MI_STORE_REGISTER_MEM(1)); | 8357 | intel_ring_emit(ring, MI_STORE_REGISTER_MEM(1) | |
8358 | MI_SRM_LRM_GLOBAL_GTT); | ||
8358 | intel_ring_emit(ring, DERRMR); | 8359 | intel_ring_emit(ring, DERRMR); |
8359 | intel_ring_emit(ring, ring->scratch.gtt_offset + 256); | 8360 | intel_ring_emit(ring, ring->scratch.gtt_offset + 256); |
8360 | } | 8361 | } |
@@ -10049,7 +10050,7 @@ static void intel_setup_outputs(struct drm_device *dev) | |||
10049 | intel_ddi_init(dev, PORT_D); | 10050 | intel_ddi_init(dev, PORT_D); |
10050 | } else if (HAS_PCH_SPLIT(dev)) { | 10051 | } else if (HAS_PCH_SPLIT(dev)) { |
10051 | int found; | 10052 | int found; |
10052 | dpd_is_edp = intel_dpd_is_edp(dev); | 10053 | dpd_is_edp = intel_dp_is_edp(dev, PORT_D); |
10053 | 10054 | ||
10054 | if (has_edp_a(dev)) | 10055 | if (has_edp_a(dev)) |
10055 | intel_dp_init(dev, DP_A, PORT_A); | 10056 | intel_dp_init(dev, DP_A, PORT_A); |
@@ -10086,8 +10087,7 @@ static void intel_setup_outputs(struct drm_device *dev) | |||
10086 | intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIC, | 10087 | intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIC, |
10087 | PORT_C); | 10088 | PORT_C); |
10088 | if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED) | 10089 | if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED) |
10089 | intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, | 10090 | intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, PORT_C); |
10090 | PORT_C); | ||
10091 | } | 10091 | } |
10092 | 10092 | ||
10093 | intel_dsi_init(dev); | 10093 | intel_dsi_init(dev); |