diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3d1c97abee28..ae3dc5d1ff52 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1406,7 +1406,7 @@ static void i9xx_enable_pll(struct intel_crtc *crtc) | |||
1406 | } | 1406 | } |
1407 | 1407 | ||
1408 | /** | 1408 | /** |
1409 | * intel_disable_pll - disable a PLL | 1409 | * i9xx_disable_pll - disable a PLL |
1410 | * @dev_priv: i915 private structure | 1410 | * @dev_priv: i915 private structure |
1411 | * @pipe: pipe PLL to disable | 1411 | * @pipe: pipe PLL to disable |
1412 | * | 1412 | * |
@@ -1414,11 +1414,8 @@ static void i9xx_enable_pll(struct intel_crtc *crtc) | |||
1414 | * | 1414 | * |
1415 | * Note! This is for pre-ILK only. | 1415 | * Note! This is for pre-ILK only. |
1416 | */ | 1416 | */ |
1417 | static void intel_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) | 1417 | static void i9xx_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) |
1418 | { | 1418 | { |
1419 | int reg; | ||
1420 | u32 val; | ||
1421 | |||
1422 | /* Don't disable pipe A or pipe A PLLs if needed */ | 1419 | /* Don't disable pipe A or pipe A PLLs if needed */ |
1423 | if (pipe == PIPE_A && (dev_priv->quirks & QUIRK_PIPEA_FORCE)) | 1420 | if (pipe == PIPE_A && (dev_priv->quirks & QUIRK_PIPEA_FORCE)) |
1424 | return; | 1421 | return; |
@@ -1426,11 +1423,8 @@ static void intel_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) | |||
1426 | /* Make sure the pipe isn't still relying on us */ | 1423 | /* Make sure the pipe isn't still relying on us */ |
1427 | assert_pipe_disabled(dev_priv, pipe); | 1424 | assert_pipe_disabled(dev_priv, pipe); |
1428 | 1425 | ||
1429 | reg = DPLL(pipe); | 1426 | I915_WRITE(DPLL(pipe), 0); |
1430 | val = I915_READ(reg); | 1427 | POSTING_READ(DPLL(pipe)); |
1431 | val &= ~DPLL_VCO_ENABLE; | ||
1432 | I915_WRITE(reg, val); | ||
1433 | POSTING_READ(reg); | ||
1434 | } | 1428 | } |
1435 | 1429 | ||
1436 | void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port) | 1430 | void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port) |
@@ -3782,7 +3776,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) | |||
3782 | if (encoder->post_disable) | 3776 | if (encoder->post_disable) |
3783 | encoder->post_disable(encoder); | 3777 | encoder->post_disable(encoder); |
3784 | 3778 | ||
3785 | intel_disable_pll(dev_priv, pipe); | 3779 | i9xx_disable_pll(dev_priv, pipe); |
3786 | 3780 | ||
3787 | intel_crtc->active = false; | 3781 | intel_crtc->active = false; |
3788 | intel_update_fbc(dev); | 3782 | intel_update_fbc(dev); |