diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b62136764a2b..f121aaf20ba9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -4543,8 +4543,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, | |||
4543 | u32 lvds_sync = 0; | 4543 | u32 lvds_sync = 0; |
4544 | int target_clock; | 4544 | int target_clock; |
4545 | 4545 | ||
4546 | drm_vblank_pre_modeset(dev, pipe); | ||
4547 | |||
4548 | list_for_each_entry(encoder, &mode_config->encoder_list, base.head) { | 4546 | list_for_each_entry(encoder, &mode_config->encoder_list, base.head) { |
4549 | if (encoder->base.crtc != crtc) | 4547 | if (encoder->base.crtc != crtc) |
4550 | continue; | 4548 | continue; |
@@ -4601,7 +4599,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, | |||
4601 | ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, &clock); | 4599 | ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, &clock); |
4602 | if (!ok) { | 4600 | if (!ok) { |
4603 | DRM_ERROR("Couldn't find PLL settings for mode!\n"); | 4601 | DRM_ERROR("Couldn't find PLL settings for mode!\n"); |
4604 | drm_vblank_post_modeset(dev, pipe); | ||
4605 | return -EINVAL; | 4602 | return -EINVAL; |
4606 | } | 4603 | } |
4607 | 4604 | ||
@@ -5159,8 +5156,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, | |||
5159 | 5156 | ||
5160 | intel_update_watermarks(dev); | 5157 | intel_update_watermarks(dev); |
5161 | 5158 | ||
5162 | drm_vblank_post_modeset(dev, pipe); | ||
5163 | |||
5164 | return ret; | 5159 | return ret; |
5165 | } | 5160 | } |
5166 | 5161 | ||
@@ -5191,8 +5186,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, | |||
5191 | u32 lvds_sync = 0; | 5186 | u32 lvds_sync = 0; |
5192 | int target_clock; | 5187 | int target_clock; |
5193 | 5188 | ||
5194 | drm_vblank_pre_modeset(dev, pipe); | ||
5195 | |||
5196 | list_for_each_entry(encoder, &mode_config->encoder_list, base.head) { | 5189 | list_for_each_entry(encoder, &mode_config->encoder_list, base.head) { |
5197 | if (encoder->base.crtc != crtc) | 5190 | if (encoder->base.crtc != crtc) |
5198 | continue; | 5191 | continue; |
@@ -5249,7 +5242,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, | |||
5249 | ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, &clock); | 5242 | ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, &clock); |
5250 | if (!ok) { | 5243 | if (!ok) { |
5251 | DRM_ERROR("Couldn't find PLL settings for mode!\n"); | 5244 | DRM_ERROR("Couldn't find PLL settings for mode!\n"); |
5252 | drm_vblank_post_modeset(dev, pipe); | ||
5253 | return -EINVAL; | 5245 | return -EINVAL; |
5254 | } | 5246 | } |
5255 | 5247 | ||
@@ -5807,8 +5799,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, | |||
5807 | 5799 | ||
5808 | intel_update_watermarks(dev); | 5800 | intel_update_watermarks(dev); |
5809 | 5801 | ||
5810 | drm_vblank_post_modeset(dev, pipe); | ||
5811 | |||
5812 | return ret; | 5802 | return ret; |
5813 | } | 5803 | } |
5814 | 5804 | ||
@@ -5820,11 +5810,17 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
5820 | { | 5810 | { |
5821 | struct drm_device *dev = crtc->dev; | 5811 | struct drm_device *dev = crtc->dev; |
5822 | struct drm_i915_private *dev_priv = dev->dev_private; | 5812 | struct drm_i915_private *dev_priv = dev->dev_private; |
5813 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
5814 | int pipe = intel_crtc->pipe; | ||
5823 | int ret; | 5815 | int ret; |
5824 | 5816 | ||
5817 | drm_vblank_pre_modeset(dev, pipe); | ||
5818 | |||
5825 | ret = dev_priv->display.crtc_mode_set(crtc, mode, adjusted_mode, | 5819 | ret = dev_priv->display.crtc_mode_set(crtc, mode, adjusted_mode, |
5826 | x, y, old_fb); | 5820 | x, y, old_fb); |
5827 | 5821 | ||
5822 | drm_vblank_post_modeset(dev, pipe); | ||
5823 | |||
5828 | return ret; | 5824 | return ret; |
5829 | } | 5825 | } |
5830 | 5826 | ||