diff options
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 080f6fd4e839..54e82a80cf50 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -6303,7 +6303,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv) | |||
6303 | uint32_t val; | 6303 | uint32_t val; |
6304 | 6304 | ||
6305 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) | 6305 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) |
6306 | WARN(crtc->base.enabled, "CRTC for pipe %c enabled\n", | 6306 | WARN(crtc->active, "CRTC for pipe %c enabled\n", |
6307 | pipe_name(crtc->pipe)); | 6307 | pipe_name(crtc->pipe)); |
6308 | 6308 | ||
6309 | WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n"); | 6309 | WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n"); |
@@ -9135,7 +9135,7 @@ intel_pipe_config_compare(struct drm_device *dev, | |||
9135 | if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) | 9135 | if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) |
9136 | PIPE_CONF_CHECK_I(pipe_bpp); | 9136 | PIPE_CONF_CHECK_I(pipe_bpp); |
9137 | 9137 | ||
9138 | if (!IS_HASWELL(dev)) { | 9138 | if (!HAS_DDI(dev)) { |
9139 | PIPE_CONF_CHECK_CLOCK_FUZZY(adjusted_mode.crtc_clock); | 9139 | PIPE_CONF_CHECK_CLOCK_FUZZY(adjusted_mode.crtc_clock); |
9140 | PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock); | 9140 | PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock); |
9141 | } | 9141 | } |
@@ -11036,8 +11036,6 @@ void intel_modeset_setup_hw_state(struct drm_device *dev, | |||
11036 | } | 11036 | } |
11037 | 11037 | ||
11038 | intel_modeset_check_state(dev); | 11038 | intel_modeset_check_state(dev); |
11039 | |||
11040 | drm_mode_config_reset(dev); | ||
11041 | } | 11039 | } |
11042 | 11040 | ||
11043 | void intel_modeset_gem_init(struct drm_device *dev) | 11041 | void intel_modeset_gem_init(struct drm_device *dev) |
@@ -11046,7 +11044,10 @@ void intel_modeset_gem_init(struct drm_device *dev) | |||
11046 | 11044 | ||
11047 | intel_setup_overlay(dev); | 11045 | intel_setup_overlay(dev); |
11048 | 11046 | ||
11047 | drm_modeset_lock_all(dev); | ||
11048 | drm_mode_config_reset(dev); | ||
11049 | intel_modeset_setup_hw_state(dev, false); | 11049 | intel_modeset_setup_hw_state(dev, false); |
11050 | drm_modeset_unlock_all(dev); | ||
11050 | } | 11051 | } |
11051 | 11052 | ||
11052 | void intel_modeset_cleanup(struct drm_device *dev) | 11053 | void intel_modeset_cleanup(struct drm_device *dev) |
@@ -11125,14 +11126,15 @@ void intel_connector_attach_encoder(struct intel_connector *connector, | |||
11125 | int intel_modeset_vga_set_state(struct drm_device *dev, bool state) | 11126 | int intel_modeset_vga_set_state(struct drm_device *dev, bool state) |
11126 | { | 11127 | { |
11127 | struct drm_i915_private *dev_priv = dev->dev_private; | 11128 | struct drm_i915_private *dev_priv = dev->dev_private; |
11129 | unsigned reg = INTEL_INFO(dev)->gen >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; | ||
11128 | u16 gmch_ctrl; | 11130 | u16 gmch_ctrl; |
11129 | 11131 | ||
11130 | pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &gmch_ctrl); | 11132 | pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl); |
11131 | if (state) | 11133 | if (state) |
11132 | gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE; | 11134 | gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE; |
11133 | else | 11135 | else |
11134 | gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; | 11136 | gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; |
11135 | pci_write_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl); | 11137 | pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl); |
11136 | return 0; | 11138 | return 0; |
11137 | } | 11139 | } |
11138 | 11140 | ||