1 files changed, 203 insertions, 48 deletions

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index b53fff84a7d5..1591576a6101 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -42,7 +42,6 @@ static const u32 hsw_ddi_translations_dp[] = {
         0x80C30FFF, 0x000B0000,
         0x00FFFFFF, 0x00040006,
         0x80D75FFF, 0x000B0000,
-        0x00FFFFFF, 0x00040006          /* HDMI parameters */
 };
 
 static const u32 hsw_ddi_translations_fdi[] = {
@@ -55,10 +54,64 @@ static const u32 hsw_ddi_translations_fdi[] = {
         0x00C30FFF, 0x001E0000,
         0x00FFFFFF, 0x00060006,
         0x00D75FFF, 0x001E0000,
-        0x00FFFFFF, 0x00040006          /* HDMI parameters */
 };
 
-static enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
+static const u32 hsw_ddi_translations_hdmi[] = {
+                                /* Idx  NT mV diff      T mV diff       db  */
+        0x00FFFFFF, 0x0006000E, /* 0:   400             400             0   */
+        0x00E79FFF, 0x000E000C, /* 1:   400             500             2   */
+        0x00D75FFF, 0x0005000A, /* 2:   400             600             3.5 */
+        0x00FFFFFF, 0x0005000A, /* 3:   600             600             0   */
+        0x00E79FFF, 0x001D0007, /* 4:   600             750             2   */
+        0x00D75FFF, 0x000C0004, /* 5:   600             900             3.5 */
+        0x00FFFFFF, 0x00040006, /* 6:   800             800             0   */
+        0x80E79FFF, 0x00030002, /* 7:   800             1000            2   */
+        0x00FFFFFF, 0x00140005, /* 8:   850             850             0   */
+        0x00FFFFFF, 0x000C0004, /* 9:   900             900             0   */
+        0x00FFFFFF, 0x001C0003, /* 10:  950             950             0   */
+        0x80FFFFFF, 0x00030002, /* 11:  1000            1000            0   */
+};
+
+static const u32 bdw_ddi_translations_edp[] = {
+        0x00FFFFFF, 0x00000012,         /* DP parameters */
+        0x00EBAFFF, 0x00020011,
+        0x00C71FFF, 0x0006000F,
+        0x00FFFFFF, 0x00020011,
+        0x00DB6FFF, 0x0005000F,
+        0x00BEEFFF, 0x000A000C,
+        0x00FFFFFF, 0x0005000F,
+        0x00DB6FFF, 0x000A000C,
+        0x00FFFFFF, 0x000A000C,
+        0x00FFFFFF, 0x00140006          /* HDMI parameters 800mV 0dB*/
+};
+
+static const u32 bdw_ddi_translations_dp[] = {
+        0x00FFFFFF, 0x0007000E,         /* DP parameters */
+        0x00D75FFF, 0x000E000A,
+        0x00BEFFFF, 0x00140006,
+        0x00FFFFFF, 0x000E000A,
+        0x00D75FFF, 0x00180004,
+        0x80CB2FFF, 0x001B0002,
+        0x00F7DFFF, 0x00180004,
+        0x80D75FFF, 0x001B0002,
+        0x80FFFFFF, 0x001B0002,
+        0x00FFFFFF, 0x00140006          /* HDMI parameters 800mV 0dB*/
+};
+
+static const u32 bdw_ddi_translations_fdi[] = {
+        0x00FFFFFF, 0x0001000E,         /* FDI parameters */
+        0x00D75FFF, 0x0004000A,
+        0x00C30FFF, 0x00070006,
+        0x00AAAFFF, 0x000C0000,
+        0x00FFFFFF, 0x0004000A,
+        0x00D75FFF, 0x00090004,
+        0x00C30FFF, 0x000C0000,
+        0x00FFFFFF, 0x00070006,
+        0x00D75FFF, 0x000C0000,
+        0x00FFFFFF, 0x00140006          /* HDMI parameters 800mV 0dB*/
+};
+
+enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
 {
         struct drm_encoder *encoder = &intel_encoder->base;
         int type = intel_encoder->type;
@@ -78,8 +131,9 @@ static enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
         }
 }
 
-/* On Haswell, DDI port buffers must be programmed with correct values
- * in advance. The buffer values are different for FDI and DP modes,
+/*
+ * Starting with Haswell, DDI port buffers must be programmed with correct
+ * values in advance. The buffer values are different for FDI and DP modes,
  * but the HDMI/DVI fields are shared among those. So we program the DDI
  * in either FDI or DP modes only, as HDMI connections will work with both
  * of those
@@ -89,15 +143,58 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
         struct drm_i915_private *dev_priv = dev->dev_private;
         u32 reg;
         int i;
-        const u32 *ddi_translations = (port == PORT_E) ?
-                hsw_ddi_translations_fdi :
-                hsw_ddi_translations_dp;
+        int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
+        const u32 *ddi_translations_fdi;
+        const u32 *ddi_translations_dp;
+        const u32 *ddi_translations_edp;
+        const u32 *ddi_translations;
+
+        if (IS_BROADWELL(dev)) {
+                ddi_translations_fdi = bdw_ddi_translations_fdi;
+                ddi_translations_dp = bdw_ddi_translations_dp;
+                ddi_translations_edp = bdw_ddi_translations_edp;
+        } else if (IS_HASWELL(dev)) {
+                ddi_translations_fdi = hsw_ddi_translations_fdi;
+                ddi_translations_dp = hsw_ddi_translations_dp;
+                ddi_translations_edp = hsw_ddi_translations_dp;
+        } else {
+                WARN(1, "ddi translation table missing\n");
+                ddi_translations_edp = bdw_ddi_translations_dp;
+                ddi_translations_fdi = bdw_ddi_translations_fdi;
+                ddi_translations_dp = bdw_ddi_translations_dp;
+        }
+
+        switch (port) {
+        case PORT_A:
+                ddi_translations = ddi_translations_edp;
+                break;
+        case PORT_B:
+        case PORT_C:
+                ddi_translations = ddi_translations_dp;
+                break;
+        case PORT_D:
+                if (intel_dpd_is_edp(dev))
+                        ddi_translations = ddi_translations_edp;
+                else
+                        ddi_translations = ddi_translations_dp;
+                break;
+        case PORT_E:
+                ddi_translations = ddi_translations_fdi;
+                break;
+        default:
+                BUG();
+        }
 
         for (i = 0, reg = DDI_BUF_TRANS(port);
              i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
                 I915_WRITE(reg, ddi_translations[i]);
                 reg += 4;
         }
+        /* Entry 9 is for HDMI: */
+        for (i = 0; i < 2; i++) {
+                I915_WRITE(reg, hsw_ddi_translations_hdmi[hdmi_level * 2 + i]);
+                reg += 4;
+        }
 }
 
 /* Program DDI buffers translations for DP. By default, program ports A-D in DP
@@ -296,9 +393,6 @@ static void intel_ddi_mode_set(struct intel_encoder *encoder)
                         DRM_DEBUG_DRIVER("DP audio: write eld information\n");
                         intel_write_eld(&encoder->base, adjusted_mode);
                 }
-
-                intel_dp_init_link_config(intel_dp);
-
         } else if (type == INTEL_OUTPUT_HDMI) {
                 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
 
@@ -739,7 +833,8 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)
         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
         struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);
         struct drm_encoder *encoder = &intel_encoder->base;
-        struct drm_i915_private *dev_priv = crtc->dev->dev_private;
+        struct drm_device *dev = crtc->dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
         enum pipe pipe = intel_crtc->pipe;
         enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
         enum port port = intel_ddi_get_encoder_port(intel_encoder);
@@ -767,18 +862,19 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)
                 BUG();
         }
 
-        if (crtc->mode.flags & DRM_MODE_FLAG_PVSYNC)
+        if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_PVSYNC)
                 temp |= TRANS_DDI_PVSYNC;
-        if (crtc->mode.flags & DRM_MODE_FLAG_PHSYNC)
+        if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_PHSYNC)
                 temp |= TRANS_DDI_PHSYNC;
 
         if (cpu_transcoder == TRANSCODER_EDP) {
                 switch (pipe) {
                 case PIPE_A:
-                        /* Can only use the always-on power well for eDP when
-                         * not using the panel fitter, and when not using motion
-                          * blur mitigation (which we don't support). */
-                        if (intel_crtc->config.pch_pfit.enabled)
+                        /* On Haswell, can only use the always-on power well for
+                         * eDP when not using the panel fitter, and when not
+                         * using motion blur mitigation (which we don't
+                         * support). */
+                        if (IS_HASWELL(dev) && intel_crtc->config.pch_pfit.enabled)
                                 temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;
                         else
                                 temp |= TRANS_DDI_EDP_INPUT_A_ON;
@@ -1139,18 +1235,29 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder)
 
 int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
 {
+        struct drm_device *dev = dev_priv->dev;
         uint32_t lcpll = I915_READ(LCPLL_CTL);
+        uint32_t freq = lcpll & LCPLL_CLK_FREQ_MASK;
 
-        if (lcpll & LCPLL_CD_SOURCE_FCLK)
+        if (lcpll & LCPLL_CD_SOURCE_FCLK) {
                 return 800000;
-        else if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT)
+        } else if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT) {
                 return 450000;
-        else if ((lcpll & LCPLL_CLK_FREQ_MASK) == LCPLL_CLK_FREQ_450)
+        } else if (freq == LCPLL_CLK_FREQ_450) {
                 return 450000;
-        else if (IS_ULT(dev_priv->dev))
-                return 337500;
-        else
-                return 540000;
+        } else if (IS_HASWELL(dev)) {
+                if (IS_ULT(dev))
+                        return 337500;
+                else
+                        return 540000;
+        } else {
+                if (freq == LCPLL_CLK_FREQ_54O_BDW)
+                        return 540000;
+                else if (freq == LCPLL_CLK_FREQ_337_5_BDW)
+                        return 337500;
+                else
+                        return 675000;
+        }
 }
 
 void intel_ddi_pll_init(struct drm_device *dev)
@@ -1202,7 +1309,7 @@ void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder)
 
         val = DP_TP_CTL_ENABLE | DP_TP_CTL_MODE_SST |
               DP_TP_CTL_LINK_TRAIN_PAT1 | DP_TP_CTL_SCRAMBLE_DISABLE;
-        if (intel_dp->link_configuration[1] & DP_LANE_COUNT_ENHANCED_FRAME_EN)
+        if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
                 val |= DP_TP_CTL_ENHANCED_FRAME_ENABLE;
         I915_WRITE(DP_TP_CTL(port), val);
         POSTING_READ(DP_TP_CTL(port));
@@ -1285,6 +1392,20 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
         default:
                 break;
         }
+
+        switch (temp & TRANS_DDI_MODE_SELECT_MASK) {
+        case TRANS_DDI_MODE_SELECT_HDMI:
+        case TRANS_DDI_MODE_SELECT_DVI:
+        case TRANS_DDI_MODE_SELECT_FDI:
+                break;
+        case TRANS_DDI_MODE_SELECT_DP_SST:
+        case TRANS_DDI_MODE_SELECT_DP_MST:
+                pipe_config->has_dp_encoder = true;
+                intel_dp_get_m_n(intel_crtc, pipe_config);
+                break;
+        default:
+                break;
+        }
 }
 
 static void intel_ddi_destroy(struct drm_encoder *encoder)
@@ -1314,6 +1435,41 @@ static const struct drm_encoder_funcs intel_ddi_funcs = {
         .destroy = intel_ddi_destroy,
 };
 
+static struct intel_connector *
+intel_ddi_init_dp_connector(struct intel_digital_port *intel_dig_port)
+{
+        struct intel_connector *connector;
+        enum port port = intel_dig_port->port;
+
+        connector = kzalloc(sizeof(*connector), GFP_KERNEL);
+        if (!connector)
+                return NULL;
+
+        intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
+        if (!intel_dp_init_connector(intel_dig_port, connector)) {
+                kfree(connector);
+                return NULL;
+        }
+
+        return connector;
+}
+
+static struct intel_connector *
+intel_ddi_init_hdmi_connector(struct intel_digital_port *intel_dig_port)
+{
+        struct intel_connector *connector;
+        enum port port = intel_dig_port->port;
+
+        connector = kzalloc(sizeof(*connector), GFP_KERNEL);
+        if (!connector)
+                return NULL;
+
+        intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
+        intel_hdmi_init_connector(intel_dig_port, connector);
+
+        return connector;
+}
+
 void intel_ddi_init(struct drm_device *dev, enum port port)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
@@ -1322,17 +1478,22 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
         struct drm_encoder *encoder;
         struct intel_connector *hdmi_connector = NULL;
         struct intel_connector *dp_connector = NULL;
+        bool init_hdmi, init_dp;
+
+        init_hdmi = (dev_priv->vbt.ddi_port_info[port].supports_dvi ||
+                     dev_priv->vbt.ddi_port_info[port].supports_hdmi);
+        init_dp = dev_priv->vbt.ddi_port_info[port].supports_dp;
+        if (!init_dp && !init_hdmi) {
+                DRM_DEBUG_KMS("VBT says port %c is not DVI/HDMI/DP compatible\n",
+                              port_name(port));
+                init_hdmi = true;
+                init_dp = true;
+        }
 
-        intel_dig_port = kzalloc(sizeof(struct intel_digital_port), GFP_KERNEL);
+        intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
         if (!intel_dig_port)
                 return;
 
-        dp_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
-        if (!dp_connector) {
-                kfree(intel_dig_port);
-                return;
-        }
-
         intel_encoder = &intel_dig_port->base;
         encoder = &intel_encoder->base;
 
@@ -1352,28 +1513,22 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
         intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
                                           (DDI_BUF_PORT_REVERSAL |
                                            DDI_A_4_LANES);
-        intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
 
         intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
         intel_encoder->crtc_mask =  (1 << 0) | (1 << 1) | (1 << 2);
         intel_encoder->cloneable = false;
         intel_encoder->hot_plug = intel_ddi_hot_plug;
 
-        if (!intel_dp_init_connector(intel_dig_port, dp_connector)) {
-                drm_encoder_cleanup(encoder);
-                kfree(intel_dig_port);
-                kfree(dp_connector);
-                return;
-        }
+        if (init_dp)
+                dp_connector = intel_ddi_init_dp_connector(intel_dig_port);
 
-        if (intel_encoder->type != INTEL_OUTPUT_EDP) {
-                hdmi_connector = kzalloc(sizeof(struct intel_connector),
-                                         GFP_KERNEL);
-                if (!hdmi_connector) {
-                        return;
-                }
+        /* In theory we don't need the encoder->type check, but leave it just in
+         * case we have some really bad VBTs... */
+        if (intel_encoder->type != INTEL_OUTPUT_EDP && init_hdmi)
+                hdmi_connector = intel_ddi_init_hdmi_connector(intel_dig_port);
 
-                intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
-                intel_hdmi_init_connector(intel_dig_port, hdmi_connector);
+        if (!dp_connector && !hdmi_connector) {
+                drm_encoder_cleanup(encoder);
+                kfree(intel_dig_port);
         }
 }