aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_suspend.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c18
1 files changed, 1 insertions, 17 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 2b5eb229ff2c..0ede02a99d91 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -40,7 +40,7 @@ static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
40 return false; 40 return false;
41 41
42 if (HAS_PCH_SPLIT(dev)) 42 if (HAS_PCH_SPLIT(dev))
43 dpll_reg = PCH_DPLL(pipe); 43 dpll_reg = _PCH_DPLL(pipe);
44 else 44 else
45 dpll_reg = (pipe == PIPE_A) ? _DPLL_A : _DPLL_B; 45 dpll_reg = (pipe == PIPE_A) ? _DPLL_A : _DPLL_B;
46 46
@@ -876,22 +876,6 @@ int i915_restore_state(struct drm_device *dev)
876 I915_WRITE(IER, dev_priv->saveIER); 876 I915_WRITE(IER, dev_priv->saveIER);
877 I915_WRITE(IMR, dev_priv->saveIMR); 877 I915_WRITE(IMR, dev_priv->saveIMR);
878 } 878 }
879 mutex_unlock(&dev->struct_mutex);
880
881 if (drm_core_check_feature(dev, DRIVER_MODESET))
882 intel_init_clock_gating(dev);
883
884 if (IS_IRONLAKE_M(dev)) {
885 ironlake_enable_drps(dev);
886 intel_init_emon(dev);
887 }
888
889 if (INTEL_INFO(dev)->gen >= 6) {
890 gen6_enable_rps(dev_priv);
891 gen6_update_ring_freq(dev_priv);
892 }
893
894 mutex_lock(&dev->struct_mutex);
895 879
896 /* Cache mode state */ 880 /* Cache mode state */
897 I915_WRITE(CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000); 881 I915_WRITE(CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);