diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5c2d9f206d05..9d24aaeb8a45 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -522,11 +522,15 @@ | |||
522 | #define DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED (2 << 0) | 522 | #define DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED (2 << 0) |
523 | #define DCC_ADDRESSING_MODE_MASK (3 << 0) | 523 | #define DCC_ADDRESSING_MODE_MASK (3 << 0) |
524 | #define DCC_CHANNEL_XOR_DISABLE (1 << 10) | 524 | #define DCC_CHANNEL_XOR_DISABLE (1 << 10) |
525 | #define DCC_CHANNEL_XOR_BIT_17 (1 << 9) | ||
525 | 526 | ||
526 | /** 965 MCH register controlling DRAM channel configuration */ | 527 | /** 965 MCH register controlling DRAM channel configuration */ |
527 | #define C0DRB3 0x10206 | 528 | #define C0DRB3 0x10206 |
528 | #define C1DRB3 0x10606 | 529 | #define C1DRB3 0x10606 |
529 | 530 | ||
531 | /** GM965 GM45 render standby register */ | ||
532 | #define MCHBAR_RENDER_STANDBY 0x111B8 | ||
533 | |||
530 | /* | 534 | /* |
531 | * Overlay regs | 535 | * Overlay regs |
532 | */ | 536 | */ |