1 files changed, 47 insertions, 3 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b0ab4247ce48..33ddf3120f2f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -145,6 +145,8 @@
 #define   MI_END_SCENE          (1 << 4) /* flush binner and incr scene count */
 #define   MI_INVALIDATE_ISP     (1 << 5) /* invalidate indirect state pointers */
 #define MI_BATCH_BUFFER_END     MI_INSTR(0x0a, 0)
+#define MI_SUSPEND_FLUSH        MI_INSTR(0x0b, 0)
+#define   MI_SUSPEND_FLUSH_EN   (1<<0)
 #define MI_REPORT_HEAD          MI_INSTR(0x07, 0)
 #define MI_OVERLAY_FLIP         MI_INSTR(0x11,0)
 #define   MI_OVERLAY_CONTINUE   (0x0<<21)
@@ -159,6 +161,7 @@
 #define   MI_MM_SPACE_PHYSICAL          (0<<8)
 #define   MI_SAVE_EXT_STATE_EN          (1<<3)
 #define   MI_RESTORE_EXT_STATE_EN       (1<<2)
+#define   MI_FORCE_RESTORE              (1<<1)
 #define   MI_RESTORE_INHIBIT            (1<<0)
 #define MI_STORE_DWORD_IMM      MI_INSTR(0x20, 1)
 #define   MI_MEM_VIRTUAL        (1 << 22) /* 965+ only */
@@ -1131,9 +1134,50 @@
 #define RCBMINAVG               0x111a0
 #define RCUPEI                  0x111b0
 #define RCDNEI                  0x111b4
-#define MCHBAR_RENDER_STANDBY           0x111b8
-#define   RCX_SW_EXIT           (1<<23)
-#define   RSX_STATUS_MASK       0x00700000
+#define RSTDBYCTL               0x111b8
+#define   RS1EN                 (1<<31)
+#define   RS2EN                 (1<<30)
+#define   RS3EN                 (1<<29)
+#define   D3RS3EN               (1<<28) /* Display D3 imlies RS3 */
+#define   SWPROMORSX            (1<<27) /* RSx promotion timers ignored */
+#define   RCWAKERW              (1<<26) /* Resetwarn from PCH causes wakeup */
+#define   DPRSLPVREN            (1<<25) /* Fast voltage ramp enable */
+#define   GFXTGHYST             (1<<24) /* Hysteresis to allow trunk gating */
+#define   RCX_SW_EXIT           (1<<23) /* Leave RSx and prevent re-entry */
+#define   RSX_STATUS_MASK       (7<<20)
+#define   RSX_STATUS_ON         (0<<20)
+#define   RSX_STATUS_RC1        (1<<20)
+#define   RSX_STATUS_RC1E       (2<<20)
+#define   RSX_STATUS_RS1        (3<<20)
+#define   RSX_STATUS_RS2        (4<<20) /* aka rc6 */
+#define   RSX_STATUS_RSVD       (5<<20) /* deep rc6 unsupported on ilk */
+#define   RSX_STATUS_RS3        (6<<20) /* rs3 unsupported on ilk */
+#define   RSX_STATUS_RSVD2      (7<<20)
+#define   UWRCRSXE              (1<<19) /* wake counter limit prevents rsx */
+#define   RSCRP                 (1<<18) /* rs requests control on rs1/2 reqs */
+#define   JRSC                  (1<<17) /* rsx coupled to cpu c-state */
+#define   RS2INC0               (1<<16) /* allow rs2 in cpu c0 */
+#define   RS1CONTSAV_MASK       (3<<14)
+#define   RS1CONTSAV_NO_RS1     (0<<14) /* rs1 doesn't save/restore context */
+#define   RS1CONTSAV_RSVD       (1<<14)
+#define   RS1CONTSAV_SAVE_RS1   (2<<14) /* rs1 saves context */
+#define   RS1CONTSAV_FULL_RS1   (3<<14) /* rs1 saves and restores context */
+#define   NORMSLEXLAT_MASK      (3<<12)
+#define   SLOW_RS123            (0<<12)
+#define   SLOW_RS23             (1<<12)
+#define   SLOW_RS3              (2<<12)
+#define   NORMAL_RS123          (3<<12)
+#define   RCMODE_TIMEOUT        (1<<11) /* 0 is eval interval method */
+#define   IMPROMOEN             (1<<10) /* promo is immediate or delayed until next idle interval (only for timeout method above) */
+#define   RCENTSYNC             (1<<9) /* rs coupled to cpu c-state (3/6/7) */
+#define   STATELOCK             (1<<7) /* locked to rs_cstate if 0 */
+#define   RS_CSTATE_MASK        (3<<4)
+#define   RS_CSTATE_C367_RS1    (0<<4)
+#define   RS_CSTATE_C36_RS1_C7_RS2 (1<<4)
+#define   RS_CSTATE_RSVD        (2<<4)
+#define   RS_CSTATE_C367_RS2    (3<<4)
+#define   REDSAVES              (1<<3) /* no context save if was idle during rs0 */
+#define   REDRESTORES           (1<<2) /* no restore if was idle during rs0 */
 #define VIDCTL                  0x111c0
 #define VIDSTS                  0x111c8
 #define VIDSTART                0x111cc /* 8 bits */