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path: root/drivers/gpu/drm/i915/i915_irq.c
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_irq.c')
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c24
1 files changed, 16 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index e3dd2d62c992..aa3180cf2921 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -285,10 +285,14 @@ void gen6_enable_rps_interrupts(struct drm_device *dev)
285 struct drm_i915_private *dev_priv = dev->dev_private; 285 struct drm_i915_private *dev_priv = dev->dev_private;
286 286
287 spin_lock_irq(&dev_priv->irq_lock); 287 spin_lock_irq(&dev_priv->irq_lock);
288
288 WARN_ON(dev_priv->rps.pm_iir); 289 WARN_ON(dev_priv->rps.pm_iir);
289 WARN_ON(I915_READ(gen6_pm_iir(dev_priv)) & dev_priv->pm_rps_events); 290 WARN_ON(I915_READ(gen6_pm_iir(dev_priv)) & dev_priv->pm_rps_events);
290 dev_priv->rps.interrupts_enabled = true; 291 dev_priv->rps.interrupts_enabled = true;
292 I915_WRITE(gen6_pm_ier(dev_priv), I915_READ(gen6_pm_ier(dev_priv)) |
293 dev_priv->pm_rps_events);
291 gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events); 294 gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);
295
292 spin_unlock_irq(&dev_priv->irq_lock); 296 spin_unlock_irq(&dev_priv->irq_lock);
293} 297}
294 298
@@ -3313,8 +3317,10 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev)
3313 GEN5_IRQ_INIT(GT, dev_priv->gt_irq_mask, gt_irqs); 3317 GEN5_IRQ_INIT(GT, dev_priv->gt_irq_mask, gt_irqs);
3314 3318
3315 if (INTEL_INFO(dev)->gen >= 6) { 3319 if (INTEL_INFO(dev)->gen >= 6) {
3316 pm_irqs |= dev_priv->pm_rps_events; 3320 /*
3317 3321 * RPS interrupts will get enabled/disabled on demand when RPS
3322 * itself is enabled/disabled.
3323 */
3318 if (HAS_VEBOX(dev)) 3324 if (HAS_VEBOX(dev))
3319 pm_irqs |= PM_VEBOX_USER_INTERRUPT; 3325 pm_irqs |= PM_VEBOX_USER_INTERRUPT;
3320 3326
@@ -3526,7 +3532,11 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
3526 dev_priv->pm_irq_mask = 0xffffffff; 3532 dev_priv->pm_irq_mask = 0xffffffff;
3527 GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]); 3533 GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]);
3528 GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]); 3534 GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]);
3529 GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, dev_priv->pm_rps_events); 3535 /*
3536 * RPS interrupts will get enabled/disabled on demand when RPS itself
3537 * is enabled/disabled.
3538 */
3539 GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, 0);
3530 GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]); 3540 GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]);
3531} 3541}
3532 3542
@@ -3615,7 +3625,7 @@ static void vlv_display_irq_uninstall(struct drm_i915_private *dev_priv)
3615 3625
3616 vlv_display_irq_reset(dev_priv); 3626 vlv_display_irq_reset(dev_priv);
3617 3627
3618 dev_priv->irq_mask = 0; 3628 dev_priv->irq_mask = ~0;
3619} 3629}
3620 3630
3621static void valleyview_irq_uninstall(struct drm_device *dev) 3631static void valleyview_irq_uninstall(struct drm_device *dev)
@@ -3721,8 +3731,6 @@ static bool i8xx_handle_vblank(struct drm_device *dev,
3721 if ((iir & flip_pending) == 0) 3731 if ((iir & flip_pending) == 0)
3722 goto check_page_flip; 3732 goto check_page_flip;
3723 3733
3724 intel_prepare_page_flip(dev, plane);
3725
3726 /* We detect FlipDone by looking for the change in PendingFlip from '1' 3734 /* We detect FlipDone by looking for the change in PendingFlip from '1'
3727 * to '0' on the following vblank, i.e. IIR has the Pendingflip 3735 * to '0' on the following vblank, i.e. IIR has the Pendingflip
3728 * asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence 3736 * asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence
@@ -3732,6 +3740,7 @@ static bool i8xx_handle_vblank(struct drm_device *dev,
3732 if (I915_READ16(ISR) & flip_pending) 3740 if (I915_READ16(ISR) & flip_pending)
3733 goto check_page_flip; 3741 goto check_page_flip;
3734 3742
3743 intel_prepare_page_flip(dev, plane);
3735 intel_finish_page_flip(dev, pipe); 3744 intel_finish_page_flip(dev, pipe);
3736 return true; 3745 return true;
3737 3746
@@ -3903,8 +3912,6 @@ static bool i915_handle_vblank(struct drm_device *dev,
3903 if ((iir & flip_pending) == 0) 3912 if ((iir & flip_pending) == 0)
3904 goto check_page_flip; 3913 goto check_page_flip;
3905 3914
3906 intel_prepare_page_flip(dev, plane);
3907
3908 /* We detect FlipDone by looking for the change in PendingFlip from '1' 3915 /* We detect FlipDone by looking for the change in PendingFlip from '1'
3909 * to '0' on the following vblank, i.e. IIR has the Pendingflip 3916 * to '0' on the following vblank, i.e. IIR has the Pendingflip
3910 * asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence 3917 * asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence
@@ -3914,6 +3921,7 @@ static bool i915_handle_vblank(struct drm_device *dev,
3914 if (I915_READ(ISR) & flip_pending) 3921 if (I915_READ(ISR) & flip_pending)
3915 goto check_page_flip; 3922 goto check_page_flip;
3916 3923
3924 intel_prepare_page_flip(dev, plane);
3917 intel_finish_page_flip(dev, pipe); 3925 intel_finish_page_flip(dev, pipe);
3918 return true; 3926 return true;
3919 3927