aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_gem_tiling.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_tiling.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c39
1 files changed, 19 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index b5c55d88ff76..4bdccefcf2cf 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -202,21 +202,17 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
202 * reg, so dont bother to check the size */ 202 * reg, so dont bother to check the size */
203 if (stride / 128 > I965_FENCE_MAX_PITCH_VAL) 203 if (stride / 128 > I965_FENCE_MAX_PITCH_VAL)
204 return false; 204 return false;
205 } else if (IS_I9XX(dev)) { 205 } else if (IS_GEN3(dev) || IS_GEN2(dev)) {
206 uint32_t pitch_val = ffs(stride / tile_width) - 1; 206 if (stride > 8192)
207
208 /* XXX: For Y tiling, FENCE_MAX_PITCH_VAL is actually 6 (8KB)
209 * instead of 4 (2KB) on 945s.
210 */
211 if (pitch_val > I915_FENCE_MAX_PITCH_VAL ||
212 size > (I830_FENCE_MAX_SIZE_VAL << 20))
213 return false; 207 return false;
214 } else {
215 uint32_t pitch_val = ffs(stride / tile_width) - 1;
216 208
217 if (pitch_val > I830_FENCE_MAX_PITCH_VAL || 209 if (IS_GEN3(dev)) {
218 size > (I830_FENCE_MAX_SIZE_VAL << 19)) 210 if (size > I830_FENCE_MAX_SIZE_VAL << 20)
219 return false; 211 return false;
212 } else {
213 if (size > I830_FENCE_MAX_SIZE_VAL << 19)
214 return false;
215 }
220 } 216 }
221 217
222 /* 965+ just needs multiples of tile width */ 218 /* 965+ just needs multiples of tile width */
@@ -240,7 +236,7 @@ bool
240i915_gem_object_fence_offset_ok(struct drm_gem_object *obj, int tiling_mode) 236i915_gem_object_fence_offset_ok(struct drm_gem_object *obj, int tiling_mode)
241{ 237{
242 struct drm_device *dev = obj->dev; 238 struct drm_device *dev = obj->dev;
243 struct drm_i915_gem_object *obj_priv = obj->driver_private; 239 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
244 240
245 if (obj_priv->gtt_space == NULL) 241 if (obj_priv->gtt_space == NULL)
246 return true; 242 return true;
@@ -280,7 +276,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
280 obj = drm_gem_object_lookup(dev, file_priv, args->handle); 276 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
281 if (obj == NULL) 277 if (obj == NULL)
282 return -EINVAL; 278 return -EINVAL;
283 obj_priv = obj->driver_private; 279 obj_priv = to_intel_bo(obj);
284 280
285 if (!i915_tiling_ok(dev, args->stride, obj->size, args->tiling_mode)) { 281 if (!i915_tiling_ok(dev, args->stride, obj->size, args->tiling_mode)) {
286 drm_gem_object_unreference_unlocked(obj); 282 drm_gem_object_unreference_unlocked(obj);
@@ -325,9 +321,12 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
325 * need to ensure that any fence register is cleared. 321 * need to ensure that any fence register is cleared.
326 */ 322 */
327 if (!i915_gem_object_fence_offset_ok(obj, args->tiling_mode)) 323 if (!i915_gem_object_fence_offset_ok(obj, args->tiling_mode))
328 ret = i915_gem_object_unbind(obj); 324 ret = i915_gem_object_unbind(obj);
325 else if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
326 ret = i915_gem_object_put_fence_reg(obj);
329 else 327 else
330 ret = i915_gem_object_put_fence_reg(obj); 328 i915_gem_release_mmap(obj);
329
331 if (ret != 0) { 330 if (ret != 0) {
332 WARN(ret != -ERESTARTSYS, 331 WARN(ret != -ERESTARTSYS,
333 "failed to reset object for tiling switch"); 332 "failed to reset object for tiling switch");
@@ -361,7 +360,7 @@ i915_gem_get_tiling(struct drm_device *dev, void *data,
361 obj = drm_gem_object_lookup(dev, file_priv, args->handle); 360 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
362 if (obj == NULL) 361 if (obj == NULL)
363 return -EINVAL; 362 return -EINVAL;
364 obj_priv = obj->driver_private; 363 obj_priv = to_intel_bo(obj);
365 364
366 mutex_lock(&dev->struct_mutex); 365 mutex_lock(&dev->struct_mutex);
367 366
@@ -424,7 +423,7 @@ i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj)
424{ 423{
425 struct drm_device *dev = obj->dev; 424 struct drm_device *dev = obj->dev;
426 drm_i915_private_t *dev_priv = dev->dev_private; 425 drm_i915_private_t *dev_priv = dev->dev_private;
427 struct drm_i915_gem_object *obj_priv = obj->driver_private; 426 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
428 int page_count = obj->size >> PAGE_SHIFT; 427 int page_count = obj->size >> PAGE_SHIFT;
429 int i; 428 int i;
430 429
@@ -453,7 +452,7 @@ i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj)
453{ 452{
454 struct drm_device *dev = obj->dev; 453 struct drm_device *dev = obj->dev;
455 drm_i915_private_t *dev_priv = dev->dev_private; 454 drm_i915_private_t *dev_priv = dev->dev_private;
456 struct drm_i915_gem_object *obj_priv = obj->driver_private; 455 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
457 int page_count = obj->size >> PAGE_SHIFT; 456 int page_count = obj->size >> PAGE_SHIFT;
458 int i; 457 int i;
459 458