diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index c11603b4cf1d..5f614828d365 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -3148,6 +3148,13 @@ static void i965_write_fence_reg(struct drm_device *dev, int reg, | |||
3148 | u32 size = i915_gem_obj_ggtt_size(obj); | 3148 | u32 size = i915_gem_obj_ggtt_size(obj); |
3149 | uint64_t val; | 3149 | uint64_t val; |
3150 | 3150 | ||
3151 | /* Adjust fence size to match tiled area */ | ||
3152 | if (obj->tiling_mode != I915_TILING_NONE) { | ||
3153 | uint32_t row_size = obj->stride * | ||
3154 | (obj->tiling_mode == I915_TILING_Y ? 32 : 8); | ||
3155 | size = (size / row_size) * row_size; | ||
3156 | } | ||
3157 | |||
3151 | val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) & | 3158 | val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) & |
3152 | 0xfffff000) << 32; | 3159 | 0xfffff000) << 32; |
3153 | val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000; | 3160 | val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000; |
@@ -4884,25 +4891,18 @@ i915_gem_init_hw(struct drm_device *dev) | |||
4884 | for (i = 0; i < NUM_L3_SLICES(dev); i++) | 4891 | for (i = 0; i < NUM_L3_SLICES(dev); i++) |
4885 | i915_gem_l3_remap(&dev_priv->ring[RCS], i); | 4892 | i915_gem_l3_remap(&dev_priv->ring[RCS], i); |
4886 | 4893 | ||
4887 | /* | 4894 | ret = i915_ppgtt_init_hw(dev); |
4888 | * XXX: Contexts should only be initialized once. Doing a switch to the | ||
4889 | * default context switch however is something we'd like to do after | ||
4890 | * reset or thaw (the latter may not actually be necessary for HW, but | ||
4891 | * goes with our code better). Context switching requires rings (for | ||
4892 | * the do_switch), but before enabling PPGTT. So don't move this. | ||
4893 | */ | ||
4894 | ret = i915_gem_context_enable(dev_priv); | ||
4895 | if (ret && ret != -EIO) { | 4895 | if (ret && ret != -EIO) { |
4896 | DRM_ERROR("Context enable failed %d\n", ret); | 4896 | DRM_ERROR("PPGTT enable failed %d\n", ret); |
4897 | i915_gem_cleanup_ringbuffer(dev); | 4897 | i915_gem_cleanup_ringbuffer(dev); |
4898 | |||
4899 | return ret; | ||
4900 | } | 4898 | } |
4901 | 4899 | ||
4902 | ret = i915_ppgtt_init_hw(dev); | 4900 | ret = i915_gem_context_enable(dev_priv); |
4903 | if (ret && ret != -EIO) { | 4901 | if (ret && ret != -EIO) { |
4904 | DRM_ERROR("PPGTT enable failed %d\n", ret); | 4902 | DRM_ERROR("Context enable failed %d\n", ret); |
4905 | i915_gem_cleanup_ringbuffer(dev); | 4903 | i915_gem_cleanup_ringbuffer(dev); |
4904 | |||
4905 | return ret; | ||
4906 | } | 4906 | } |
4907 | 4907 | ||
4908 | return ret; | 4908 | return ret; |
@@ -5155,7 +5155,7 @@ static bool mutex_is_locked_by(struct mutex *mutex, struct task_struct *task) | |||
5155 | if (!mutex_is_locked(mutex)) | 5155 | if (!mutex_is_locked(mutex)) |
5156 | return false; | 5156 | return false; |
5157 | 5157 | ||
5158 | #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_MUTEXES) | 5158 | #if defined(CONFIG_SMP) && !defined(CONFIG_DEBUG_MUTEXES) |
5159 | return mutex->owner == task; | 5159 | return mutex->owner == task; |
5160 | #else | 5160 | #else |
5161 | /* Since UP may be pre-empted, we cannot assume that we own the lock */ | 5161 | /* Since UP may be pre-empted, we cannot assume that we own the lock */ |