aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_gem.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fd099a1e9df0..64584009fca0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1819,7 +1819,7 @@ i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible)
1819 return -EIO; 1819 return -EIO;
1820 1820
1821 if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) { 1821 if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) {
1822 if (IS_IRONLAKE(dev)) 1822 if (HAS_PCH_SPLIT(dev))
1823 ier = I915_READ(DEIER) | I915_READ(GTIER); 1823 ier = I915_READ(DEIER) | I915_READ(GTIER);
1824 else 1824 else
1825 ier = I915_READ(IER); 1825 ier = I915_READ(IER);
@@ -2316,6 +2316,12 @@ static void i915_write_fence_reg(struct drm_i915_fence_reg *reg)
2316 pitch_val = obj_priv->stride / tile_width; 2316 pitch_val = obj_priv->stride / tile_width;
2317 pitch_val = ffs(pitch_val) - 1; 2317 pitch_val = ffs(pitch_val) - 1;
2318 2318
2319 if (obj_priv->tiling_mode == I915_TILING_Y &&
2320 HAS_128_BYTE_Y_TILING(dev))
2321 WARN_ON(pitch_val > I830_FENCE_MAX_PITCH_VAL);
2322 else
2323 WARN_ON(pitch_val > I915_FENCE_MAX_PITCH_VAL);
2324
2319 val = obj_priv->gtt_offset; 2325 val = obj_priv->gtt_offset;
2320 if (obj_priv->tiling_mode == I915_TILING_Y) 2326 if (obj_priv->tiling_mode == I915_TILING_Y)
2321 val |= 1 << I830_FENCE_TILING_Y_SHIFT; 2327 val |= 1 << I830_FENCE_TILING_Y_SHIFT;