diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 558 |
1 files changed, 340 insertions, 218 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index cdfb9da0e4ce..12bbd5eac70d 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -41,6 +41,9 @@ static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *o | |||
41 | static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj, | 41 | static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj, |
42 | bool force); | 42 | bool force); |
43 | static __must_check int | 43 | static __must_check int |
44 | i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj, | ||
45 | bool readonly); | ||
46 | static __must_check int | ||
44 | i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, | 47 | i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, |
45 | struct i915_address_space *vm, | 48 | struct i915_address_space *vm, |
46 | unsigned alignment, | 49 | unsigned alignment, |
@@ -61,8 +64,8 @@ static unsigned long i915_gem_inactive_count(struct shrinker *shrinker, | |||
61 | struct shrink_control *sc); | 64 | struct shrink_control *sc); |
62 | static unsigned long i915_gem_inactive_scan(struct shrinker *shrinker, | 65 | static unsigned long i915_gem_inactive_scan(struct shrinker *shrinker, |
63 | struct shrink_control *sc); | 66 | struct shrink_control *sc); |
64 | static long i915_gem_purge(struct drm_i915_private *dev_priv, long target); | 67 | static unsigned long i915_gem_purge(struct drm_i915_private *dev_priv, long target); |
65 | static long i915_gem_shrink_all(struct drm_i915_private *dev_priv); | 68 | static unsigned long i915_gem_shrink_all(struct drm_i915_private *dev_priv); |
66 | static void i915_gem_object_truncate(struct drm_i915_gem_object *obj); | 69 | static void i915_gem_object_truncate(struct drm_i915_gem_object *obj); |
67 | 70 | ||
68 | static bool cpu_cache_is_coherent(struct drm_device *dev, | 71 | static bool cpu_cache_is_coherent(struct drm_device *dev, |
@@ -258,7 +261,7 @@ i915_gem_dumb_create(struct drm_file *file, | |||
258 | struct drm_mode_create_dumb *args) | 261 | struct drm_mode_create_dumb *args) |
259 | { | 262 | { |
260 | /* have to work out size/pitch and return them */ | 263 | /* have to work out size/pitch and return them */ |
261 | args->pitch = ALIGN(args->width * ((args->bpp + 7) / 8), 64); | 264 | args->pitch = ALIGN(args->width * DIV_ROUND_UP(args->bpp, 8), 64); |
262 | args->size = args->pitch * args->height; | 265 | args->size = args->pitch * args->height; |
263 | return i915_gem_create(file, dev, | 266 | return i915_gem_create(file, dev, |
264 | args->size, &args->handle); | 267 | args->size, &args->handle); |
@@ -432,11 +435,9 @@ i915_gem_shmem_pread(struct drm_device *dev, | |||
432 | * optimizes for the case when the gpu will dirty the data | 435 | * optimizes for the case when the gpu will dirty the data |
433 | * anyway again before the next pread happens. */ | 436 | * anyway again before the next pread happens. */ |
434 | needs_clflush = !cpu_cache_is_coherent(dev, obj->cache_level); | 437 | needs_clflush = !cpu_cache_is_coherent(dev, obj->cache_level); |
435 | if (i915_gem_obj_bound_any(obj)) { | 438 | ret = i915_gem_object_wait_rendering(obj, true); |
436 | ret = i915_gem_object_set_to_gtt_domain(obj, false); | 439 | if (ret) |
437 | if (ret) | 440 | return ret; |
438 | return ret; | ||
439 | } | ||
440 | } | 441 | } |
441 | 442 | ||
442 | ret = i915_gem_object_get_pages(obj); | 443 | ret = i915_gem_object_get_pages(obj); |
@@ -748,11 +749,9 @@ i915_gem_shmem_pwrite(struct drm_device *dev, | |||
748 | * optimizes for the case when the gpu will use the data | 749 | * optimizes for the case when the gpu will use the data |
749 | * right away and we therefore have to clflush anyway. */ | 750 | * right away and we therefore have to clflush anyway. */ |
750 | needs_clflush_after = cpu_write_needs_clflush(obj); | 751 | needs_clflush_after = cpu_write_needs_clflush(obj); |
751 | if (i915_gem_obj_bound_any(obj)) { | 752 | ret = i915_gem_object_wait_rendering(obj, false); |
752 | ret = i915_gem_object_set_to_gtt_domain(obj, true); | 753 | if (ret) |
753 | if (ret) | 754 | return ret; |
754 | return ret; | ||
755 | } | ||
756 | } | 755 | } |
757 | /* Same trick applies to invalidate partially written cachelines read | 756 | /* Same trick applies to invalidate partially written cachelines read |
758 | * before writing. */ | 757 | * before writing. */ |
@@ -966,12 +965,31 @@ i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno) | |||
966 | BUG_ON(!mutex_is_locked(&ring->dev->struct_mutex)); | 965 | BUG_ON(!mutex_is_locked(&ring->dev->struct_mutex)); |
967 | 966 | ||
968 | ret = 0; | 967 | ret = 0; |
969 | if (seqno == ring->outstanding_lazy_request) | 968 | if (seqno == ring->outstanding_lazy_seqno) |
970 | ret = i915_add_request(ring, NULL); | 969 | ret = i915_add_request(ring, NULL); |
971 | 970 | ||
972 | return ret; | 971 | return ret; |
973 | } | 972 | } |
974 | 973 | ||
974 | static void fake_irq(unsigned long data) | ||
975 | { | ||
976 | wake_up_process((struct task_struct *)data); | ||
977 | } | ||
978 | |||
979 | static bool missed_irq(struct drm_i915_private *dev_priv, | ||
980 | struct intel_ring_buffer *ring) | ||
981 | { | ||
982 | return test_bit(ring->id, &dev_priv->gpu_error.missed_irq_rings); | ||
983 | } | ||
984 | |||
985 | static bool can_wait_boost(struct drm_i915_file_private *file_priv) | ||
986 | { | ||
987 | if (file_priv == NULL) | ||
988 | return true; | ||
989 | |||
990 | return !atomic_xchg(&file_priv->rps_wait_boost, true); | ||
991 | } | ||
992 | |||
975 | /** | 993 | /** |
976 | * __wait_seqno - wait until execution of seqno has finished | 994 | * __wait_seqno - wait until execution of seqno has finished |
977 | * @ring: the ring expected to report seqno | 995 | * @ring: the ring expected to report seqno |
@@ -992,13 +1010,14 @@ i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno) | |||
992 | */ | 1010 | */ |
993 | static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, | 1011 | static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, |
994 | unsigned reset_counter, | 1012 | unsigned reset_counter, |
995 | bool interruptible, struct timespec *timeout) | 1013 | bool interruptible, |
1014 | struct timespec *timeout, | ||
1015 | struct drm_i915_file_private *file_priv) | ||
996 | { | 1016 | { |
997 | drm_i915_private_t *dev_priv = ring->dev->dev_private; | 1017 | drm_i915_private_t *dev_priv = ring->dev->dev_private; |
998 | struct timespec before, now, wait_time={1,0}; | 1018 | struct timespec before, now; |
999 | unsigned long timeout_jiffies; | 1019 | DEFINE_WAIT(wait); |
1000 | long end; | 1020 | long timeout_jiffies; |
1001 | bool wait_forever = true; | ||
1002 | int ret; | 1021 | int ret; |
1003 | 1022 | ||
1004 | WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n"); | 1023 | WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n"); |
@@ -1006,51 +1025,79 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, | |||
1006 | if (i915_seqno_passed(ring->get_seqno(ring, true), seqno)) | 1025 | if (i915_seqno_passed(ring->get_seqno(ring, true), seqno)) |
1007 | return 0; | 1026 | return 0; |
1008 | 1027 | ||
1009 | trace_i915_gem_request_wait_begin(ring, seqno); | 1028 | timeout_jiffies = timeout ? timespec_to_jiffies_timeout(timeout) : 1; |
1010 | 1029 | ||
1011 | if (timeout != NULL) { | 1030 | if (dev_priv->info->gen >= 6 && can_wait_boost(file_priv)) { |
1012 | wait_time = *timeout; | 1031 | gen6_rps_boost(dev_priv); |
1013 | wait_forever = false; | 1032 | if (file_priv) |
1033 | mod_delayed_work(dev_priv->wq, | ||
1034 | &file_priv->mm.idle_work, | ||
1035 | msecs_to_jiffies(100)); | ||
1014 | } | 1036 | } |
1015 | 1037 | ||
1016 | timeout_jiffies = timespec_to_jiffies_timeout(&wait_time); | 1038 | if (!(dev_priv->gpu_error.test_irq_rings & intel_ring_flag(ring)) && |
1017 | 1039 | WARN_ON(!ring->irq_get(ring))) | |
1018 | if (WARN_ON(!ring->irq_get(ring))) | ||
1019 | return -ENODEV; | 1040 | return -ENODEV; |
1020 | 1041 | ||
1021 | /* Record current time in case interrupted by signal, or wedged * */ | 1042 | /* Record current time in case interrupted by signal, or wedged */ |
1043 | trace_i915_gem_request_wait_begin(ring, seqno); | ||
1022 | getrawmonotonic(&before); | 1044 | getrawmonotonic(&before); |
1045 | for (;;) { | ||
1046 | struct timer_list timer; | ||
1047 | unsigned long expire; | ||
1023 | 1048 | ||
1024 | #define EXIT_COND \ | 1049 | prepare_to_wait(&ring->irq_queue, &wait, |
1025 | (i915_seqno_passed(ring->get_seqno(ring, false), seqno) || \ | 1050 | interruptible ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE); |
1026 | i915_reset_in_progress(&dev_priv->gpu_error) || \ | ||
1027 | reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter)) | ||
1028 | do { | ||
1029 | if (interruptible) | ||
1030 | end = wait_event_interruptible_timeout(ring->irq_queue, | ||
1031 | EXIT_COND, | ||
1032 | timeout_jiffies); | ||
1033 | else | ||
1034 | end = wait_event_timeout(ring->irq_queue, EXIT_COND, | ||
1035 | timeout_jiffies); | ||
1036 | 1051 | ||
1037 | /* We need to check whether any gpu reset happened in between | 1052 | /* We need to check whether any gpu reset happened in between |
1038 | * the caller grabbing the seqno and now ... */ | 1053 | * the caller grabbing the seqno and now ... */ |
1039 | if (reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter)) | 1054 | if (reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter)) { |
1040 | end = -EAGAIN; | 1055 | /* ... but upgrade the -EAGAIN to an -EIO if the gpu |
1056 | * is truely gone. */ | ||
1057 | ret = i915_gem_check_wedge(&dev_priv->gpu_error, interruptible); | ||
1058 | if (ret == 0) | ||
1059 | ret = -EAGAIN; | ||
1060 | break; | ||
1061 | } | ||
1041 | 1062 | ||
1042 | /* ... but upgrade the -EGAIN to an -EIO if the gpu is truely | 1063 | if (i915_seqno_passed(ring->get_seqno(ring, false), seqno)) { |
1043 | * gone. */ | 1064 | ret = 0; |
1044 | ret = i915_gem_check_wedge(&dev_priv->gpu_error, interruptible); | 1065 | break; |
1045 | if (ret) | 1066 | } |
1046 | end = ret; | ||
1047 | } while (end == 0 && wait_forever); | ||
1048 | 1067 | ||
1068 | if (interruptible && signal_pending(current)) { | ||
1069 | ret = -ERESTARTSYS; | ||
1070 | break; | ||
1071 | } | ||
1072 | |||
1073 | if (timeout_jiffies <= 0) { | ||
1074 | ret = -ETIME; | ||
1075 | break; | ||
1076 | } | ||
1077 | |||
1078 | timer.function = NULL; | ||
1079 | if (timeout || missed_irq(dev_priv, ring)) { | ||
1080 | setup_timer_on_stack(&timer, fake_irq, (unsigned long)current); | ||
1081 | expire = jiffies + (missed_irq(dev_priv, ring) ? 1: timeout_jiffies); | ||
1082 | mod_timer(&timer, expire); | ||
1083 | } | ||
1084 | |||
1085 | io_schedule(); | ||
1086 | |||
1087 | if (timeout) | ||
1088 | timeout_jiffies = expire - jiffies; | ||
1089 | |||
1090 | if (timer.function) { | ||
1091 | del_singleshot_timer_sync(&timer); | ||
1092 | destroy_timer_on_stack(&timer); | ||
1093 | } | ||
1094 | } | ||
1049 | getrawmonotonic(&now); | 1095 | getrawmonotonic(&now); |
1096 | trace_i915_gem_request_wait_end(ring, seqno); | ||
1050 | 1097 | ||
1051 | ring->irq_put(ring); | 1098 | ring->irq_put(ring); |
1052 | trace_i915_gem_request_wait_end(ring, seqno); | 1099 | |
1053 | #undef EXIT_COND | 1100 | finish_wait(&ring->irq_queue, &wait); |
1054 | 1101 | ||
1055 | if (timeout) { | 1102 | if (timeout) { |
1056 | struct timespec sleep_time = timespec_sub(now, before); | 1103 | struct timespec sleep_time = timespec_sub(now, before); |
@@ -1059,17 +1106,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno, | |||
1059 | set_normalized_timespec(timeout, 0, 0); | 1106 | set_normalized_timespec(timeout, 0, 0); |
1060 | } | 1107 | } |
1061 | 1108 | ||
1062 | switch (end) { | 1109 | return ret; |
1063 | case -EIO: | ||
1064 | case -EAGAIN: /* Wedged */ | ||
1065 | case -ERESTARTSYS: /* Signal */ | ||
1066 | return (int)end; | ||
1067 | case 0: /* Timeout */ | ||
1068 | return -ETIME; | ||
1069 | default: /* Completed */ | ||
1070 | WARN_ON(end < 0); /* We're not aware of other errors */ | ||
1071 | return 0; | ||
1072 | } | ||
1073 | } | 1110 | } |
1074 | 1111 | ||
1075 | /** | 1112 | /** |
@@ -1097,7 +1134,7 @@ i915_wait_seqno(struct intel_ring_buffer *ring, uint32_t seqno) | |||
1097 | 1134 | ||
1098 | return __wait_seqno(ring, seqno, | 1135 | return __wait_seqno(ring, seqno, |
1099 | atomic_read(&dev_priv->gpu_error.reset_counter), | 1136 | atomic_read(&dev_priv->gpu_error.reset_counter), |
1100 | interruptible, NULL); | 1137 | interruptible, NULL, NULL); |
1101 | } | 1138 | } |
1102 | 1139 | ||
1103 | static int | 1140 | static int |
@@ -1147,6 +1184,7 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj, | |||
1147 | */ | 1184 | */ |
1148 | static __must_check int | 1185 | static __must_check int |
1149 | i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj, | 1186 | i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj, |
1187 | struct drm_file *file, | ||
1150 | bool readonly) | 1188 | bool readonly) |
1151 | { | 1189 | { |
1152 | struct drm_device *dev = obj->base.dev; | 1190 | struct drm_device *dev = obj->base.dev; |
@@ -1173,7 +1211,7 @@ i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj, | |||
1173 | 1211 | ||
1174 | reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter); | 1212 | reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter); |
1175 | mutex_unlock(&dev->struct_mutex); | 1213 | mutex_unlock(&dev->struct_mutex); |
1176 | ret = __wait_seqno(ring, seqno, reset_counter, true, NULL); | 1214 | ret = __wait_seqno(ring, seqno, reset_counter, true, NULL, file->driver_priv); |
1177 | mutex_lock(&dev->struct_mutex); | 1215 | mutex_lock(&dev->struct_mutex); |
1178 | if (ret) | 1216 | if (ret) |
1179 | return ret; | 1217 | return ret; |
@@ -1222,7 +1260,7 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data, | |||
1222 | * We will repeat the flush holding the lock in the normal manner | 1260 | * We will repeat the flush holding the lock in the normal manner |
1223 | * to catch cases where we are gazumped. | 1261 | * to catch cases where we are gazumped. |
1224 | */ | 1262 | */ |
1225 | ret = i915_gem_object_wait_rendering__nonblocking(obj, !write_domain); | 1263 | ret = i915_gem_object_wait_rendering__nonblocking(obj, file, !write_domain); |
1226 | if (ret) | 1264 | if (ret) |
1227 | goto unref; | 1265 | goto unref; |
1228 | 1266 | ||
@@ -1690,13 +1728,13 @@ i915_gem_object_put_pages(struct drm_i915_gem_object *obj) | |||
1690 | return 0; | 1728 | return 0; |
1691 | } | 1729 | } |
1692 | 1730 | ||
1693 | static long | 1731 | static unsigned long |
1694 | __i915_gem_shrink(struct drm_i915_private *dev_priv, long target, | 1732 | __i915_gem_shrink(struct drm_i915_private *dev_priv, long target, |
1695 | bool purgeable_only) | 1733 | bool purgeable_only) |
1696 | { | 1734 | { |
1697 | struct list_head still_bound_list; | 1735 | struct list_head still_bound_list; |
1698 | struct drm_i915_gem_object *obj, *next; | 1736 | struct drm_i915_gem_object *obj, *next; |
1699 | long count = 0; | 1737 | unsigned long count = 0; |
1700 | 1738 | ||
1701 | list_for_each_entry_safe(obj, next, | 1739 | list_for_each_entry_safe(obj, next, |
1702 | &dev_priv->mm.unbound_list, | 1740 | &dev_priv->mm.unbound_list, |
@@ -1762,13 +1800,13 @@ __i915_gem_shrink(struct drm_i915_private *dev_priv, long target, | |||
1762 | return count; | 1800 | return count; |
1763 | } | 1801 | } |
1764 | 1802 | ||
1765 | static long | 1803 | static unsigned long |
1766 | i915_gem_purge(struct drm_i915_private *dev_priv, long target) | 1804 | i915_gem_purge(struct drm_i915_private *dev_priv, long target) |
1767 | { | 1805 | { |
1768 | return __i915_gem_shrink(dev_priv, target, true); | 1806 | return __i915_gem_shrink(dev_priv, target, true); |
1769 | } | 1807 | } |
1770 | 1808 | ||
1771 | static long | 1809 | static unsigned long |
1772 | i915_gem_shrink_all(struct drm_i915_private *dev_priv) | 1810 | i915_gem_shrink_all(struct drm_i915_private *dev_priv) |
1773 | { | 1811 | { |
1774 | struct drm_i915_gem_object *obj, *next; | 1812 | struct drm_i915_gem_object *obj, *next; |
@@ -1778,9 +1816,8 @@ i915_gem_shrink_all(struct drm_i915_private *dev_priv) | |||
1778 | 1816 | ||
1779 | list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list, | 1817 | list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list, |
1780 | global_list) { | 1818 | global_list) { |
1781 | if (obj->pages_pin_count == 0) | 1819 | if (i915_gem_object_put_pages(obj) == 0) |
1782 | freed += obj->base.size >> PAGE_SHIFT; | 1820 | freed += obj->base.size >> PAGE_SHIFT; |
1783 | i915_gem_object_put_pages(obj); | ||
1784 | } | 1821 | } |
1785 | return freed; | 1822 | return freed; |
1786 | } | 1823 | } |
@@ -1865,6 +1902,9 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj) | |||
1865 | sg->length += PAGE_SIZE; | 1902 | sg->length += PAGE_SIZE; |
1866 | } | 1903 | } |
1867 | last_pfn = page_to_pfn(page); | 1904 | last_pfn = page_to_pfn(page); |
1905 | |||
1906 | /* Check that the i965g/gm workaround works. */ | ||
1907 | WARN_ON((gfp & __GFP_DMA32) && (last_pfn >= 0x00100000UL)); | ||
1868 | } | 1908 | } |
1869 | #ifdef CONFIG_SWIOTLB | 1909 | #ifdef CONFIG_SWIOTLB |
1870 | if (!swiotlb_nr_tbl()) | 1910 | if (!swiotlb_nr_tbl()) |
@@ -1918,7 +1958,7 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj) | |||
1918 | return 0; | 1958 | return 0; |
1919 | } | 1959 | } |
1920 | 1960 | ||
1921 | void | 1961 | static void |
1922 | i915_gem_object_move_to_active(struct drm_i915_gem_object *obj, | 1962 | i915_gem_object_move_to_active(struct drm_i915_gem_object *obj, |
1923 | struct intel_ring_buffer *ring) | 1963 | struct intel_ring_buffer *ring) |
1924 | { | 1964 | { |
@@ -1957,6 +1997,13 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj, | |||
1957 | } | 1997 | } |
1958 | } | 1998 | } |
1959 | 1999 | ||
2000 | void i915_vma_move_to_active(struct i915_vma *vma, | ||
2001 | struct intel_ring_buffer *ring) | ||
2002 | { | ||
2003 | list_move_tail(&vma->mm_list, &vma->vm->active_list); | ||
2004 | return i915_gem_object_move_to_active(vma->obj, ring); | ||
2005 | } | ||
2006 | |||
1960 | static void | 2007 | static void |
1961 | i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj) | 2008 | i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj) |
1962 | { | 2009 | { |
@@ -2078,11 +2125,10 @@ int __i915_add_request(struct intel_ring_buffer *ring, | |||
2078 | if (ret) | 2125 | if (ret) |
2079 | return ret; | 2126 | return ret; |
2080 | 2127 | ||
2081 | request = kmalloc(sizeof(*request), GFP_KERNEL); | 2128 | request = ring->preallocated_lazy_request; |
2082 | if (request == NULL) | 2129 | if (WARN_ON(request == NULL)) |
2083 | return -ENOMEM; | 2130 | return -ENOMEM; |
2084 | 2131 | ||
2085 | |||
2086 | /* Record the position of the start of the request so that | 2132 | /* Record the position of the start of the request so that |
2087 | * should we detect the updated seqno part-way through the | 2133 | * should we detect the updated seqno part-way through the |
2088 | * GPU processing the request, we never over-estimate the | 2134 | * GPU processing the request, we never over-estimate the |
@@ -2091,17 +2137,13 @@ int __i915_add_request(struct intel_ring_buffer *ring, | |||
2091 | request_ring_position = intel_ring_get_tail(ring); | 2137 | request_ring_position = intel_ring_get_tail(ring); |
2092 | 2138 | ||
2093 | ret = ring->add_request(ring); | 2139 | ret = ring->add_request(ring); |
2094 | if (ret) { | 2140 | if (ret) |
2095 | kfree(request); | ||
2096 | return ret; | 2141 | return ret; |
2097 | } | ||
2098 | 2142 | ||
2099 | request->seqno = intel_ring_get_seqno(ring); | 2143 | request->seqno = intel_ring_get_seqno(ring); |
2100 | request->ring = ring; | 2144 | request->ring = ring; |
2101 | request->head = request_start; | 2145 | request->head = request_start; |
2102 | request->tail = request_ring_position; | 2146 | request->tail = request_ring_position; |
2103 | request->ctx = ring->last_context; | ||
2104 | request->batch_obj = obj; | ||
2105 | 2147 | ||
2106 | /* Whilst this request exists, batch_obj will be on the | 2148 | /* Whilst this request exists, batch_obj will be on the |
2107 | * active_list, and so will hold the active reference. Only when this | 2149 | * active_list, and so will hold the active reference. Only when this |
@@ -2109,7 +2151,12 @@ int __i915_add_request(struct intel_ring_buffer *ring, | |||
2109 | * inactive_list and lose its active reference. Hence we do not need | 2151 | * inactive_list and lose its active reference. Hence we do not need |
2110 | * to explicitly hold another reference here. | 2152 | * to explicitly hold another reference here. |
2111 | */ | 2153 | */ |
2154 | request->batch_obj = obj; | ||
2112 | 2155 | ||
2156 | /* Hold a reference to the current context so that we can inspect | ||
2157 | * it later in case a hangcheck error event fires. | ||
2158 | */ | ||
2159 | request->ctx = ring->last_context; | ||
2113 | if (request->ctx) | 2160 | if (request->ctx) |
2114 | i915_gem_context_reference(request->ctx); | 2161 | i915_gem_context_reference(request->ctx); |
2115 | 2162 | ||
@@ -2129,12 +2176,14 @@ int __i915_add_request(struct intel_ring_buffer *ring, | |||
2129 | } | 2176 | } |
2130 | 2177 | ||
2131 | trace_i915_gem_request_add(ring, request->seqno); | 2178 | trace_i915_gem_request_add(ring, request->seqno); |
2132 | ring->outstanding_lazy_request = 0; | 2179 | ring->outstanding_lazy_seqno = 0; |
2180 | ring->preallocated_lazy_request = NULL; | ||
2133 | 2181 | ||
2134 | if (!dev_priv->ums.mm_suspended) { | 2182 | if (!dev_priv->ums.mm_suspended) { |
2135 | i915_queue_hangcheck(ring->dev); | 2183 | i915_queue_hangcheck(ring->dev); |
2136 | 2184 | ||
2137 | if (was_empty) { | 2185 | if (was_empty) { |
2186 | cancel_delayed_work_sync(&dev_priv->mm.idle_work); | ||
2138 | queue_delayed_work(dev_priv->wq, | 2187 | queue_delayed_work(dev_priv->wq, |
2139 | &dev_priv->mm.retire_work, | 2188 | &dev_priv->mm.retire_work, |
2140 | round_jiffies_up_relative(HZ)); | 2189 | round_jiffies_up_relative(HZ)); |
@@ -2156,10 +2205,8 @@ i915_gem_request_remove_from_client(struct drm_i915_gem_request *request) | |||
2156 | return; | 2205 | return; |
2157 | 2206 | ||
2158 | spin_lock(&file_priv->mm.lock); | 2207 | spin_lock(&file_priv->mm.lock); |
2159 | if (request->file_priv) { | 2208 | list_del(&request->client_list); |
2160 | list_del(&request->client_list); | 2209 | request->file_priv = NULL; |
2161 | request->file_priv = NULL; | ||
2162 | } | ||
2163 | spin_unlock(&file_priv->mm.lock); | 2210 | spin_unlock(&file_priv->mm.lock); |
2164 | } | 2211 | } |
2165 | 2212 | ||
@@ -2224,6 +2271,21 @@ static bool i915_request_guilty(struct drm_i915_gem_request *request, | |||
2224 | return false; | 2271 | return false; |
2225 | } | 2272 | } |
2226 | 2273 | ||
2274 | static bool i915_context_is_banned(const struct i915_ctx_hang_stats *hs) | ||
2275 | { | ||
2276 | const unsigned long elapsed = get_seconds() - hs->guilty_ts; | ||
2277 | |||
2278 | if (hs->banned) | ||
2279 | return true; | ||
2280 | |||
2281 | if (elapsed <= DRM_I915_CTX_BAN_PERIOD) { | ||
2282 | DRM_ERROR("context hanging too fast, declaring banned!\n"); | ||
2283 | return true; | ||
2284 | } | ||
2285 | |||
2286 | return false; | ||
2287 | } | ||
2288 | |||
2227 | static void i915_set_reset_status(struct intel_ring_buffer *ring, | 2289 | static void i915_set_reset_status(struct intel_ring_buffer *ring, |
2228 | struct drm_i915_gem_request *request, | 2290 | struct drm_i915_gem_request *request, |
2229 | u32 acthd) | 2291 | u32 acthd) |
@@ -2260,10 +2322,13 @@ static void i915_set_reset_status(struct intel_ring_buffer *ring, | |||
2260 | hs = &request->file_priv->hang_stats; | 2322 | hs = &request->file_priv->hang_stats; |
2261 | 2323 | ||
2262 | if (hs) { | 2324 | if (hs) { |
2263 | if (guilty) | 2325 | if (guilty) { |
2326 | hs->banned = i915_context_is_banned(hs); | ||
2264 | hs->batch_active++; | 2327 | hs->batch_active++; |
2265 | else | 2328 | hs->guilty_ts = get_seconds(); |
2329 | } else { | ||
2266 | hs->batch_pending++; | 2330 | hs->batch_pending++; |
2331 | } | ||
2267 | } | 2332 | } |
2268 | } | 2333 | } |
2269 | 2334 | ||
@@ -2341,6 +2406,8 @@ void i915_gem_reset(struct drm_device *dev) | |||
2341 | for_each_ring(ring, dev_priv, i) | 2406 | for_each_ring(ring, dev_priv, i) |
2342 | i915_gem_reset_ring_lists(dev_priv, ring); | 2407 | i915_gem_reset_ring_lists(dev_priv, ring); |
2343 | 2408 | ||
2409 | i915_gem_cleanup_ringbuffer(dev); | ||
2410 | |||
2344 | i915_gem_restore_fences(dev); | 2411 | i915_gem_restore_fences(dev); |
2345 | } | 2412 | } |
2346 | 2413 | ||
@@ -2405,57 +2472,53 @@ i915_gem_retire_requests_ring(struct intel_ring_buffer *ring) | |||
2405 | WARN_ON(i915_verify_lists(ring->dev)); | 2472 | WARN_ON(i915_verify_lists(ring->dev)); |
2406 | } | 2473 | } |
2407 | 2474 | ||
2408 | void | 2475 | bool |
2409 | i915_gem_retire_requests(struct drm_device *dev) | 2476 | i915_gem_retire_requests(struct drm_device *dev) |
2410 | { | 2477 | { |
2411 | drm_i915_private_t *dev_priv = dev->dev_private; | 2478 | drm_i915_private_t *dev_priv = dev->dev_private; |
2412 | struct intel_ring_buffer *ring; | 2479 | struct intel_ring_buffer *ring; |
2480 | bool idle = true; | ||
2413 | int i; | 2481 | int i; |
2414 | 2482 | ||
2415 | for_each_ring(ring, dev_priv, i) | 2483 | for_each_ring(ring, dev_priv, i) { |
2416 | i915_gem_retire_requests_ring(ring); | 2484 | i915_gem_retire_requests_ring(ring); |
2485 | idle &= list_empty(&ring->request_list); | ||
2486 | } | ||
2487 | |||
2488 | if (idle) | ||
2489 | mod_delayed_work(dev_priv->wq, | ||
2490 | &dev_priv->mm.idle_work, | ||
2491 | msecs_to_jiffies(100)); | ||
2492 | |||
2493 | return idle; | ||
2417 | } | 2494 | } |
2418 | 2495 | ||
2419 | static void | 2496 | static void |
2420 | i915_gem_retire_work_handler(struct work_struct *work) | 2497 | i915_gem_retire_work_handler(struct work_struct *work) |
2421 | { | 2498 | { |
2422 | drm_i915_private_t *dev_priv; | 2499 | struct drm_i915_private *dev_priv = |
2423 | struct drm_device *dev; | 2500 | container_of(work, typeof(*dev_priv), mm.retire_work.work); |
2424 | struct intel_ring_buffer *ring; | 2501 | struct drm_device *dev = dev_priv->dev; |
2425 | bool idle; | 2502 | bool idle; |
2426 | int i; | ||
2427 | |||
2428 | dev_priv = container_of(work, drm_i915_private_t, | ||
2429 | mm.retire_work.work); | ||
2430 | dev = dev_priv->dev; | ||
2431 | 2503 | ||
2432 | /* Come back later if the device is busy... */ | 2504 | /* Come back later if the device is busy... */ |
2433 | if (!mutex_trylock(&dev->struct_mutex)) { | 2505 | idle = false; |
2434 | queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, | 2506 | if (mutex_trylock(&dev->struct_mutex)) { |
2435 | round_jiffies_up_relative(HZ)); | 2507 | idle = i915_gem_retire_requests(dev); |
2436 | return; | 2508 | mutex_unlock(&dev->struct_mutex); |
2437 | } | ||
2438 | |||
2439 | i915_gem_retire_requests(dev); | ||
2440 | |||
2441 | /* Send a periodic flush down the ring so we don't hold onto GEM | ||
2442 | * objects indefinitely. | ||
2443 | */ | ||
2444 | idle = true; | ||
2445 | for_each_ring(ring, dev_priv, i) { | ||
2446 | if (ring->gpu_caches_dirty) | ||
2447 | i915_add_request(ring, NULL); | ||
2448 | |||
2449 | idle &= list_empty(&ring->request_list); | ||
2450 | } | 2509 | } |
2451 | 2510 | if (!idle) | |
2452 | if (!dev_priv->ums.mm_suspended && !idle) | ||
2453 | queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, | 2511 | queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, |
2454 | round_jiffies_up_relative(HZ)); | 2512 | round_jiffies_up_relative(HZ)); |
2455 | if (idle) | 2513 | } |
2456 | intel_mark_idle(dev); | ||
2457 | 2514 | ||
2458 | mutex_unlock(&dev->struct_mutex); | 2515 | static void |
2516 | i915_gem_idle_work_handler(struct work_struct *work) | ||
2517 | { | ||
2518 | struct drm_i915_private *dev_priv = | ||
2519 | container_of(work, typeof(*dev_priv), mm.idle_work.work); | ||
2520 | |||
2521 | intel_mark_idle(dev_priv->dev); | ||
2459 | } | 2522 | } |
2460 | 2523 | ||
2461 | /** | 2524 | /** |
@@ -2553,7 +2616,7 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file) | |||
2553 | reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter); | 2616 | reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter); |
2554 | mutex_unlock(&dev->struct_mutex); | 2617 | mutex_unlock(&dev->struct_mutex); |
2555 | 2618 | ||
2556 | ret = __wait_seqno(ring, seqno, reset_counter, true, timeout); | 2619 | ret = __wait_seqno(ring, seqno, reset_counter, true, timeout, file->driver_priv); |
2557 | if (timeout) | 2620 | if (timeout) |
2558 | args->timeout_ns = timespec_to_ns(timeout); | 2621 | args->timeout_ns = timespec_to_ns(timeout); |
2559 | return ret; | 2622 | return ret; |
@@ -2600,6 +2663,7 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj, | |||
2600 | if (ret) | 2663 | if (ret) |
2601 | return ret; | 2664 | return ret; |
2602 | 2665 | ||
2666 | trace_i915_gem_ring_sync_to(from, to, seqno); | ||
2603 | ret = to->sync_to(to, from, seqno); | 2667 | ret = to->sync_to(to, from, seqno); |
2604 | if (!ret) | 2668 | if (!ret) |
2605 | /* We use last_read_seqno because sync_to() | 2669 | /* We use last_read_seqno because sync_to() |
@@ -2641,11 +2705,17 @@ int i915_vma_unbind(struct i915_vma *vma) | |||
2641 | drm_i915_private_t *dev_priv = obj->base.dev->dev_private; | 2705 | drm_i915_private_t *dev_priv = obj->base.dev->dev_private; |
2642 | int ret; | 2706 | int ret; |
2643 | 2707 | ||
2708 | /* For now we only ever use 1 vma per object */ | ||
2709 | WARN_ON(!list_is_singular(&obj->vma_list)); | ||
2710 | |||
2644 | if (list_empty(&vma->vma_link)) | 2711 | if (list_empty(&vma->vma_link)) |
2645 | return 0; | 2712 | return 0; |
2646 | 2713 | ||
2647 | if (!drm_mm_node_allocated(&vma->node)) | 2714 | if (!drm_mm_node_allocated(&vma->node)) { |
2648 | goto destroy; | 2715 | i915_gem_vma_destroy(vma); |
2716 | |||
2717 | return 0; | ||
2718 | } | ||
2649 | 2719 | ||
2650 | if (obj->pin_count) | 2720 | if (obj->pin_count) |
2651 | return -EBUSY; | 2721 | return -EBUSY; |
@@ -2685,13 +2755,10 @@ int i915_vma_unbind(struct i915_vma *vma) | |||
2685 | 2755 | ||
2686 | drm_mm_remove_node(&vma->node); | 2756 | drm_mm_remove_node(&vma->node); |
2687 | 2757 | ||
2688 | destroy: | ||
2689 | i915_gem_vma_destroy(vma); | 2758 | i915_gem_vma_destroy(vma); |
2690 | 2759 | ||
2691 | /* Since the unbound list is global, only move to that list if | 2760 | /* Since the unbound list is global, only move to that list if |
2692 | * no more VMAs exist. | 2761 | * no more VMAs exist. */ |
2693 | * NB: Until we have real VMAs there will only ever be one */ | ||
2694 | WARN_ON(!list_empty(&obj->vma_list)); | ||
2695 | if (list_empty(&obj->vma_list)) | 2762 | if (list_empty(&obj->vma_list)) |
2696 | list_move_tail(&obj->global_list, &dev_priv->mm.unbound_list); | 2763 | list_move_tail(&obj->global_list, &dev_priv->mm.unbound_list); |
2697 | 2764 | ||
@@ -2887,6 +2954,7 @@ static void i915_gem_write_fence(struct drm_device *dev, int reg, | |||
2887 | obj->stride, obj->tiling_mode); | 2954 | obj->stride, obj->tiling_mode); |
2888 | 2955 | ||
2889 | switch (INTEL_INFO(dev)->gen) { | 2956 | switch (INTEL_INFO(dev)->gen) { |
2957 | case 8: | ||
2890 | case 7: | 2958 | case 7: |
2891 | case 6: | 2959 | case 6: |
2892 | case 5: | 2960 | case 5: |
@@ -3389,8 +3457,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write) | |||
3389 | 3457 | ||
3390 | /* And bump the LRU for this access */ | 3458 | /* And bump the LRU for this access */ |
3391 | if (i915_gem_object_is_inactive(obj)) { | 3459 | if (i915_gem_object_is_inactive(obj)) { |
3392 | struct i915_vma *vma = i915_gem_obj_to_vma(obj, | 3460 | struct i915_vma *vma = i915_gem_obj_to_ggtt(obj); |
3393 | &dev_priv->gtt.base); | ||
3394 | if (vma) | 3461 | if (vma) |
3395 | list_move_tail(&vma->mm_list, | 3462 | list_move_tail(&vma->mm_list, |
3396 | &dev_priv->gtt.base.inactive_list); | 3463 | &dev_priv->gtt.base.inactive_list); |
@@ -3761,7 +3828,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file) | |||
3761 | if (seqno == 0) | 3828 | if (seqno == 0) |
3762 | return 0; | 3829 | return 0; |
3763 | 3830 | ||
3764 | ret = __wait_seqno(ring, seqno, reset_counter, true, NULL); | 3831 | ret = __wait_seqno(ring, seqno, reset_counter, true, NULL, NULL); |
3765 | if (ret == 0) | 3832 | if (ret == 0) |
3766 | queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, 0); | 3833 | queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, 0); |
3767 | 3834 | ||
@@ -3865,6 +3932,11 @@ i915_gem_pin_ioctl(struct drm_device *dev, void *data, | |||
3865 | goto out; | 3932 | goto out; |
3866 | } | 3933 | } |
3867 | 3934 | ||
3935 | if (obj->user_pin_count == ULONG_MAX) { | ||
3936 | ret = -EBUSY; | ||
3937 | goto out; | ||
3938 | } | ||
3939 | |||
3868 | if (obj->user_pin_count == 0) { | 3940 | if (obj->user_pin_count == 0) { |
3869 | ret = i915_gem_obj_ggtt_pin(obj, args->alignment, true, false); | 3941 | ret = i915_gem_obj_ggtt_pin(obj, args->alignment, true, false); |
3870 | if (ret) | 3942 | if (ret) |
@@ -4015,7 +4087,6 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj, | |||
4015 | { | 4087 | { |
4016 | INIT_LIST_HEAD(&obj->global_list); | 4088 | INIT_LIST_HEAD(&obj->global_list); |
4017 | INIT_LIST_HEAD(&obj->ring_list); | 4089 | INIT_LIST_HEAD(&obj->ring_list); |
4018 | INIT_LIST_HEAD(&obj->exec_list); | ||
4019 | INIT_LIST_HEAD(&obj->obj_exec_link); | 4090 | INIT_LIST_HEAD(&obj->obj_exec_link); |
4020 | INIT_LIST_HEAD(&obj->vma_list); | 4091 | INIT_LIST_HEAD(&obj->vma_list); |
4021 | 4092 | ||
@@ -4087,13 +4158,6 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev, | |||
4087 | return obj; | 4158 | return obj; |
4088 | } | 4159 | } |
4089 | 4160 | ||
4090 | int i915_gem_init_object(struct drm_gem_object *obj) | ||
4091 | { | ||
4092 | BUG(); | ||
4093 | |||
4094 | return 0; | ||
4095 | } | ||
4096 | |||
4097 | void i915_gem_free_object(struct drm_gem_object *gem_obj) | 4161 | void i915_gem_free_object(struct drm_gem_object *gem_obj) |
4098 | { | 4162 | { |
4099 | struct drm_i915_gem_object *obj = to_intel_bo(gem_obj); | 4163 | struct drm_i915_gem_object *obj = to_intel_bo(gem_obj); |
@@ -4147,9 +4211,20 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj) | |||
4147 | i915_gem_object_free(obj); | 4211 | i915_gem_object_free(obj); |
4148 | } | 4212 | } |
4149 | 4213 | ||
4150 | struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj, | 4214 | struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj, |
4151 | struct i915_address_space *vm) | 4215 | struct i915_address_space *vm) |
4152 | { | 4216 | { |
4217 | struct i915_vma *vma; | ||
4218 | list_for_each_entry(vma, &obj->vma_list, vma_link) | ||
4219 | if (vma->vm == vm) | ||
4220 | return vma; | ||
4221 | |||
4222 | return NULL; | ||
4223 | } | ||
4224 | |||
4225 | static struct i915_vma *__i915_gem_vma_create(struct drm_i915_gem_object *obj, | ||
4226 | struct i915_address_space *vm) | ||
4227 | { | ||
4153 | struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_KERNEL); | 4228 | struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_KERNEL); |
4154 | if (vma == NULL) | 4229 | if (vma == NULL) |
4155 | return ERR_PTR(-ENOMEM); | 4230 | return ERR_PTR(-ENOMEM); |
@@ -4169,76 +4244,103 @@ struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj, | |||
4169 | return vma; | 4244 | return vma; |
4170 | } | 4245 | } |
4171 | 4246 | ||
4247 | struct i915_vma * | ||
4248 | i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj, | ||
4249 | struct i915_address_space *vm) | ||
4250 | { | ||
4251 | struct i915_vma *vma; | ||
4252 | |||
4253 | vma = i915_gem_obj_to_vma(obj, vm); | ||
4254 | if (!vma) | ||
4255 | vma = __i915_gem_vma_create(obj, vm); | ||
4256 | |||
4257 | return vma; | ||
4258 | } | ||
4259 | |||
4172 | void i915_gem_vma_destroy(struct i915_vma *vma) | 4260 | void i915_gem_vma_destroy(struct i915_vma *vma) |
4173 | { | 4261 | { |
4174 | WARN_ON(vma->node.allocated); | 4262 | WARN_ON(vma->node.allocated); |
4263 | |||
4264 | /* Keep the vma as a placeholder in the execbuffer reservation lists */ | ||
4265 | if (!list_empty(&vma->exec_list)) | ||
4266 | return; | ||
4267 | |||
4175 | list_del(&vma->vma_link); | 4268 | list_del(&vma->vma_link); |
4269 | |||
4176 | kfree(vma); | 4270 | kfree(vma); |
4177 | } | 4271 | } |
4178 | 4272 | ||
4179 | int | 4273 | int |
4180 | i915_gem_idle(struct drm_device *dev) | 4274 | i915_gem_suspend(struct drm_device *dev) |
4181 | { | 4275 | { |
4182 | drm_i915_private_t *dev_priv = dev->dev_private; | 4276 | drm_i915_private_t *dev_priv = dev->dev_private; |
4183 | int ret; | 4277 | int ret = 0; |
4184 | 4278 | ||
4185 | if (dev_priv->ums.mm_suspended) { | 4279 | mutex_lock(&dev->struct_mutex); |
4186 | mutex_unlock(&dev->struct_mutex); | 4280 | if (dev_priv->ums.mm_suspended) |
4187 | return 0; | 4281 | goto err; |
4188 | } | ||
4189 | 4282 | ||
4190 | ret = i915_gpu_idle(dev); | 4283 | ret = i915_gpu_idle(dev); |
4191 | if (ret) { | 4284 | if (ret) |
4192 | mutex_unlock(&dev->struct_mutex); | 4285 | goto err; |
4193 | return ret; | 4286 | |
4194 | } | ||
4195 | i915_gem_retire_requests(dev); | 4287 | i915_gem_retire_requests(dev); |
4196 | 4288 | ||
4197 | /* Under UMS, be paranoid and evict. */ | 4289 | /* Under UMS, be paranoid and evict. */ |
4198 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) | 4290 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) |
4199 | i915_gem_evict_everything(dev); | 4291 | i915_gem_evict_everything(dev); |
4200 | 4292 | ||
4201 | del_timer_sync(&dev_priv->gpu_error.hangcheck_timer); | ||
4202 | |||
4203 | i915_kernel_lost_context(dev); | 4293 | i915_kernel_lost_context(dev); |
4204 | i915_gem_cleanup_ringbuffer(dev); | 4294 | i915_gem_cleanup_ringbuffer(dev); |
4205 | 4295 | ||
4206 | /* Cancel the retire work handler, which should be idle now. */ | 4296 | /* Hack! Don't let anybody do execbuf while we don't control the chip. |
4297 | * We need to replace this with a semaphore, or something. | ||
4298 | * And not confound ums.mm_suspended! | ||
4299 | */ | ||
4300 | dev_priv->ums.mm_suspended = !drm_core_check_feature(dev, | ||
4301 | DRIVER_MODESET); | ||
4302 | mutex_unlock(&dev->struct_mutex); | ||
4303 | |||
4304 | del_timer_sync(&dev_priv->gpu_error.hangcheck_timer); | ||
4207 | cancel_delayed_work_sync(&dev_priv->mm.retire_work); | 4305 | cancel_delayed_work_sync(&dev_priv->mm.retire_work); |
4306 | cancel_delayed_work_sync(&dev_priv->mm.idle_work); | ||
4208 | 4307 | ||
4209 | return 0; | 4308 | return 0; |
4309 | |||
4310 | err: | ||
4311 | mutex_unlock(&dev->struct_mutex); | ||
4312 | return ret; | ||
4210 | } | 4313 | } |
4211 | 4314 | ||
4212 | void i915_gem_l3_remap(struct drm_device *dev) | 4315 | int i915_gem_l3_remap(struct intel_ring_buffer *ring, int slice) |
4213 | { | 4316 | { |
4317 | struct drm_device *dev = ring->dev; | ||
4214 | drm_i915_private_t *dev_priv = dev->dev_private; | 4318 | drm_i915_private_t *dev_priv = dev->dev_private; |
4215 | u32 misccpctl; | 4319 | u32 reg_base = GEN7_L3LOG_BASE + (slice * 0x200); |
4216 | int i; | 4320 | u32 *remap_info = dev_priv->l3_parity.remap_info[slice]; |
4217 | 4321 | int i, ret; | |
4218 | if (!HAS_L3_GPU_CACHE(dev)) | ||
4219 | return; | ||
4220 | 4322 | ||
4221 | if (!dev_priv->l3_parity.remap_info) | 4323 | if (!HAS_L3_DPF(dev) || !remap_info) |
4222 | return; | 4324 | return 0; |
4223 | 4325 | ||
4224 | misccpctl = I915_READ(GEN7_MISCCPCTL); | 4326 | ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3); |
4225 | I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE); | 4327 | if (ret) |
4226 | POSTING_READ(GEN7_MISCCPCTL); | 4328 | return ret; |
4227 | 4329 | ||
4330 | /* | ||
4331 | * Note: We do not worry about the concurrent register cacheline hang | ||
4332 | * here because no other code should access these registers other than | ||
4333 | * at initialization time. | ||
4334 | */ | ||
4228 | for (i = 0; i < GEN7_L3LOG_SIZE; i += 4) { | 4335 | for (i = 0; i < GEN7_L3LOG_SIZE; i += 4) { |
4229 | u32 remap = I915_READ(GEN7_L3LOG_BASE + i); | 4336 | intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); |
4230 | if (remap && remap != dev_priv->l3_parity.remap_info[i/4]) | 4337 | intel_ring_emit(ring, reg_base + i); |
4231 | DRM_DEBUG("0x%x was already programmed to %x\n", | 4338 | intel_ring_emit(ring, remap_info[i/4]); |
4232 | GEN7_L3LOG_BASE + i, remap); | ||
4233 | if (remap && !dev_priv->l3_parity.remap_info[i/4]) | ||
4234 | DRM_DEBUG_DRIVER("Clearing remapped register\n"); | ||
4235 | I915_WRITE(GEN7_L3LOG_BASE + i, dev_priv->l3_parity.remap_info[i/4]); | ||
4236 | } | 4339 | } |
4237 | 4340 | ||
4238 | /* Make sure all the writes land before disabling dop clock gating */ | 4341 | intel_ring_advance(ring); |
4239 | POSTING_READ(GEN7_L3LOG_BASE); | ||
4240 | 4342 | ||
4241 | I915_WRITE(GEN7_MISCCPCTL, misccpctl); | 4343 | return ret; |
4242 | } | 4344 | } |
4243 | 4345 | ||
4244 | void i915_gem_init_swizzling(struct drm_device *dev) | 4346 | void i915_gem_init_swizzling(struct drm_device *dev) |
@@ -4260,6 +4362,8 @@ void i915_gem_init_swizzling(struct drm_device *dev) | |||
4260 | I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB)); | 4362 | I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB)); |
4261 | else if (IS_GEN7(dev)) | 4363 | else if (IS_GEN7(dev)) |
4262 | I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB)); | 4364 | I915_WRITE(ARB_MODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB)); |
4365 | else if (IS_GEN8(dev)) | ||
4366 | I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW)); | ||
4263 | else | 4367 | else |
4264 | BUG(); | 4368 | BUG(); |
4265 | } | 4369 | } |
@@ -4330,7 +4434,7 @@ int | |||
4330 | i915_gem_init_hw(struct drm_device *dev) | 4434 | i915_gem_init_hw(struct drm_device *dev) |
4331 | { | 4435 | { |
4332 | drm_i915_private_t *dev_priv = dev->dev_private; | 4436 | drm_i915_private_t *dev_priv = dev->dev_private; |
4333 | int ret; | 4437 | int ret, i; |
4334 | 4438 | ||
4335 | if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt()) | 4439 | if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt()) |
4336 | return -EIO; | 4440 | return -EIO; |
@@ -4338,20 +4442,26 @@ i915_gem_init_hw(struct drm_device *dev) | |||
4338 | if (dev_priv->ellc_size) | 4442 | if (dev_priv->ellc_size) |
4339 | I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf)); | 4443 | I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf)); |
4340 | 4444 | ||
4445 | if (IS_HSW_GT3(dev)) | ||
4446 | I915_WRITE(MI_PREDICATE_RESULT_2, LOWER_SLICE_ENABLED); | ||
4447 | else | ||
4448 | I915_WRITE(MI_PREDICATE_RESULT_2, LOWER_SLICE_DISABLED); | ||
4449 | |||
4341 | if (HAS_PCH_NOP(dev)) { | 4450 | if (HAS_PCH_NOP(dev)) { |
4342 | u32 temp = I915_READ(GEN7_MSG_CTL); | 4451 | u32 temp = I915_READ(GEN7_MSG_CTL); |
4343 | temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK); | 4452 | temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK); |
4344 | I915_WRITE(GEN7_MSG_CTL, temp); | 4453 | I915_WRITE(GEN7_MSG_CTL, temp); |
4345 | } | 4454 | } |
4346 | 4455 | ||
4347 | i915_gem_l3_remap(dev); | ||
4348 | |||
4349 | i915_gem_init_swizzling(dev); | 4456 | i915_gem_init_swizzling(dev); |
4350 | 4457 | ||
4351 | ret = i915_gem_init_rings(dev); | 4458 | ret = i915_gem_init_rings(dev); |
4352 | if (ret) | 4459 | if (ret) |
4353 | return ret; | 4460 | return ret; |
4354 | 4461 | ||
4462 | for (i = 0; i < NUM_L3_SLICES(dev); i++) | ||
4463 | i915_gem_l3_remap(&dev_priv->ring[RCS], i); | ||
4464 | |||
4355 | /* | 4465 | /* |
4356 | * XXX: There was some w/a described somewhere suggesting loading | 4466 | * XXX: There was some w/a described somewhere suggesting loading |
4357 | * contexts before PPGTT. | 4467 | * contexts before PPGTT. |
@@ -4454,26 +4564,12 @@ int | |||
4454 | i915_gem_leavevt_ioctl(struct drm_device *dev, void *data, | 4564 | i915_gem_leavevt_ioctl(struct drm_device *dev, void *data, |
4455 | struct drm_file *file_priv) | 4565 | struct drm_file *file_priv) |
4456 | { | 4566 | { |
4457 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
4458 | int ret; | ||
4459 | |||
4460 | if (drm_core_check_feature(dev, DRIVER_MODESET)) | 4567 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
4461 | return 0; | 4568 | return 0; |
4462 | 4569 | ||
4463 | drm_irq_uninstall(dev); | 4570 | drm_irq_uninstall(dev); |
4464 | 4571 | ||
4465 | mutex_lock(&dev->struct_mutex); | 4572 | return i915_gem_suspend(dev); |
4466 | ret = i915_gem_idle(dev); | ||
4467 | |||
4468 | /* Hack! Don't let anybody do execbuf while we don't control the chip. | ||
4469 | * We need to replace this with a semaphore, or something. | ||
4470 | * And not confound ums.mm_suspended! | ||
4471 | */ | ||
4472 | if (ret != 0) | ||
4473 | dev_priv->ums.mm_suspended = 1; | ||
4474 | mutex_unlock(&dev->struct_mutex); | ||
4475 | |||
4476 | return ret; | ||
4477 | } | 4573 | } |
4478 | 4574 | ||
4479 | void | 4575 | void |
@@ -4484,11 +4580,9 @@ i915_gem_lastclose(struct drm_device *dev) | |||
4484 | if (drm_core_check_feature(dev, DRIVER_MODESET)) | 4580 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
4485 | return; | 4581 | return; |
4486 | 4582 | ||
4487 | mutex_lock(&dev->struct_mutex); | 4583 | ret = i915_gem_suspend(dev); |
4488 | ret = i915_gem_idle(dev); | ||
4489 | if (ret) | 4584 | if (ret) |
4490 | DRM_ERROR("failed to idle hardware: %d\n", ret); | 4585 | DRM_ERROR("failed to idle hardware: %d\n", ret); |
4491 | mutex_unlock(&dev->struct_mutex); | ||
4492 | } | 4586 | } |
4493 | 4587 | ||
4494 | static void | 4588 | static void |
@@ -4523,6 +4617,7 @@ i915_gem_load(struct drm_device *dev) | |||
4523 | INIT_LIST_HEAD(&dev_priv->vm_list); | 4617 | INIT_LIST_HEAD(&dev_priv->vm_list); |
4524 | i915_init_vm(dev_priv, &dev_priv->gtt.base); | 4618 | i915_init_vm(dev_priv, &dev_priv->gtt.base); |
4525 | 4619 | ||
4620 | INIT_LIST_HEAD(&dev_priv->context_list); | ||
4526 | INIT_LIST_HEAD(&dev_priv->mm.unbound_list); | 4621 | INIT_LIST_HEAD(&dev_priv->mm.unbound_list); |
4527 | INIT_LIST_HEAD(&dev_priv->mm.bound_list); | 4622 | INIT_LIST_HEAD(&dev_priv->mm.bound_list); |
4528 | INIT_LIST_HEAD(&dev_priv->mm.fence_list); | 4623 | INIT_LIST_HEAD(&dev_priv->mm.fence_list); |
@@ -4532,6 +4627,8 @@ i915_gem_load(struct drm_device *dev) | |||
4532 | INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list); | 4627 | INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list); |
4533 | INIT_DELAYED_WORK(&dev_priv->mm.retire_work, | 4628 | INIT_DELAYED_WORK(&dev_priv->mm.retire_work, |
4534 | i915_gem_retire_work_handler); | 4629 | i915_gem_retire_work_handler); |
4630 | INIT_DELAYED_WORK(&dev_priv->mm.idle_work, | ||
4631 | i915_gem_idle_work_handler); | ||
4535 | init_waitqueue_head(&dev_priv->gpu_error.reset_queue); | 4632 | init_waitqueue_head(&dev_priv->gpu_error.reset_queue); |
4536 | 4633 | ||
4537 | /* On GEN3 we really need to make sure the ARB C3 LP bit is set */ | 4634 | /* On GEN3 we really need to make sure the ARB C3 LP bit is set */ |
@@ -4582,7 +4679,7 @@ static int i915_gem_init_phys_object(struct drm_device *dev, | |||
4582 | if (dev_priv->mm.phys_objs[id - 1] || !size) | 4679 | if (dev_priv->mm.phys_objs[id - 1] || !size) |
4583 | return 0; | 4680 | return 0; |
4584 | 4681 | ||
4585 | phys_obj = kzalloc(sizeof(struct drm_i915_gem_phys_object), GFP_KERNEL); | 4682 | phys_obj = kzalloc(sizeof(*phys_obj), GFP_KERNEL); |
4586 | if (!phys_obj) | 4683 | if (!phys_obj) |
4587 | return -ENOMEM; | 4684 | return -ENOMEM; |
4588 | 4685 | ||
@@ -4756,6 +4853,8 @@ void i915_gem_release(struct drm_device *dev, struct drm_file *file) | |||
4756 | { | 4853 | { |
4757 | struct drm_i915_file_private *file_priv = file->driver_priv; | 4854 | struct drm_i915_file_private *file_priv = file->driver_priv; |
4758 | 4855 | ||
4856 | cancel_delayed_work_sync(&file_priv->mm.idle_work); | ||
4857 | |||
4759 | /* Clean up our request list when the client is going away, so that | 4858 | /* Clean up our request list when the client is going away, so that |
4760 | * later retire_requests won't dereference our soon-to-be-gone | 4859 | * later retire_requests won't dereference our soon-to-be-gone |
4761 | * file_priv. | 4860 | * file_priv. |
@@ -4773,6 +4872,38 @@ void i915_gem_release(struct drm_device *dev, struct drm_file *file) | |||
4773 | spin_unlock(&file_priv->mm.lock); | 4872 | spin_unlock(&file_priv->mm.lock); |
4774 | } | 4873 | } |
4775 | 4874 | ||
4875 | static void | ||
4876 | i915_gem_file_idle_work_handler(struct work_struct *work) | ||
4877 | { | ||
4878 | struct drm_i915_file_private *file_priv = | ||
4879 | container_of(work, typeof(*file_priv), mm.idle_work.work); | ||
4880 | |||
4881 | atomic_set(&file_priv->rps_wait_boost, false); | ||
4882 | } | ||
4883 | |||
4884 | int i915_gem_open(struct drm_device *dev, struct drm_file *file) | ||
4885 | { | ||
4886 | struct drm_i915_file_private *file_priv; | ||
4887 | |||
4888 | DRM_DEBUG_DRIVER("\n"); | ||
4889 | |||
4890 | file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL); | ||
4891 | if (!file_priv) | ||
4892 | return -ENOMEM; | ||
4893 | |||
4894 | file->driver_priv = file_priv; | ||
4895 | file_priv->dev_priv = dev->dev_private; | ||
4896 | |||
4897 | spin_lock_init(&file_priv->mm.lock); | ||
4898 | INIT_LIST_HEAD(&file_priv->mm.request_list); | ||
4899 | INIT_DELAYED_WORK(&file_priv->mm.idle_work, | ||
4900 | i915_gem_file_idle_work_handler); | ||
4901 | |||
4902 | idr_init(&file_priv->context_idr); | ||
4903 | |||
4904 | return 0; | ||
4905 | } | ||
4906 | |||
4776 | static bool mutex_is_locked_by(struct mutex *mutex, struct task_struct *task) | 4907 | static bool mutex_is_locked_by(struct mutex *mutex, struct task_struct *task) |
4777 | { | 4908 | { |
4778 | if (!mutex_is_locked(mutex)) | 4909 | if (!mutex_is_locked(mutex)) |
@@ -4823,6 +4954,7 @@ i915_gem_inactive_count(struct shrinker *shrinker, struct shrink_control *sc) | |||
4823 | 4954 | ||
4824 | if (unlock) | 4955 | if (unlock) |
4825 | mutex_unlock(&dev->struct_mutex); | 4956 | mutex_unlock(&dev->struct_mutex); |
4957 | |||
4826 | return count; | 4958 | return count; |
4827 | } | 4959 | } |
4828 | 4960 | ||
@@ -4859,11 +4991,10 @@ bool i915_gem_obj_bound(struct drm_i915_gem_object *o, | |||
4859 | 4991 | ||
4860 | bool i915_gem_obj_bound_any(struct drm_i915_gem_object *o) | 4992 | bool i915_gem_obj_bound_any(struct drm_i915_gem_object *o) |
4861 | { | 4993 | { |
4862 | struct drm_i915_private *dev_priv = o->base.dev->dev_private; | 4994 | struct i915_vma *vma; |
4863 | struct i915_address_space *vm; | ||
4864 | 4995 | ||
4865 | list_for_each_entry(vm, &dev_priv->vm_list, global_link) | 4996 | list_for_each_entry(vma, &o->vma_list, vma_link) |
4866 | if (i915_gem_obj_bound(o, vm)) | 4997 | if (drm_mm_node_allocated(&vma->node)) |
4867 | return true; | 4998 | return true; |
4868 | 4999 | ||
4869 | return false; | 5000 | return false; |
@@ -4895,7 +5026,6 @@ i915_gem_inactive_scan(struct shrinker *shrinker, struct shrink_control *sc) | |||
4895 | struct drm_i915_private, | 5026 | struct drm_i915_private, |
4896 | mm.inactive_shrinker); | 5027 | mm.inactive_shrinker); |
4897 | struct drm_device *dev = dev_priv->dev; | 5028 | struct drm_device *dev = dev_priv->dev; |
4898 | int nr_to_scan = sc->nr_to_scan; | ||
4899 | unsigned long freed; | 5029 | unsigned long freed; |
4900 | bool unlock = true; | 5030 | bool unlock = true; |
4901 | 5031 | ||
@@ -4909,38 +5039,30 @@ i915_gem_inactive_scan(struct shrinker *shrinker, struct shrink_control *sc) | |||
4909 | unlock = false; | 5039 | unlock = false; |
4910 | } | 5040 | } |
4911 | 5041 | ||
4912 | freed = i915_gem_purge(dev_priv, nr_to_scan); | 5042 | freed = i915_gem_purge(dev_priv, sc->nr_to_scan); |
4913 | if (freed < nr_to_scan) | 5043 | if (freed < sc->nr_to_scan) |
4914 | freed += __i915_gem_shrink(dev_priv, nr_to_scan, | 5044 | freed += __i915_gem_shrink(dev_priv, |
4915 | false); | 5045 | sc->nr_to_scan - freed, |
4916 | if (freed < nr_to_scan) | 5046 | false); |
5047 | if (freed < sc->nr_to_scan) | ||
4917 | freed += i915_gem_shrink_all(dev_priv); | 5048 | freed += i915_gem_shrink_all(dev_priv); |
4918 | 5049 | ||
4919 | if (unlock) | 5050 | if (unlock) |
4920 | mutex_unlock(&dev->struct_mutex); | 5051 | mutex_unlock(&dev->struct_mutex); |
5052 | |||
4921 | return freed; | 5053 | return freed; |
4922 | } | 5054 | } |
4923 | 5055 | ||
4924 | struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj, | 5056 | struct i915_vma *i915_gem_obj_to_ggtt(struct drm_i915_gem_object *obj) |
4925 | struct i915_address_space *vm) | ||
4926 | { | 5057 | { |
4927 | struct i915_vma *vma; | 5058 | struct i915_vma *vma; |
4928 | list_for_each_entry(vma, &obj->vma_list, vma_link) | ||
4929 | if (vma->vm == vm) | ||
4930 | return vma; | ||
4931 | 5059 | ||
4932 | return NULL; | 5060 | if (WARN_ON(list_empty(&obj->vma_list))) |
4933 | } | 5061 | return NULL; |
4934 | |||
4935 | struct i915_vma * | ||
4936 | i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj, | ||
4937 | struct i915_address_space *vm) | ||
4938 | { | ||
4939 | struct i915_vma *vma; | ||
4940 | 5062 | ||
4941 | vma = i915_gem_obj_to_vma(obj, vm); | 5063 | vma = list_first_entry(&obj->vma_list, typeof(*vma), vma_link); |
4942 | if (!vma) | 5064 | if (WARN_ON(vma->vm != obj_to_ggtt(obj))) |
4943 | vma = i915_gem_vma_create(obj, vm); | 5065 | return NULL; |
4944 | 5066 | ||
4945 | return vma; | 5067 | return vma; |
4946 | } | 5068 | } |