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path: root/drivers/gpu/drm/i915/i915_drv.h
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d147ab2f5bfc..2e1744d37ad5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -215,6 +215,7 @@ enum no_fbc_reason {
215 FBC_MODE_TOO_LARGE, /* mode too large for compression */ 215 FBC_MODE_TOO_LARGE, /* mode too large for compression */
216 FBC_BAD_PLANE, /* fbc not supported on plane */ 216 FBC_BAD_PLANE, /* fbc not supported on plane */
217 FBC_NOT_TILED, /* buffer not tiled */ 217 FBC_NOT_TILED, /* buffer not tiled */
218 FBC_MULTIPLE_PIPES, /* more than one pipe active */
218}; 219};
219 220
220enum intel_pch { 221enum intel_pch {
@@ -222,6 +223,8 @@ enum intel_pch {
222 PCH_CPT, /* Cougarpoint PCH */ 223 PCH_CPT, /* Cougarpoint PCH */
223}; 224};
224 225
226#define QUIRK_PIPEA_FORCE (1<<0)
227
225struct intel_fbdev; 228struct intel_fbdev;
226 229
227typedef struct drm_i915_private { 230typedef struct drm_i915_private {
@@ -337,6 +340,8 @@ typedef struct drm_i915_private {
337 /* PCH chipset type */ 340 /* PCH chipset type */
338 enum intel_pch pch_type; 341 enum intel_pch pch_type;
339 342
343 unsigned long quirks;
344
340 /* Register state */ 345 /* Register state */
341 bool modeset_on_lid; 346 bool modeset_on_lid;
342 u8 saveLBB; 347 u8 saveLBB;