1 files changed, 337 insertions, 97 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6dbe14cc4f74..eb91e2dd7914 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -32,6 +32,7 @@
 #include "drm.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
+#include "intel_drv.h"
 
 #include <linux/console.h>
 #include "drm_crtc_helper.h"
@@ -42,18 +43,39 @@ module_param_named(modeset, i915_modeset, int, 0400);
 unsigned int i915_fbpercrtc = 0;
 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
 
+int i915_panel_ignore_lid = 0;
+module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600);
+
 unsigned int i915_powersave = 1;
-module_param_named(powersave, i915_powersave, int, 0400);
+module_param_named(powersave, i915_powersave, int, 0600);
+
+unsigned int i915_semaphores = 0;
+module_param_named(semaphores, i915_semaphores, int, 0600);
+
+unsigned int i915_enable_rc6 = 0;
+module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);
+
+unsigned int i915_enable_fbc = 0;
+module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
 
 unsigned int i915_lvds_downclock = 0;
 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
 
+unsigned int i915_panel_use_ssc = 1;
+module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
+
+int i915_vbt_sdvo_panel_type = -1;
+module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
+
+static bool i915_try_reset = true;
+module_param_named(reset, i915_try_reset, bool, 0600);
+
 static struct drm_driver driver;
 extern int intel_agp_enabled;
 
 #define INTEL_VGA_DEVICE(id, info) {            \
         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
-        .class_mask = 0xffff00,                 \
+        .class_mask = 0xff0000,                 \
         .vendor = 0x8086,                       \
         .device = id,                           \
         .subvendor = PCI_ANY_ID,                \
@@ -61,86 +83,127 @@ extern int intel_agp_enabled;
         .driver_data = (unsigned long) info }
 
 static const struct intel_device_info intel_i830_info = {
-        .gen = 2, .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
+        .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1,
+        .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_845g_info = {
-        .gen = 2, .is_i8xx = 1,
+        .gen = 2,
+        .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i85x_info = {
-        .gen = 2, .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
+        .gen = 2, .is_i85x = 1, .is_mobile = 1,
         .cursor_needs_physical = 1,
+        .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i865g_info = {
-        .gen = 2, .is_i8xx = 1,
+        .gen = 2,
+        .has_overlay = 1, .overlay_needs_physical = 1,
 };
 
 static const struct intel_device_info intel_i915g_info = {
-        .gen = 3, .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
+        .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1,
+        .has_overlay = 1, .overlay_needs_physical = 1,
 };
 static const struct intel_device_info intel_i915gm_info = {
-        .gen = 3, .is_i9xx = 1,  .is_mobile = 1,
+        .gen = 3, .is_mobile = 1,
         .cursor_needs_physical = 1,
+        .has_overlay = 1, .overlay_needs_physical = 1,
+        .supports_tv = 1,
 };
 static const struct intel_device_info intel_i945g_info = {
-        .gen = 3, .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
+        .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1,
+        .has_overlay = 1, .overlay_needs_physical = 1,
 };
 static const struct intel_device_info intel_i945gm_info = {
-        .gen = 3, .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
+        .gen = 3, .is_i945gm = 1, .is_mobile = 1,
         .has_hotplug = 1, .cursor_needs_physical = 1,
+        .has_overlay = 1, .overlay_needs_physical = 1,
+        .supports_tv = 1,
 };
 
 static const struct intel_device_info intel_i965g_info = {
-        .gen = 4, .is_broadwater = 1, .is_i965g = 1, .is_i9xx = 1,
+        .gen = 4, .is_broadwater = 1,
         .has_hotplug = 1,
+        .has_overlay = 1,
 };
 
 static const struct intel_device_info intel_i965gm_info = {
-        .gen = 4, .is_crestline = 1, .is_i965g = 1, .is_i965gm = 1, .is_i9xx = 1,
-        .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
+        .gen = 4, .is_crestline = 1,
+        .is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
+        .has_overlay = 1,
+        .supports_tv = 1,
 };
 
 static const struct intel_device_info intel_g33_info = {
-        .gen = 3, .is_g33 = 1, .is_i9xx = 1,
+        .gen = 3, .is_g33 = 1,
         .need_gfx_hws = 1, .has_hotplug = 1,
+        .has_overlay = 1,
 };
 
 static const struct intel_device_info intel_g45_info = {
-        .gen = 4, .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
+        .gen = 4, .is_g4x = 1, .need_gfx_hws = 1,
         .has_pipe_cxsr = 1, .has_hotplug = 1,
+        .has_bsd_ring = 1,
 };
 
 static const struct intel_device_info intel_gm45_info = {
-        .gen = 4, .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1,
-        .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
+        .gen = 4, .is_g4x = 1,
+        .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
         .has_pipe_cxsr = 1, .has_hotplug = 1,
+        .supports_tv = 1,
+        .has_bsd_ring = 1,
 };
 
 static const struct intel_device_info intel_pineview_info = {
-        .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
+        .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1,
         .need_gfx_hws = 1, .has_hotplug = 1,
+        .has_overlay = 1,
 };
 
 static const struct intel_device_info intel_ironlake_d_info = {
-        .gen = 5, .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1,
+        .gen = 5,
         .need_gfx_hws = 1, .has_pipe_cxsr = 1, .has_hotplug = 1,
+        .has_bsd_ring = 1,
 };
 
 static const struct intel_device_info intel_ironlake_m_info = {
-        .gen = 5, .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
-        .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
+        .gen = 5, .is_mobile = 1,
+        .need_gfx_hws = 1, .has_hotplug = 1,
+        .has_fbc = 1,
+        .has_bsd_ring = 1,
 };
 
 static const struct intel_device_info intel_sandybridge_d_info = {
-        .gen = 6, .is_i965g = 1, .is_i9xx = 1,
+        .gen = 6,
         .need_gfx_hws = 1, .has_hotplug = 1,
+        .has_bsd_ring = 1,
+        .has_blt_ring = 1,
 };
 
 static const struct intel_device_info intel_sandybridge_m_info = {
-        .gen = 6, .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1,
+        .gen = 6, .is_mobile = 1,
         .need_gfx_hws = 1, .has_hotplug = 1,
+        .has_fbc = 1,
+        .has_bsd_ring = 1,
+        .has_blt_ring = 1,
+};
+
+static const struct intel_device_info intel_ivybridge_d_info = {
+        .is_ivybridge = 1, .gen = 7,
+        .need_gfx_hws = 1, .has_hotplug = 1,
+        .has_bsd_ring = 1,
+        .has_blt_ring = 1,
+};
+
+static const struct intel_device_info intel_ivybridge_m_info = {
+        .is_ivybridge = 1, .gen = 7, .is_mobile = 1,
+        .need_gfx_hws = 1, .has_hotplug = 1,
+        .has_fbc = 0,   /* FBC is not enabled on Ivybridge mobile yet */
+        .has_bsd_ring = 1,
+        .has_blt_ring = 1,
 };
 
 static const struct pci_device_id pciidlist[] = {               /* aka */
@@ -182,6 +245,11 @@ static const struct pci_device_id pciidlist[] = {		/* aka */
         INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
         INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
         INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
+        INTEL_VGA_DEVICE(0x0156, &intel_ivybridge_m_info), /* GT1 mobile */
+        INTEL_VGA_DEVICE(0x0166, &intel_ivybridge_m_info), /* GT2 mobile */
+        INTEL_VGA_DEVICE(0x0152, &intel_ivybridge_d_info), /* GT1 desktop */
+        INTEL_VGA_DEVICE(0x0162, &intel_ivybridge_d_info), /* GT2 desktop */
+        INTEL_VGA_DEVICE(0x015a, &intel_ivybridge_d_info), /* GT1 server */
         {0, 0, 0}
 };
 
@@ -190,7 +258,9 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
 #endif
 
 #define INTEL_PCH_DEVICE_ID_MASK        0xff00
+#define INTEL_PCH_IBX_DEVICE_ID_TYPE    0x3b00
 #define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
+#define INTEL_PCH_PPT_DEVICE_ID_TYPE    0x1e00
 
 void intel_detect_pch (struct drm_device *dev)
 {
@@ -209,19 +279,86 @@ void intel_detect_pch (struct drm_device *dev)
                         int id;
                         id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 
-                        if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
+                        if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
+                                dev_priv->pch_type = PCH_IBX;
+                                DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
+                        } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
                                 dev_priv->pch_type = PCH_CPT;
                                 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
+                        } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
+                                /* PantherPoint is CPT compatible */
+                                dev_priv->pch_type = PCH_CPT;
+                                DRM_DEBUG_KMS("Found PatherPoint PCH\n");
                         }
                 }
                 pci_dev_put(pch);
         }
 }
 
+static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
+{
+        int count;
+
+        count = 0;
+        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
+                udelay(10);
+
+        I915_WRITE_NOTRACE(FORCEWAKE, 1);
+        POSTING_READ(FORCEWAKE);
+
+        count = 0;
+        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
+                udelay(10);
+}
+
+/*
+ * Generally this is called implicitly by the register read function. However,
+ * if some sequence requires the GT to not power down then this function should
+ * be called at the beginning of the sequence followed by a call to
+ * gen6_gt_force_wake_put() at the end of the sequence.
+ */
+void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
+{
+        WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
+
+        /* Forcewake is atomic in case we get in here without the lock */
+        if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)
+                __gen6_gt_force_wake_get(dev_priv);
+}
+
+static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
+{
+        I915_WRITE_NOTRACE(FORCEWAKE, 0);
+        POSTING_READ(FORCEWAKE);
+}
+
+/*
+ * see gen6_gt_force_wake_get()
+ */
+void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
+{
+        WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
+
+        if (atomic_dec_and_test(&dev_priv->forcewake_count))
+                __gen6_gt_force_wake_put(dev_priv);
+}
+
+void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
+{
+        int loop = 500;
+        u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+        while (fifo < 20 && loop--) {
+                udelay(10);
+                fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+        }
+}
+
 static int i915_drm_freeze(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
 
+        drm_kms_helper_poll_disable(dev);
+
         pci_save_state(dev->pdev);
 
         /* If KMS is active, we do the leavevt stuff here */
@@ -237,7 +374,7 @@ static int i915_drm_freeze(struct drm_device *dev)
 
         i915_save_state(dev);
 
-        intel_opregion_free(dev, 1);
+        intel_opregion_fini(dev);
 
         /* Modeset on resume, not lid events */
         dev_priv->modeset_on_lid = 0;
@@ -258,6 +395,10 @@ int i915_suspend(struct drm_device *dev, pm_message_t state)
         if (state.event == PM_EVENT_PRETHAW)
                 return 0;
 
+
+        if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+                return 0;
+
         error = i915_drm_freeze(dev);
         if (error)
                 return error;
@@ -276,9 +417,14 @@ static int i915_drm_thaw(struct drm_device *dev)
         struct drm_i915_private *dev_priv = dev->dev_private;
         int error = 0;
 
-        i915_restore_state(dev);
+        if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+                mutex_lock(&dev->struct_mutex);
+                i915_gem_restore_gtt_mappings(dev);
+                mutex_unlock(&dev->struct_mutex);
+        }
 
-        intel_opregion_init(dev, 1);
+        i915_restore_state(dev);
+        intel_opregion_setup(dev);
 
         /* KMS EnterVT equivalent */
         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
@@ -288,12 +434,18 @@ static int i915_drm_thaw(struct drm_device *dev)
                 error = i915_gem_init_ringbuffer(dev);
                 mutex_unlock(&dev->struct_mutex);
 
+                drm_mode_config_reset(dev);
                 drm_irq_install(dev);
 
                 /* Resume the modeset for every activated CRTC */
                 drm_helper_resume_force_mode(dev);
+
+                if (IS_IRONLAKE_M(dev))
+                        ironlake_enable_rc6(dev);
         }
 
+        intel_opregion_init(dev);
+
         dev_priv->modeset_on_lid = 0;
 
         return error;
@@ -301,12 +453,90 @@ static int i915_drm_thaw(struct drm_device *dev)
 
 int i915_resume(struct drm_device *dev)
 {
+        int ret;
+
+        if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+                return 0;
+
         if (pci_enable_device(dev->pdev))
                 return -EIO;
 
         pci_set_master(dev->pdev);
 
-        return i915_drm_thaw(dev);
+        ret = i915_drm_thaw(dev);
+        if (ret)
+                return ret;
+
+        drm_kms_helper_poll_enable(dev);
+        return 0;
+}
+
+static int i8xx_do_reset(struct drm_device *dev, u8 flags)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+
+        if (IS_I85X(dev))
+                return -ENODEV;
+
+        I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830);
+        POSTING_READ(D_STATE);
+
+        if (IS_I830(dev) || IS_845G(dev)) {
+                I915_WRITE(DEBUG_RESET_I830,
+                           DEBUG_RESET_DISPLAY |
+                           DEBUG_RESET_RENDER |
+                           DEBUG_RESET_FULL);
+                POSTING_READ(DEBUG_RESET_I830);
+                msleep(1);
+
+                I915_WRITE(DEBUG_RESET_I830, 0);
+                POSTING_READ(DEBUG_RESET_I830);
+        }
+
+        msleep(1);
+
+        I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830);
+        POSTING_READ(D_STATE);
+
+        return 0;
+}
+
+static int i965_reset_complete(struct drm_device *dev)
+{
+        u8 gdrst;
+        pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
+        return gdrst & 0x1;
+}
+
+static int i965_do_reset(struct drm_device *dev, u8 flags)
+{
+        u8 gdrst;
+
+        /*
+         * Set the domains we want to reset (GRDOM/bits 2 and 3) as
+         * well as the reset bit (GR/bit 0).  Setting the GR bit
+         * triggers the reset; when done, the hardware will clear it.
+         */
+        pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
+        pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1);
+
+        return wait_for(i965_reset_complete(dev), 500);
+}
+
+static int ironlake_do_reset(struct drm_device *dev, u8 flags)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        u32 gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
+        I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, gdrst | flags | 0x1);
+        return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
+}
+
+static int gen6_do_reset(struct drm_device *dev, u8 flags)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+
+        I915_WRITE(GEN6_GDRST, GEN6_GRDOM_FULL);
+        return wait_for((I915_READ(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
 }
 
 /**
@@ -325,54 +555,50 @@ int i915_resume(struct drm_device *dev)
  *   - re-init interrupt state
  *   - re-init display
  */
-int i965_reset(struct drm_device *dev, u8 flags)
+int i915_reset(struct drm_device *dev, u8 flags)
 {
         drm_i915_private_t *dev_priv = dev->dev_private;
-        unsigned long timeout;
-        u8 gdrst;
         /*
          * We really should only reset the display subsystem if we actually
          * need to
          */
         bool need_display = true;
+        int ret;
 
-        mutex_lock(&dev->struct_mutex);
+        if (!i915_try_reset)
+                return 0;
 
-        /*
-         * Clear request list
-         */
-        i915_gem_retire_requests(dev);
-
-        if (need_display)
-                i915_save_display(dev);
-
-        if (IS_I965G(dev) || IS_G4X(dev)) {
-                /*
-                 * Set the domains we want to reset, then the reset bit (bit 0).
-                 * Clear the reset bit after a while and wait for hardware status
-                 * bit (bit 1) to be set
-                 */
-                pci_read_config_byte(dev->pdev, GDRST, &gdrst);
-                pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
-                udelay(50);
-                pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
-
-                /* ...we don't want to loop forever though, 500ms should be plenty */
-               timeout = jiffies + msecs_to_jiffies(500);
-                do {
-                        udelay(100);
-                        pci_read_config_byte(dev->pdev, GDRST, &gdrst);
-                } while ((gdrst & 0x1) && time_after(timeout, jiffies));
-
-                if (gdrst & 0x1) {
-                        WARN(true, "i915: Failed to reset chip\n");
-                        mutex_unlock(&dev->struct_mutex);
-                        return -EIO;
-                }
-        } else {
-                DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
+        if (!mutex_trylock(&dev->struct_mutex))
+                return -EBUSY;
+
+        i915_gem_reset(dev);
+
+        ret = -ENODEV;
+        if (get_seconds() - dev_priv->last_gpu_reset < 5) {
+                DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
+        } else switch (INTEL_INFO(dev)->gen) {
+        case 7:
+        case 6:
+                ret = gen6_do_reset(dev, flags);
+                /* If reset with a user forcewake, try to restore */
+                if (atomic_read(&dev_priv->forcewake_count))
+                        __gen6_gt_force_wake_get(dev_priv);
+                break;
+        case 5:
+                ret = ironlake_do_reset(dev, flags);
+                break;
+        case 4:
+                ret = i965_do_reset(dev, flags);
+                break;
+        case 2:
+                ret = i8xx_do_reset(dev, flags);
+                break;
+        }
+        dev_priv->last_gpu_reset = get_seconds();
+        if (ret) {
+                DRM_ERROR("Failed to reset chip.\n");
                 mutex_unlock(&dev->struct_mutex);
-                return -ENODEV;
+                return ret;
         }
 
         /* Ok, now get things going again... */
@@ -391,22 +617,34 @@ int i965_reset(struct drm_device *dev, u8 flags)
          */
         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
                         !dev_priv->mm.suspended) {
-                struct intel_ring_buffer *ring = &dev_priv->render_ring;
                 dev_priv->mm.suspended = 0;
-                ring->init(dev, ring);
+
+                dev_priv->ring[RCS].init(&dev_priv->ring[RCS]);
+                if (HAS_BSD(dev))
+                    dev_priv->ring[VCS].init(&dev_priv->ring[VCS]);
+                if (HAS_BLT(dev))
+                    dev_priv->ring[BCS].init(&dev_priv->ring[BCS]);
+
                 mutex_unlock(&dev->struct_mutex);
                 drm_irq_uninstall(dev);
+                drm_mode_config_reset(dev);
                 drm_irq_install(dev);
                 mutex_lock(&dev->struct_mutex);
         }
 
+        mutex_unlock(&dev->struct_mutex);
+
         /*
-         * Display needs restore too...
+         * Perform a full modeset as on later generations, e.g. Ironlake, we may
+         * need to retrain the display link and cannot just restore the register
+         * values.
          */
-        if (need_display)
-                i915_restore_display(dev);
+        if (need_display) {
+                mutex_lock(&dev->mode_config.mutex);
+                drm_helper_resume_force_mode(dev);
+                mutex_unlock(&dev->mode_config.mutex);
+        }
 
-        mutex_unlock(&dev->struct_mutex);
         return 0;
 }
 
@@ -414,6 +652,14 @@ int i965_reset(struct drm_device *dev, u8 flags)
 static int __devinit
 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
+        /* Only bind to function 0 of the device. Early generations
+         * used function 1 as a placeholder for multi-head. This causes
+         * us confusion instead, especially on the systems where both
+         * functions have the same PCI-ID!
+         */
+        if (PCI_FUNC(pdev->devfn))
+                return -ENODEV;
+
         return drm_get_pci_dev(pdev, ent, &driver);
 }
 
@@ -436,6 +682,9 @@ static int i915_pm_suspend(struct device *dev)
                 return -ENODEV;
         }
 
+        if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
+                return 0;
+
         error = i915_drm_freeze(drm_dev);
         if (error)
                 return error;
@@ -517,15 +766,7 @@ static struct drm_driver driver = {
         .resume = i915_resume,
 
         .device_is_agp = i915_driver_device_is_agp,
-        .enable_vblank = i915_enable_vblank,
-        .disable_vblank = i915_disable_vblank,
-        .irq_preinstall = i915_driver_irq_preinstall,
-        .irq_postinstall = i915_driver_irq_postinstall,
-        .irq_uninstall = i915_driver_irq_uninstall,
-        .irq_handler = i915_driver_irq_handler,
         .reclaim_buffers = drm_core_reclaim_buffers,
-        .get_map_ofs = drm_core_get_map_ofs,
-        .get_reg_ofs = drm_core_get_reg_ofs,
         .master_create = i915_master_create,
         .master_destroy = i915_master_destroy,
 #if defined(CONFIG_DEBUG_FS)
@@ -535,6 +776,9 @@ static struct drm_driver driver = {
         .gem_init_object = i915_gem_init_object,
         .gem_free_object = i915_gem_free_object,
         .gem_vm_ops = &i915_gem_vm_ops,
+        .dumb_create = i915_gem_dumb_create,
+        .dumb_map_offset = i915_gem_mmap_gtt,
+        .dumb_destroy = i915_gem_dumb_destroy,
         .ioctls = i915_ioctls,
         .fops = {
                  .owner = THIS_MODULE,
@@ -548,14 +792,7 @@ static struct drm_driver driver = {
 #ifdef CONFIG_COMPAT
                  .compat_ioctl = i915_compat_ioctl,
 #endif
-        },
-
-        .pci_driver = {
-                 .name = DRIVER_NAME,
-                 .id_table = pciidlist,
-                 .probe = i915_pci_probe,
-                 .remove = i915_pci_remove,
-                 .driver.pm = &i915_pm_ops,
+                 .llseek = noop_llseek,
         },
 
         .name = DRIVER_NAME,
@@ -566,6 +803,14 @@ static struct drm_driver driver = {
         .patchlevel = DRIVER_PATCHLEVEL,
 };
 
+static struct pci_driver i915_pci_driver = {
+        .name = DRIVER_NAME,
+        .id_table = pciidlist,
+        .probe = i915_pci_probe,
+        .remove = i915_pci_remove,
+        .driver.pm = &i915_pm_ops,
+};
+
 static int __init i915_init(void)
 {
         if (!intel_agp_enabled) {
@@ -575,8 +820,6 @@ static int __init i915_init(void)
 
         driver.num_ioctls = i915_max_ioctl;
 
-        i915_gem_shrinker_init();
-
         /*
          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
          * explicitly disabled with the module pararmeter.
@@ -598,18 +841,15 @@ static int __init i915_init(void)
                 driver.driver_features &= ~DRIVER_MODESET;
 #endif
 
-        if (!(driver.driver_features & DRIVER_MODESET)) {
-                driver.suspend = i915_suspend;
-                driver.resume = i915_resume;
-        }
+        if (!(driver.driver_features & DRIVER_MODESET))
+                driver.get_vblank_timestamp = NULL;
 
-        return drm_init(&driver);
+        return drm_pci_init(&driver, &i915_pci_driver);
 }
 
 static void __exit i915_exit(void)
 {
-        i915_gem_shrinker_exit();
-        drm_exit(&driver);
+        drm_pci_exit(&driver, &i915_pci_driver);
 }
 
 module_init(i915_init);