diff options
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 46 |
1 files changed, 26 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 844f3c972b04..e33d9be7df3b 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -152,7 +152,7 @@ static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init) | |||
152 | { | 152 | { |
153 | drm_i915_private_t *dev_priv = dev->dev_private; | 153 | drm_i915_private_t *dev_priv = dev->dev_private; |
154 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; | 154 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
155 | struct intel_ring_buffer *ring = LP_RING(dev_priv); | 155 | int ret; |
156 | 156 | ||
157 | master_priv->sarea = drm_getsarea(dev); | 157 | master_priv->sarea = drm_getsarea(dev); |
158 | if (master_priv->sarea) { | 158 | if (master_priv->sarea) { |
@@ -163,33 +163,22 @@ static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init) | |||
163 | } | 163 | } |
164 | 164 | ||
165 | if (init->ring_size != 0) { | 165 | if (init->ring_size != 0) { |
166 | if (ring->obj != NULL) { | 166 | if (LP_RING(dev_priv)->obj != NULL) { |
167 | i915_dma_cleanup(dev); | 167 | i915_dma_cleanup(dev); |
168 | DRM_ERROR("Client tried to initialize ringbuffer in " | 168 | DRM_ERROR("Client tried to initialize ringbuffer in " |
169 | "GEM mode\n"); | 169 | "GEM mode\n"); |
170 | return -EINVAL; | 170 | return -EINVAL; |
171 | } | 171 | } |
172 | 172 | ||
173 | ring->size = init->ring_size; | 173 | ret = intel_render_ring_init_dri(dev, |
174 | 174 | init->ring_start, | |
175 | ring->map.offset = init->ring_start; | 175 | init->ring_size); |
176 | ring->map.size = init->ring_size; | 176 | if (ret) { |
177 | ring->map.type = 0; | ||
178 | ring->map.flags = 0; | ||
179 | ring->map.mtrr = 0; | ||
180 | |||
181 | drm_core_ioremap_wc(&ring->map, dev); | ||
182 | |||
183 | if (ring->map.handle == NULL) { | ||
184 | i915_dma_cleanup(dev); | 177 | i915_dma_cleanup(dev); |
185 | DRM_ERROR("can not ioremap virtual address for" | 178 | return ret; |
186 | " ring buffer\n"); | ||
187 | return -ENOMEM; | ||
188 | } | 179 | } |
189 | } | 180 | } |
190 | 181 | ||
191 | ring->virtual_start = ring->map.handle; | ||
192 | |||
193 | dev_priv->cpp = init->cpp; | 182 | dev_priv->cpp = init->cpp; |
194 | dev_priv->back_offset = init->back_offset; | 183 | dev_priv->back_offset = init->back_offset; |
195 | dev_priv->front_offset = init->front_offset; | 184 | dev_priv->front_offset = init->front_offset; |
@@ -1226,9 +1215,15 @@ static int i915_load_modeset_init(struct drm_device *dev) | |||
1226 | if (ret) | 1215 | if (ret) |
1227 | DRM_INFO("failed to find VBIOS tables\n"); | 1216 | DRM_INFO("failed to find VBIOS tables\n"); |
1228 | 1217 | ||
1229 | /* if we have > 1 VGA cards, then disable the radeon VGA resources */ | 1218 | /* If we have > 1 VGA cards, then we need to arbitrate access |
1219 | * to the common VGA resources. | ||
1220 | * | ||
1221 | * If we are a secondary display controller (!PCI_DISPLAY_CLASS_VGA), | ||
1222 | * then we do not take part in VGA arbitration and the | ||
1223 | * vga_client_register() fails with -ENODEV. | ||
1224 | */ | ||
1230 | ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode); | 1225 | ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode); |
1231 | if (ret) | 1226 | if (ret && ret != -ENODEV) |
1232 | goto cleanup_ringbuffer; | 1227 | goto cleanup_ringbuffer; |
1233 | 1228 | ||
1234 | intel_register_dsm_handler(); | 1229 | intel_register_dsm_handler(); |
@@ -1900,6 +1895,17 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
1900 | if (IS_GEN2(dev)) | 1895 | if (IS_GEN2(dev)) |
1901 | dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30)); | 1896 | dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(30)); |
1902 | 1897 | ||
1898 | /* 965GM sometimes incorrectly writes to hardware status page (HWS) | ||
1899 | * using 32bit addressing, overwriting memory if HWS is located | ||
1900 | * above 4GB. | ||
1901 | * | ||
1902 | * The documentation also mentions an issue with undefined | ||
1903 | * behaviour if any general state is accessed within a page above 4GB, | ||
1904 | * which also needs to be handled carefully. | ||
1905 | */ | ||
1906 | if (IS_BROADWATER(dev) || IS_CRESTLINE(dev)) | ||
1907 | dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32)); | ||
1908 | |||
1903 | mmio_bar = IS_GEN2(dev) ? 1 : 0; | 1909 | mmio_bar = IS_GEN2(dev) ? 1 : 0; |
1904 | dev_priv->regs = pci_iomap(dev->pdev, mmio_bar, 0); | 1910 | dev_priv->regs = pci_iomap(dev->pdev, mmio_bar, 0); |
1905 | if (!dev_priv->regs) { | 1911 | if (!dev_priv->regs) { |