1 files changed, 357 insertions, 94 deletions

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index e5b138be45fa..c3cfafcbfe7d 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -35,6 +35,10 @@
 #include "i915_drv.h"
 #include "i915_trace.h"
 #include <linux/vgaarb.h>
+#include <linux/acpi.h>
+#include <linux/pnp.h>
+#include <linux/vga_switcheroo.h>
+#include <linux/slab.h>
 
 /* Really want an OS-independent resettable timer.  Would like to have
  * this loop run for (eg) 3 sec, but have the timer reset every time
@@ -123,7 +127,7 @@ static int i915_init_phys_hws(struct drm_device *dev)
         drm_i915_private_t *dev_priv = dev->dev_private;
         /* Program Hardware Status Page */
         dev_priv->status_page_dmah =
-                drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
+                drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE);
 
         if (!dev_priv->status_page_dmah) {
                 DRM_ERROR("Can not allocate hardware status page\n");
@@ -134,6 +138,10 @@ static int i915_init_phys_hws(struct drm_device *dev)
 
         memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
 
+        if (IS_I965G(dev))
+                dev_priv->dma_status_page |= (dev_priv->dma_status_page >> 28) &
+                                             0xf0;
+
         I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
         DRM_DEBUG_DRIVER("Enabled hardware status page\n");
         return 0;
@@ -731,8 +739,10 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
         if (cmdbuf->num_cliprects) {
                 cliprects = kcalloc(cmdbuf->num_cliprects,
                                     sizeof(struct drm_clip_rect), GFP_KERNEL);
-                if (cliprects == NULL)
+                if (cliprects == NULL) {
+                        ret = -ENOMEM;
                         goto fail_batch_free;
+                }
 
                 ret = copy_from_user(cliprects, cmdbuf->cliprects,
                                      cmdbuf->num_cliprects *
@@ -807,9 +817,19 @@ static int i915_getparam(struct drm_device *dev, void *data,
         case I915_PARAM_NUM_FENCES_AVAIL:
                 value = dev_priv->num_fence_regs - dev_priv->fence_reg_start;
                 break;
+        case I915_PARAM_HAS_OVERLAY:
+                value = dev_priv->overlay ? 1 : 0;
+                break;
+        case I915_PARAM_HAS_PAGEFLIPPING:
+                value = 1;
+                break;
+        case I915_PARAM_HAS_EXECBUF2:
+                /* depends on GEM */
+                value = dev_priv->has_gem;
+                break;
         default:
                 DRM_DEBUG_DRIVER("Unknown parameter %d\n",
-                                        param->param);
+                                 param->param);
                 return -EINVAL;
         }
 
@@ -917,6 +937,120 @@ static int i915_get_bridge_dev(struct drm_device *dev)
         return 0;
 }
 
+#define MCHBAR_I915 0x44
+#define MCHBAR_I965 0x48
+#define MCHBAR_SIZE (4*4096)
+
+#define DEVEN_REG 0x54
+#define   DEVEN_MCHBAR_EN (1 << 28)
+
+/* Allocate space for the MCH regs if needed, return nonzero on error */
+static int
+intel_alloc_mchbar_resource(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        int reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
+        u32 temp_lo, temp_hi = 0;
+        u64 mchbar_addr;
+        int ret = 0;
+
+        if (IS_I965G(dev))
+                pci_read_config_dword(dev_priv->bridge_dev, reg + 4, &temp_hi);
+        pci_read_config_dword(dev_priv->bridge_dev, reg, &temp_lo);
+        mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
+
+        /* If ACPI doesn't have it, assume we need to allocate it ourselves */
+#ifdef CONFIG_PNP
+        if (mchbar_addr &&
+            pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE)) {
+                ret = 0;
+                goto out;
+        }
+#endif
+
+        /* Get some space for it */
+        ret = pci_bus_alloc_resource(dev_priv->bridge_dev->bus, &dev_priv->mch_res,
+                                     MCHBAR_SIZE, MCHBAR_SIZE,
+                                     PCIBIOS_MIN_MEM,
+                                     0,   pcibios_align_resource,
+                                     dev_priv->bridge_dev);
+        if (ret) {
+                DRM_DEBUG_DRIVER("failed bus alloc: %d\n", ret);
+                dev_priv->mch_res.start = 0;
+                goto out;
+        }
+
+        if (IS_I965G(dev))
+                pci_write_config_dword(dev_priv->bridge_dev, reg + 4,
+                                       upper_32_bits(dev_priv->mch_res.start));
+
+        pci_write_config_dword(dev_priv->bridge_dev, reg,
+                               lower_32_bits(dev_priv->mch_res.start));
+out:
+        return ret;
+}
+
+/* Setup MCHBAR if possible, return true if we should disable it again */
+static void
+intel_setup_mchbar(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        int mchbar_reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
+        u32 temp;
+        bool enabled;
+
+        dev_priv->mchbar_need_disable = false;
+
+        if (IS_I915G(dev) || IS_I915GM(dev)) {
+                pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
+                enabled = !!(temp & DEVEN_MCHBAR_EN);
+        } else {
+                pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
+                enabled = temp & 1;
+        }
+
+        /* If it's already enabled, don't have to do anything */
+        if (enabled)
+                return;
+
+        if (intel_alloc_mchbar_resource(dev))
+                return;
+
+        dev_priv->mchbar_need_disable = true;
+
+        /* Space is allocated or reserved, so enable it. */
+        if (IS_I915G(dev) || IS_I915GM(dev)) {
+                pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG,
+                                       temp | DEVEN_MCHBAR_EN);
+        } else {
+                pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
+                pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp | 1);
+        }
+}
+
+static void
+intel_teardown_mchbar(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        int mchbar_reg = IS_I965G(dev) ? MCHBAR_I965 : MCHBAR_I915;
+        u32 temp;
+
+        if (dev_priv->mchbar_need_disable) {
+                if (IS_I915G(dev) || IS_I915GM(dev)) {
+                        pci_read_config_dword(dev_priv->bridge_dev, DEVEN_REG, &temp);
+                        temp &= ~DEVEN_MCHBAR_EN;
+                        pci_write_config_dword(dev_priv->bridge_dev, DEVEN_REG, temp);
+                } else {
+                        pci_read_config_dword(dev_priv->bridge_dev, mchbar_reg, &temp);
+                        temp &= ~1;
+                        pci_write_config_dword(dev_priv->bridge_dev, mchbar_reg, temp);
+                }
+        }
+
+        if (dev_priv->mch_res.start)
+                release_resource(&dev_priv->mch_res);
+}
+
 /**
  * i915_probe_agp - get AGP bootup configuration
  * @pdev: PCI device
@@ -962,59 +1096,123 @@ static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
          * Some of the preallocated space is taken by the GTT
          * and popup.  GTT is 1K per MB of aperture size, and popup is 4K.
          */
-        if (IS_G4X(dev) || IS_IGD(dev) || IS_IGDNG(dev))
+        if (IS_G4X(dev) || IS_PINEVIEW(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev))
                 overhead = 4096;
         else
                 overhead = (*aperture_size / 1024) + 4096;
 
-        switch (tmp & INTEL_GMCH_GMS_MASK) {
-        case INTEL_855_GMCH_GMS_DISABLED:
-                DRM_ERROR("video memory is disabled\n");
-                return -1;
-        case INTEL_855_GMCH_GMS_STOLEN_1M:
-                stolen = 1 * 1024 * 1024;
-                break;
-        case INTEL_855_GMCH_GMS_STOLEN_4M:
-                stolen = 4 * 1024 * 1024;
-                break;
-        case INTEL_855_GMCH_GMS_STOLEN_8M:
-                stolen = 8 * 1024 * 1024;
-                break;
-        case INTEL_855_GMCH_GMS_STOLEN_16M:
-                stolen = 16 * 1024 * 1024;
-                break;
-        case INTEL_855_GMCH_GMS_STOLEN_32M:
-                stolen = 32 * 1024 * 1024;
-                break;
-        case INTEL_915G_GMCH_GMS_STOLEN_48M:
-                stolen = 48 * 1024 * 1024;
-                break;
-        case INTEL_915G_GMCH_GMS_STOLEN_64M:
-                stolen = 64 * 1024 * 1024;
-                break;
-        case INTEL_GMCH_GMS_STOLEN_128M:
-                stolen = 128 * 1024 * 1024;
-                break;
-        case INTEL_GMCH_GMS_STOLEN_256M:
-                stolen = 256 * 1024 * 1024;
-                break;
-        case INTEL_GMCH_GMS_STOLEN_96M:
-                stolen = 96 * 1024 * 1024;
-                break;
-        case INTEL_GMCH_GMS_STOLEN_160M:
-                stolen = 160 * 1024 * 1024;
-                break;
-        case INTEL_GMCH_GMS_STOLEN_224M:
-                stolen = 224 * 1024 * 1024;
-                break;
-        case INTEL_GMCH_GMS_STOLEN_352M:
-                stolen = 352 * 1024 * 1024;
-                break;
-        default:
-                DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
-                        tmp & INTEL_GMCH_GMS_MASK);
-                return -1;
+        if (IS_GEN6(dev)) {
+                /* SNB has memory control reg at 0x50.w */
+                pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &tmp);
+
+                switch (tmp & SNB_GMCH_GMS_STOLEN_MASK) {
+                case INTEL_855_GMCH_GMS_DISABLED:
+                        DRM_ERROR("video memory is disabled\n");
+                        return -1;
+                case SNB_GMCH_GMS_STOLEN_32M:
+                        stolen = 32 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_64M:
+                        stolen = 64 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_96M:
+                        stolen = 96 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_128M:
+                        stolen = 128 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_160M:
+                        stolen = 160 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_192M:
+                        stolen = 192 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_224M:
+                        stolen = 224 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_256M:
+                        stolen = 256 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_288M:
+                        stolen = 288 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_320M:
+                        stolen = 320 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_352M:
+                        stolen = 352 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_384M:
+                        stolen = 384 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_416M:
+                        stolen = 416 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_448M:
+                        stolen = 448 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_480M:
+                        stolen = 480 * 1024 * 1024;
+                        break;
+                case SNB_GMCH_GMS_STOLEN_512M:
+                        stolen = 512 * 1024 * 1024;
+                        break;
+                default:
+                        DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
+                                  tmp & SNB_GMCH_GMS_STOLEN_MASK);
+                        return -1;
+                }
+        } else {
+                switch (tmp & INTEL_GMCH_GMS_MASK) {
+                case INTEL_855_GMCH_GMS_DISABLED:
+                        DRM_ERROR("video memory is disabled\n");
+                        return -1;
+                case INTEL_855_GMCH_GMS_STOLEN_1M:
+                        stolen = 1 * 1024 * 1024;
+                        break;
+                case INTEL_855_GMCH_GMS_STOLEN_4M:
+                        stolen = 4 * 1024 * 1024;
+                        break;
+                case INTEL_855_GMCH_GMS_STOLEN_8M:
+                        stolen = 8 * 1024 * 1024;
+                        break;
+                case INTEL_855_GMCH_GMS_STOLEN_16M:
+                        stolen = 16 * 1024 * 1024;
+                        break;
+                case INTEL_855_GMCH_GMS_STOLEN_32M:
+                        stolen = 32 * 1024 * 1024;
+                        break;
+                case INTEL_915G_GMCH_GMS_STOLEN_48M:
+                        stolen = 48 * 1024 * 1024;
+                        break;
+                case INTEL_915G_GMCH_GMS_STOLEN_64M:
+                        stolen = 64 * 1024 * 1024;
+                        break;
+                case INTEL_GMCH_GMS_STOLEN_128M:
+                        stolen = 128 * 1024 * 1024;
+                        break;
+                case INTEL_GMCH_GMS_STOLEN_256M:
+                        stolen = 256 * 1024 * 1024;
+                        break;
+                case INTEL_GMCH_GMS_STOLEN_96M:
+                        stolen = 96 * 1024 * 1024;
+                        break;
+                case INTEL_GMCH_GMS_STOLEN_160M:
+                        stolen = 160 * 1024 * 1024;
+                        break;
+                case INTEL_GMCH_GMS_STOLEN_224M:
+                        stolen = 224 * 1024 * 1024;
+                        break;
+                case INTEL_GMCH_GMS_STOLEN_352M:
+                        stolen = 352 * 1024 * 1024;
+                        break;
+                default:
+                        DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
+                                  tmp & INTEL_GMCH_GMS_MASK);
+                        return -1;
+                }
         }
+
         *preallocated_size = stolen - overhead;
         *start = overhead;
 
@@ -1048,7 +1246,7 @@ static unsigned long i915_gtt_to_phys(struct drm_device *dev,
         int gtt_offset, gtt_size;
 
         if (IS_I965G(dev)) {
-                if (IS_G4X(dev) || IS_IGDNG(dev)) {
+                if (IS_G4X(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev)) {
                         gtt_offset = 2*1024*1024;
                         gtt_size = 2*1024*1024;
                 } else {
@@ -1070,7 +1268,7 @@ static unsigned long i915_gtt_to_phys(struct drm_device *dev,
 
         entry = *(volatile u32 *)(gtt + (gtt_addr / 1024));
 
-        DRM_DEBUG("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry);
+        DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry);
 
         /* Mask out these reserved bits on this hardware. */
         if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) ||
@@ -1096,7 +1294,7 @@ static unsigned long i915_gtt_to_phys(struct drm_device *dev,
         phys =(entry & PTE_ADDRESS_MASK) |
                 ((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4));
 
-        DRM_DEBUG("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys);
+        DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys);
 
         return phys;
 }
@@ -1111,11 +1309,13 @@ static void i915_setup_compression(struct drm_device *dev, int size)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         struct drm_mm_node *compressed_fb, *compressed_llb;
-        unsigned long cfb_base, ll_base;
+        unsigned long cfb_base;
+        unsigned long ll_base = 0;
 
         /* Leave 1M for line length buffer & misc. */
         compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
         if (!compressed_fb) {
+                dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL;
                 i915_warn_stolen(dev);
                 return;
         }
@@ -1123,6 +1323,7 @@ static void i915_setup_compression(struct drm_device *dev, int size)
         compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);
         if (!compressed_fb) {
                 i915_warn_stolen(dev);
+                dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL;
                 return;
         }
 
@@ -1156,6 +1357,8 @@ static void i915_setup_compression(struct drm_device *dev, int size)
 
         dev_priv->cfb_size = size;
 
+        dev_priv->compressed_fb = compressed_fb;
+
         if (IS_GM45(dev)) {
                 g4x_disable_fbc(dev);
                 I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
@@ -1163,12 +1366,22 @@ static void i915_setup_compression(struct drm_device *dev, int size)
                 i8xx_disable_fbc(dev);
                 I915_WRITE(FBC_CFB_BASE, cfb_base);
                 I915_WRITE(FBC_LL_BASE, ll_base);
+                dev_priv->compressed_llb = compressed_llb;
         }
 
         DRM_DEBUG("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base,
                   ll_base, size >> 20);
 }
 
+static void i915_cleanup_compression(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+
+        drm_mm_put_block(dev_priv->compressed_fb);
+        if (!IS_GM45(dev))
+                drm_mm_put_block(dev_priv->compressed_llb);
+}
+
 /* true = enable decode, false = disable decoder */
 static unsigned int i915_vga_set_decode(void *cookie, bool state)
 {
@@ -1182,6 +1395,32 @@ static unsigned int i915_vga_set_decode(void *cookie, bool state)
                 return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
 }
 
+static void i915_switcheroo_set_state(struct pci_dev *pdev, enum vga_switcheroo_state state)
+{
+        struct drm_device *dev = pci_get_drvdata(pdev);
+        pm_message_t pmm = { .event = PM_EVENT_SUSPEND };
+        if (state == VGA_SWITCHEROO_ON) {
+                printk(KERN_INFO "i915: switched off\n");
+                /* i915 resume handler doesn't set to D0 */
+                pci_set_power_state(dev->pdev, PCI_D0);
+                i915_resume(dev);
+        } else {
+                printk(KERN_ERR "i915: switched off\n");
+                i915_suspend(dev, pmm);
+        }
+}
+
+static bool i915_switcheroo_can_switch(struct pci_dev *pdev)
+{
+        struct drm_device *dev = pci_get_drvdata(pdev);
+        bool can_switch;
+
+        spin_lock(&dev->count_lock);
+        can_switch = (dev->open_count == 0);
+        spin_unlock(&dev->count_lock);
+        return can_switch;
+}
+
 static int i915_load_modeset_init(struct drm_device *dev,
                                   unsigned long prealloc_start,
                                   unsigned long prealloc_size,
@@ -1194,14 +1433,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
         dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) &
                 0xff000000;
 
-        if (IS_MOBILE(dev) || IS_I9XX(dev))
-                dev_priv->cursor_needs_physical = true;
-        else
-                dev_priv->cursor_needs_physical = false;
-
-        if (IS_I965G(dev) || IS_G33(dev))
-                dev_priv->cursor_needs_physical = false;
-
         /* Basic memrange allocator for stolen space (aka vram) */
         drm_mm_init(&dev_priv->vram, 0, prealloc_size);
         DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
@@ -1251,6 +1482,14 @@ static int i915_load_modeset_init(struct drm_device *dev,
         if (ret)
                 goto destroy_ringbuffer;
 
+        ret = vga_switcheroo_register_client(dev->pdev,
+                                             i915_switcheroo_set_state,
+                                             i915_switcheroo_can_switch);
+        if (ret)
+                goto destroy_ringbuffer;
+
+        intel_modeset_init(dev);
+
         ret = drm_irq_install(dev);
         if (ret)
                 goto destroy_ringbuffer;
@@ -1265,14 +1504,14 @@ static int i915_load_modeset_init(struct drm_device *dev,
 
         I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
 
-        intel_modeset_init(dev);
-
         drm_helper_initial_config(dev);
 
         return 0;
 
 destroy_ringbuffer:
+        mutex_lock(&dev->struct_mutex);
         i915_gem_cleanup_ringbuffer(dev);
+        mutex_unlock(&dev->struct_mutex);
 out:
         return ret;
 }
@@ -1306,7 +1545,7 @@ static void i915_get_mem_freq(struct drm_device *dev)
         drm_i915_private_t *dev_priv = dev->dev_private;
         u32 tmp;
 
-        if (!IS_IGD(dev))
+        if (!IS_PINEVIEW(dev))
                 return;
 
         tmp = I915_READ(CLKCFG);
@@ -1354,7 +1593,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         resource_size_t base, size;
-        int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
+        int ret = 0, mmio_bar;
         uint32_t agp_size, prealloc_size, prealloc_start;
 
         /* i915 has 4 more counters */
@@ -1370,8 +1609,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
         dev->dev_private = (void *)dev_priv;
         dev_priv->dev = dev;
+        dev_priv->info = (struct intel_device_info *) flags;
 
         /* Add register map (needed for suspend/resume) */
+        mmio_bar = IS_I9XX(dev) ? 0 : 1;
         base = drm_get_resource_start(dev, mmio_bar);
         size = drm_get_resource_len(dev, mmio_bar);
 
@@ -1413,7 +1654,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
         if (ret)
                 goto out_iomapfree;
 
-        dev_priv->wq = create_workqueue("i915");
+        dev_priv->wq = create_singlethread_workqueue("i915");
         if (dev_priv->wq == NULL) {
                 DRM_ERROR("Failed to create our workqueue.\n");
                 ret = -ENOMEM;
@@ -1434,11 +1675,14 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
         dev->driver->get_vblank_counter = i915_get_vblank_counter;
         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
-        if (IS_G4X(dev) || IS_IGDNG(dev)) {
+        if (IS_G4X(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev)) {
                 dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
                 dev->driver->get_vblank_counter = gm45_get_vblank_counter;
         }
 
+        /* Try to make sure MCHBAR is enabled before poking at it */
+        intel_setup_mchbar(dev);
+
         i915_gem_load(dev);
 
         /* Init HWS */
@@ -1489,9 +1733,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
         }
 
         /* Must be done after probing outputs */
-        /* FIXME: verify on IGDNG */
-        if (!IS_IGDNG(dev))
-                intel_opregion_init(dev, 0);
+        intel_opregion_init(dev, 0);
 
         setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed,
                     (unsigned long) dev);
@@ -1514,6 +1756,8 @@ int i915_driver_unload(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
 
+        i915_destroy_error_state(dev);
+
         destroy_workqueue(dev_priv->wq);
         del_timer_sync(&dev_priv->hangcheck_timer);
 
@@ -1525,7 +1769,17 @@ int i915_driver_unload(struct drm_device *dev)
         }
 
         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
+                /*
+                 * free the memory space allocated for the child device
+                 * config parsed from VBT
+                 */
+                if (dev_priv->child_dev && dev_priv->child_dev_num) {
+                        kfree(dev_priv->child_dev);
+                        dev_priv->child_dev = NULL;
+                        dev_priv->child_dev_num = 0;
+                }
                 drm_irq_uninstall(dev);
+                vga_switcheroo_unregister_client(dev->pdev);
                 vga_client_register(dev->pdev, NULL, NULL, NULL);
         }
 
@@ -1535,8 +1789,7 @@ int i915_driver_unload(struct drm_device *dev)
         if (dev_priv->regs != NULL)
                 iounmap(dev_priv->regs);
 
-        if (!IS_IGDNG(dev))
-                intel_opregion_free(dev, 0);
+        intel_opregion_free(dev, 0);
 
         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
                 intel_modeset_cleanup(dev);
@@ -1546,10 +1799,16 @@ int i915_driver_unload(struct drm_device *dev)
                 mutex_lock(&dev->struct_mutex);
                 i915_gem_cleanup_ringbuffer(dev);
                 mutex_unlock(&dev->struct_mutex);
+                if (I915_HAS_FBC(dev) && i915_powersave)
+                        i915_cleanup_compression(dev);
                 drm_mm_takedown(&dev_priv->vram);
                 i915_gem_lastclose(dev);
+
+                intel_cleanup_overlay(dev);
         }
 
+        intel_teardown_mchbar(dev);
+
         pci_dev_put(dev_priv->bridge_dev);
         kfree(dev->dev_private);
 
@@ -1592,6 +1851,7 @@ void i915_driver_lastclose(struct drm_device * dev)
 
         if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) {
                 drm_fb_helper_restore();
+                vga_switcheroo_process_delayed_switch();
                 return;
         }
 
@@ -1636,26 +1896,29 @@ struct drm_ioctl_desc i915_ioctls[] = {
         DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE,  i915_vblank_pipe_get, DRM_AUTH ),
         DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH),
         DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-        DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-        DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH),
-        DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
-        DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
-        DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH),
-        DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH),
-        DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-        DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-        DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0),
-        DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0),
-        DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, 0),
+        DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
+        DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
 };
 
 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);