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path: root/drivers/gpu/drm/i915/i915_debugfs.c
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c28
1 files changed, 9 insertions, 19 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index a0b8447b06e7..322070c0c631 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -96,19 +96,18 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
96 spin_lock(lock); 96 spin_lock(lock);
97 list_for_each_entry(obj_priv, head, list) 97 list_for_each_entry(obj_priv, head, list)
98 { 98 {
99 struct drm_gem_object *obj = obj_priv->obj;
100
101 seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s", 99 seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
102 obj, 100 &obj_priv->base,
103 get_pin_flag(obj_priv), 101 get_pin_flag(obj_priv),
104 obj->size, 102 obj_priv->base.size,
105 obj->read_domains, obj->write_domain, 103 obj_priv->base.read_domains,
104 obj_priv->base.write_domain,
106 obj_priv->last_rendering_seqno, 105 obj_priv->last_rendering_seqno,
107 obj_priv->dirty ? " dirty" : "", 106 obj_priv->dirty ? " dirty" : "",
108 obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : ""); 107 obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
109 108
110 if (obj->name) 109 if (obj_priv->base.name)
111 seq_printf(m, " (name: %d)", obj->name); 110 seq_printf(m, " (name: %d)", obj_priv->base.name);
112 if (obj_priv->fence_reg != I915_FENCE_REG_NONE) 111 if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
113 seq_printf(m, " (fence: %d)", obj_priv->fence_reg); 112 seq_printf(m, " (fence: %d)", obj_priv->fence_reg);
114 if (obj_priv->gtt_space != NULL) 113 if (obj_priv->gtt_space != NULL)
@@ -289,7 +288,7 @@ static int i915_batchbuffer_info(struct seq_file *m, void *data)
289 spin_lock(&dev_priv->mm.active_list_lock); 288 spin_lock(&dev_priv->mm.active_list_lock);
290 289
291 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) { 290 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
292 obj = obj_priv->obj; 291 obj = &obj_priv->base;
293 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) { 292 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
294 ret = i915_gem_object_get_pages(obj, 0); 293 ret = i915_gem_object_get_pages(obj, 0);
295 if (ret) { 294 if (ret) {
@@ -567,23 +566,14 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
567{ 566{
568 struct drm_info_node *node = (struct drm_info_node *) m->private; 567 struct drm_info_node *node = (struct drm_info_node *) m->private;
569 struct drm_device *dev = node->minor->dev; 568 struct drm_device *dev = node->minor->dev;
570 struct drm_crtc *crtc;
571 drm_i915_private_t *dev_priv = dev->dev_private; 569 drm_i915_private_t *dev_priv = dev->dev_private;
572 bool fbc_enabled = false;
573 570
574 if (!dev_priv->display.fbc_enabled) { 571 if (!I915_HAS_FBC(dev)) {
575 seq_printf(m, "FBC unsupported on this chipset\n"); 572 seq_printf(m, "FBC unsupported on this chipset\n");
576 return 0; 573 return 0;
577 } 574 }
578 575
579 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 576 if (intel_fbc_enabled(dev)) {
580 if (!crtc->enabled)
581 continue;
582 if (dev_priv->display.fbc_enabled(crtc))
583 fbc_enabled = true;
584 }
585
586 if (fbc_enabled) {
587 seq_printf(m, "FBC enabled\n"); 577 seq_printf(m, "FBC enabled\n");
588 } else { 578 } else {
589 seq_printf(m, "FBC disabled: "); 579 seq_printf(m, "FBC disabled: ");