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path: root/drivers/gpu/drm/i915/i915_debugfs.c
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c393
1 files changed, 364 insertions, 29 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 26bf0552b3cb..a0b8447b06e7 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -27,6 +27,8 @@
27 */ 27 */
28 28
29#include <linux/seq_file.h> 29#include <linux/seq_file.h>
30#include <linux/debugfs.h>
31#include <linux/slab.h>
30#include "drmP.h" 32#include "drmP.h"
31#include "drm.h" 33#include "drm.h"
32#include "i915_drm.h" 34#include "i915_drm.h"
@@ -96,13 +98,14 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
96 { 98 {
97 struct drm_gem_object *obj = obj_priv->obj; 99 struct drm_gem_object *obj = obj_priv->obj;
98 100
99 seq_printf(m, " %p: %s %8zd %08x %08x %d %s", 101 seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s",
100 obj, 102 obj,
101 get_pin_flag(obj_priv), 103 get_pin_flag(obj_priv),
102 obj->size, 104 obj->size,
103 obj->read_domains, obj->write_domain, 105 obj->read_domains, obj->write_domain,
104 obj_priv->last_rendering_seqno, 106 obj_priv->last_rendering_seqno,
105 obj_priv->dirty ? "dirty" : ""); 107 obj_priv->dirty ? " dirty" : "",
108 obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : "");
106 109
107 if (obj->name) 110 if (obj->name)
108 seq_printf(m, " (name: %d)", obj->name); 111 seq_printf(m, " (name: %d)", obj->name);
@@ -160,7 +163,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data)
160 struct drm_device *dev = node->minor->dev; 163 struct drm_device *dev = node->minor->dev;
161 drm_i915_private_t *dev_priv = dev->dev_private; 164 drm_i915_private_t *dev_priv = dev->dev_private;
162 165
163 if (!IS_IGDNG(dev)) { 166 if (!HAS_PCH_SPLIT(dev)) {
164 seq_printf(m, "Interrupt enable: %08x\n", 167 seq_printf(m, "Interrupt enable: %08x\n",
165 I915_READ(IER)); 168 I915_READ(IER));
166 seq_printf(m, "Interrupt identity: %08x\n", 169 seq_printf(m, "Interrupt identity: %08x\n",
@@ -223,7 +226,7 @@ static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
223 } else { 226 } else {
224 struct drm_i915_gem_object *obj_priv; 227 struct drm_i915_gem_object *obj_priv;
225 228
226 obj_priv = obj->driver_private; 229 obj_priv = to_intel_bo(obj);
227 seq_printf(m, "Fenced object[%2d] = %p: %s " 230 seq_printf(m, "Fenced object[%2d] = %p: %s "
228 "%08x %08zx %08x %s %08x %08x %d", 231 "%08x %08zx %08x %s %08x %08x %d",
229 i, obj, get_pin_flag(obj_priv), 232 i, obj, get_pin_flag(obj_priv),
@@ -270,7 +273,7 @@ static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_co
270 mem = kmap_atomic(pages[page], KM_USER0); 273 mem = kmap_atomic(pages[page], KM_USER0);
271 for (i = 0; i < PAGE_SIZE; i += 4) 274 for (i = 0; i < PAGE_SIZE; i += 4)
272 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]); 275 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
273 kunmap_atomic(pages[page], KM_USER0); 276 kunmap_atomic(mem, KM_USER0);
274 } 277 }
275} 278}
276 279
@@ -288,7 +291,7 @@ static int i915_batchbuffer_info(struct seq_file *m, void *data)
288 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) { 291 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
289 obj = obj_priv->obj; 292 obj = obj_priv->obj;
290 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) { 293 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
291 ret = i915_gem_object_get_pages(obj); 294 ret = i915_gem_object_get_pages(obj, 0);
292 if (ret) { 295 if (ret) {
293 DRM_ERROR("Failed to get pages: %d\n", ret); 296 DRM_ERROR("Failed to get pages: %d\n", ret);
294 spin_unlock(&dev_priv->mm.active_list_lock); 297 spin_unlock(&dev_priv->mm.active_list_lock);
@@ -348,6 +351,36 @@ static int i915_ringbuffer_info(struct seq_file *m, void *data)
348 return 0; 351 return 0;
349} 352}
350 353
354static const char *pin_flag(int pinned)
355{
356 if (pinned > 0)
357 return " P";
358 else if (pinned < 0)
359 return " p";
360 else
361 return "";
362}
363
364static const char *tiling_flag(int tiling)
365{
366 switch (tiling) {
367 default:
368 case I915_TILING_NONE: return "";
369 case I915_TILING_X: return " X";
370 case I915_TILING_Y: return " Y";
371 }
372}
373
374static const char *dirty_flag(int dirty)
375{
376 return dirty ? " dirty" : "";
377}
378
379static const char *purgeable_flag(int purgeable)
380{
381 return purgeable ? " purgeable" : "";
382}
383
351static int i915_error_state(struct seq_file *m, void *unused) 384static int i915_error_state(struct seq_file *m, void *unused)
352{ 385{
353 struct drm_info_node *node = (struct drm_info_node *) m->private; 386 struct drm_info_node *node = (struct drm_info_node *) m->private;
@@ -355,6 +388,7 @@ static int i915_error_state(struct seq_file *m, void *unused)
355 drm_i915_private_t *dev_priv = dev->dev_private; 388 drm_i915_private_t *dev_priv = dev->dev_private;
356 struct drm_i915_error_state *error; 389 struct drm_i915_error_state *error;
357 unsigned long flags; 390 unsigned long flags;
391 int i, page, offset, elt;
358 392
359 spin_lock_irqsave(&dev_priv->error_lock, flags); 393 spin_lock_irqsave(&dev_priv->error_lock, flags);
360 if (!dev_priv->first_error) { 394 if (!dev_priv->first_error) {
@@ -366,6 +400,7 @@ static int i915_error_state(struct seq_file *m, void *unused)
366 400
367 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, 401 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
368 error->time.tv_usec); 402 error->time.tv_usec);
403 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
369 seq_printf(m, "EIR: 0x%08x\n", error->eir); 404 seq_printf(m, "EIR: 0x%08x\n", error->eir);
370 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er); 405 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
371 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm); 406 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
@@ -377,6 +412,59 @@ static int i915_error_state(struct seq_file *m, void *unused)
377 seq_printf(m, " INSTPS: 0x%08x\n", error->instps); 412 seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
378 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1); 413 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
379 } 414 }
415 seq_printf(m, "seqno: 0x%08x\n", error->seqno);
416
417 if (error->active_bo_count) {
418 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count);
419
420 for (i = 0; i < error->active_bo_count; i++) {
421 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s",
422 error->active_bo[i].gtt_offset,
423 error->active_bo[i].size,
424 error->active_bo[i].read_domains,
425 error->active_bo[i].write_domain,
426 error->active_bo[i].seqno,
427 pin_flag(error->active_bo[i].pinned),
428 tiling_flag(error->active_bo[i].tiling),
429 dirty_flag(error->active_bo[i].dirty),
430 purgeable_flag(error->active_bo[i].purgeable));
431
432 if (error->active_bo[i].name)
433 seq_printf(m, " (name: %d)", error->active_bo[i].name);
434 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE)
435 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg);
436
437 seq_printf(m, "\n");
438 }
439 }
440
441 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
442 if (error->batchbuffer[i]) {
443 struct drm_i915_error_object *obj = error->batchbuffer[i];
444
445 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
446 offset = 0;
447 for (page = 0; page < obj->page_count; page++) {
448 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
449 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
450 offset += 4;
451 }
452 }
453 }
454 }
455
456 if (error->ringbuffer) {
457 struct drm_i915_error_object *obj = error->ringbuffer;
458
459 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset);
460 offset = 0;
461 for (page = 0; page < obj->page_count; page++) {
462 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
463 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
464 offset += 4;
465 }
466 }
467 }
380 468
381out: 469out:
382 spin_unlock_irqrestore(&dev_priv->error_lock, flags); 470 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
@@ -384,37 +472,270 @@ out:
384 return 0; 472 return 0;
385} 473}
386 474
387static int i915_registers_info(struct seq_file *m, void *data) { 475static int i915_rstdby_delays(struct seq_file *m, void *unused)
476{
388 struct drm_info_node *node = (struct drm_info_node *) m->private; 477 struct drm_info_node *node = (struct drm_info_node *) m->private;
389 struct drm_device *dev = node->minor->dev; 478 struct drm_device *dev = node->minor->dev;
390 drm_i915_private_t *dev_priv = dev->dev_private; 479 drm_i915_private_t *dev_priv = dev->dev_private;
391 uint32_t reg; 480 u16 crstanddelay = I915_READ16(CRSTANDVID);
392 481
393#define DUMP_RANGE(start, end) \ 482 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
394 for (reg=start; reg < end; reg += 4) \
395 seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg));
396
397 DUMP_RANGE(0x00000, 0x00fff); /* VGA registers */
398 DUMP_RANGE(0x02000, 0x02fff); /* instruction, memory, interrupt control registers */
399 DUMP_RANGE(0x03000, 0x031ff); /* FENCE and PPGTT control registers */
400 DUMP_RANGE(0x03200, 0x03fff); /* frame buffer compression registers */
401 DUMP_RANGE(0x05000, 0x05fff); /* I/O control registers */
402 DUMP_RANGE(0x06000, 0x06fff); /* clock control registers */
403 DUMP_RANGE(0x07000, 0x07fff); /* 3D internal debug registers */
404 DUMP_RANGE(0x07400, 0x088ff); /* GPE debug registers */
405 DUMP_RANGE(0x0a000, 0x0afff); /* display palette registers */
406 DUMP_RANGE(0x10000, 0x13fff); /* MMIO MCHBAR */
407 DUMP_RANGE(0x30000, 0x3ffff); /* overlay registers */
408 DUMP_RANGE(0x60000, 0x6ffff); /* display engine pipeline registers */
409 DUMP_RANGE(0x70000, 0x72fff); /* display and cursor registers */
410 DUMP_RANGE(0x73000, 0x73fff); /* performance counters */
411 483
412 return 0; 484 return 0;
413} 485}
414 486
487static int i915_cur_delayinfo(struct seq_file *m, void *unused)
488{
489 struct drm_info_node *node = (struct drm_info_node *) m->private;
490 struct drm_device *dev = node->minor->dev;
491 drm_i915_private_t *dev_priv = dev->dev_private;
492 u16 rgvswctl = I915_READ16(MEMSWCTL);
493
494 seq_printf(m, "Last command: 0x%01x\n", (rgvswctl >> 13) & 0x3);
495 seq_printf(m, "Command status: %d\n", (rgvswctl >> 12) & 1);
496 seq_printf(m, "P%d DELAY 0x%02x\n", (rgvswctl >> 8) & 0xf,
497 rgvswctl & 0x3f);
498
499 return 0;
500}
501
502static int i915_delayfreq_table(struct seq_file *m, void *unused)
503{
504 struct drm_info_node *node = (struct drm_info_node *) m->private;
505 struct drm_device *dev = node->minor->dev;
506 drm_i915_private_t *dev_priv = dev->dev_private;
507 u32 delayfreq;
508 int i;
509
510 for (i = 0; i < 16; i++) {
511 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
512 seq_printf(m, "P%02dVIDFREQ: 0x%08x\n", i, delayfreq);
513 }
514
515 return 0;
516}
517
518static inline int MAP_TO_MV(int map)
519{
520 return 1250 - (map * 25);
521}
522
523static int i915_inttoext_table(struct seq_file *m, void *unused)
524{
525 struct drm_info_node *node = (struct drm_info_node *) m->private;
526 struct drm_device *dev = node->minor->dev;
527 drm_i915_private_t *dev_priv = dev->dev_private;
528 u32 inttoext;
529 int i;
530
531 for (i = 1; i <= 32; i++) {
532 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
533 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
534 }
535
536 return 0;
537}
538
539static int i915_drpc_info(struct seq_file *m, void *unused)
540{
541 struct drm_info_node *node = (struct drm_info_node *) m->private;
542 struct drm_device *dev = node->minor->dev;
543 drm_i915_private_t *dev_priv = dev->dev_private;
544 u32 rgvmodectl = I915_READ(MEMMODECTL);
545
546 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
547 "yes" : "no");
548 seq_printf(m, "Boost freq: %d\n",
549 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
550 MEMMODE_BOOST_FREQ_SHIFT);
551 seq_printf(m, "HW control enabled: %s\n",
552 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
553 seq_printf(m, "SW control enabled: %s\n",
554 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
555 seq_printf(m, "Gated voltage change: %s\n",
556 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
557 seq_printf(m, "Starting frequency: P%d\n",
558 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
559 seq_printf(m, "Max frequency: P%d\n",
560 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
561 seq_printf(m, "Min frequency: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
562
563 return 0;
564}
565
566static int i915_fbc_status(struct seq_file *m, void *unused)
567{
568 struct drm_info_node *node = (struct drm_info_node *) m->private;
569 struct drm_device *dev = node->minor->dev;
570 struct drm_crtc *crtc;
571 drm_i915_private_t *dev_priv = dev->dev_private;
572 bool fbc_enabled = false;
573
574 if (!dev_priv->display.fbc_enabled) {
575 seq_printf(m, "FBC unsupported on this chipset\n");
576 return 0;
577 }
578
579 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
580 if (!crtc->enabled)
581 continue;
582 if (dev_priv->display.fbc_enabled(crtc))
583 fbc_enabled = true;
584 }
585
586 if (fbc_enabled) {
587 seq_printf(m, "FBC enabled\n");
588 } else {
589 seq_printf(m, "FBC disabled: ");
590 switch (dev_priv->no_fbc_reason) {
591 case FBC_STOLEN_TOO_SMALL:
592 seq_printf(m, "not enough stolen memory");
593 break;
594 case FBC_UNSUPPORTED_MODE:
595 seq_printf(m, "mode not supported");
596 break;
597 case FBC_MODE_TOO_LARGE:
598 seq_printf(m, "mode too large");
599 break;
600 case FBC_BAD_PLANE:
601 seq_printf(m, "FBC unsupported on plane");
602 break;
603 case FBC_NOT_TILED:
604 seq_printf(m, "scanout buffer not tiled");
605 break;
606 default:
607 seq_printf(m, "unknown reason");
608 }
609 seq_printf(m, "\n");
610 }
611 return 0;
612}
613
614static int i915_sr_status(struct seq_file *m, void *unused)
615{
616 struct drm_info_node *node = (struct drm_info_node *) m->private;
617 struct drm_device *dev = node->minor->dev;
618 drm_i915_private_t *dev_priv = dev->dev_private;
619 bool sr_enabled = false;
620
621 if (IS_I965G(dev) || IS_I945G(dev) || IS_I945GM(dev))
622 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
623 else if (IS_I915GM(dev))
624 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
625 else if (IS_PINEVIEW(dev))
626 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
627
628 seq_printf(m, "self-refresh: %s\n", sr_enabled ? "enabled" :
629 "disabled");
630
631 return 0;
632}
633
634static int
635i915_wedged_open(struct inode *inode,
636 struct file *filp)
637{
638 filp->private_data = inode->i_private;
639 return 0;
640}
641
642static ssize_t
643i915_wedged_read(struct file *filp,
644 char __user *ubuf,
645 size_t max,
646 loff_t *ppos)
647{
648 struct drm_device *dev = filp->private_data;
649 drm_i915_private_t *dev_priv = dev->dev_private;
650 char buf[80];
651 int len;
652
653 len = snprintf(buf, sizeof (buf),
654 "wedged : %d\n",
655 atomic_read(&dev_priv->mm.wedged));
656
657 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
658}
659
660static ssize_t
661i915_wedged_write(struct file *filp,
662 const char __user *ubuf,
663 size_t cnt,
664 loff_t *ppos)
665{
666 struct drm_device *dev = filp->private_data;
667 drm_i915_private_t *dev_priv = dev->dev_private;
668 char buf[20];
669 int val = 1;
670
671 if (cnt > 0) {
672 if (cnt > sizeof (buf) - 1)
673 return -EINVAL;
674
675 if (copy_from_user(buf, ubuf, cnt))
676 return -EFAULT;
677 buf[cnt] = 0;
678
679 val = simple_strtoul(buf, NULL, 0);
680 }
681
682 DRM_INFO("Manually setting wedged to %d\n", val);
683
684 atomic_set(&dev_priv->mm.wedged, val);
685 if (val) {
686 DRM_WAKEUP(&dev_priv->irq_queue);
687 queue_work(dev_priv->wq, &dev_priv->error_work);
688 }
689
690 return cnt;
691}
692
693static const struct file_operations i915_wedged_fops = {
694 .owner = THIS_MODULE,
695 .open = i915_wedged_open,
696 .read = i915_wedged_read,
697 .write = i915_wedged_write,
698};
699
700/* As the drm_debugfs_init() routines are called before dev->dev_private is
701 * allocated we need to hook into the minor for release. */
702static int
703drm_add_fake_info_node(struct drm_minor *minor,
704 struct dentry *ent,
705 const void *key)
706{
707 struct drm_info_node *node;
708
709 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
710 if (node == NULL) {
711 debugfs_remove(ent);
712 return -ENOMEM;
713 }
714
715 node->minor = minor;
716 node->dent = ent;
717 node->info_ent = (void *) key;
718 list_add(&node->list, &minor->debugfs_nodes.list);
719
720 return 0;
721}
722
723static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
724{
725 struct drm_device *dev = minor->dev;
726 struct dentry *ent;
727
728 ent = debugfs_create_file("i915_wedged",
729 S_IRUGO | S_IWUSR,
730 root, dev,
731 &i915_wedged_fops);
732 if (IS_ERR(ent))
733 return PTR_ERR(ent);
734
735 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
736}
415 737
416static struct drm_info_list i915_debugfs_list[] = { 738static struct drm_info_list i915_debugfs_list[] = {
417 {"i915_regs", i915_registers_info, 0},
418 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, 739 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
419 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, 740 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
420 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, 741 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
@@ -427,11 +748,24 @@ static struct drm_info_list i915_debugfs_list[] = {
427 {"i915_ringbuffer_info", i915_ringbuffer_info, 0}, 748 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
428 {"i915_batchbuffers", i915_batchbuffer_info, 0}, 749 {"i915_batchbuffers", i915_batchbuffer_info, 0},
429 {"i915_error_state", i915_error_state, 0}, 750 {"i915_error_state", i915_error_state, 0},
751 {"i915_rstdby_delays", i915_rstdby_delays, 0},
752 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
753 {"i915_delayfreq_table", i915_delayfreq_table, 0},
754 {"i915_inttoext_table", i915_inttoext_table, 0},
755 {"i915_drpc_info", i915_drpc_info, 0},
756 {"i915_fbc_status", i915_fbc_status, 0},
757 {"i915_sr_status", i915_sr_status, 0},
430}; 758};
431#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) 759#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
432 760
433int i915_debugfs_init(struct drm_minor *minor) 761int i915_debugfs_init(struct drm_minor *minor)
434{ 762{
763 int ret;
764
765 ret = i915_wedged_create(minor->debugfs_root, minor);
766 if (ret)
767 return ret;
768
435 return drm_debugfs_create_files(i915_debugfs_list, 769 return drm_debugfs_create_files(i915_debugfs_list,
436 I915_DEBUGFS_ENTRIES, 770 I915_DEBUGFS_ENTRIES,
437 minor->debugfs_root, minor); 771 minor->debugfs_root, minor);
@@ -441,7 +775,8 @@ void i915_debugfs_cleanup(struct drm_minor *minor)
441{ 775{
442 drm_debugfs_remove_files(i915_debugfs_list, 776 drm_debugfs_remove_files(i915_debugfs_list,
443 I915_DEBUGFS_ENTRIES, minor); 777 I915_DEBUGFS_ENTRIES, minor);
778 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
779 1, minor);
444} 780}
445 781
446#endif /* CONFIG_DEBUG_FS */ 782#endif /* CONFIG_DEBUG_FS */
447