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path: root/drivers/gpu/drm/drm_dp_helper.c
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Diffstat (limited to 'drivers/gpu/drm/drm_dp_helper.c')
-rw-r--r--drivers/gpu/drm/drm_dp_helper.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 89e196627160..9e978aae8972 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -228,12 +228,12 @@ i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
228EXPORT_SYMBOL(i2c_dp_aux_add_bus); 228EXPORT_SYMBOL(i2c_dp_aux_add_bus);
229 229
230/* Helpers for DP link training */ 230/* Helpers for DP link training */
231static u8 dp_link_status(u8 link_status[DP_LINK_STATUS_SIZE], int r) 231static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
232{ 232{
233 return link_status[r - DP_LANE0_1_STATUS]; 233 return link_status[r - DP_LANE0_1_STATUS];
234} 234}
235 235
236static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE], 236static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
237 int lane) 237 int lane)
238{ 238{
239 int i = DP_LANE0_1_STATUS + (lane >> 1); 239 int i = DP_LANE0_1_STATUS + (lane >> 1);
@@ -242,7 +242,7 @@ static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE],
242 return (l >> s) & 0xf; 242 return (l >> s) & 0xf;
243} 243}
244 244
245bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE], 245bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
246 int lane_count) 246 int lane_count)
247{ 247{
248 u8 lane_align; 248 u8 lane_align;
@@ -262,7 +262,7 @@ bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE],
262} 262}
263EXPORT_SYMBOL(drm_dp_channel_eq_ok); 263EXPORT_SYMBOL(drm_dp_channel_eq_ok);
264 264
265bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE], 265bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
266 int lane_count) 266 int lane_count)
267{ 267{
268 int lane; 268 int lane;
@@ -277,7 +277,7 @@ bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE],
277} 277}
278EXPORT_SYMBOL(drm_dp_clock_recovery_ok); 278EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
279 279
280u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], 280u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
281 int lane) 281 int lane)
282{ 282{
283 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); 283 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
@@ -290,7 +290,7 @@ u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],
290} 290}
291EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage); 291EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
292 292
293u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], 293u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
294 int lane) 294 int lane)
295{ 295{
296 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); 296 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
@@ -303,7 +303,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
303} 303}
304EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); 304EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
305 305
306void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { 306void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
307 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) 307 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
308 udelay(100); 308 udelay(100);
309 else 309 else
@@ -311,7 +311,7 @@ void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
311} 311}
312EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); 312EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
313 313
314void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { 314void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
315 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) 315 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
316 udelay(400); 316 udelay(400);
317 else 317 else