diff options
Diffstat (limited to 'drivers/gpio/gpio-samsung.c')
-rw-r--r-- | drivers/gpio/gpio-samsung.c | 240 |
1 files changed, 0 insertions, 240 deletions
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 7d4281e0d901..27298fd212d7 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c | |||
@@ -1169,234 +1169,9 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = { | |||
1169 | #endif | 1169 | #endif |
1170 | }; | 1170 | }; |
1171 | 1171 | ||
1172 | /* | ||
1173 | * Followings are the gpio banks in S5PV210/S5PC110 | ||
1174 | * | ||
1175 | * The 'config' member when left to NULL, is initialized to the default | ||
1176 | * structure samsung_gpio_cfgs[3] in the init function below. | ||
1177 | * | ||
1178 | * The 'base' member is also initialized in the init function below. | ||
1179 | * Note: The initialization of 'base' member of samsung_gpio_chip structure | ||
1180 | * uses the above macro and depends on the banks being listed in order here. | ||
1181 | */ | ||
1182 | |||
1183 | static struct samsung_gpio_chip s5pv210_gpios_4bit[] = { | ||
1184 | #ifdef CONFIG_CPU_S5PV210 | ||
1185 | { | ||
1186 | .chip = { | ||
1187 | .base = S5PV210_GPA0(0), | ||
1188 | .ngpio = S5PV210_GPIO_A0_NR, | ||
1189 | .label = "GPA0", | ||
1190 | }, | ||
1191 | }, { | ||
1192 | .chip = { | ||
1193 | .base = S5PV210_GPA1(0), | ||
1194 | .ngpio = S5PV210_GPIO_A1_NR, | ||
1195 | .label = "GPA1", | ||
1196 | }, | ||
1197 | }, { | ||
1198 | .chip = { | ||
1199 | .base = S5PV210_GPB(0), | ||
1200 | .ngpio = S5PV210_GPIO_B_NR, | ||
1201 | .label = "GPB", | ||
1202 | }, | ||
1203 | }, { | ||
1204 | .chip = { | ||
1205 | .base = S5PV210_GPC0(0), | ||
1206 | .ngpio = S5PV210_GPIO_C0_NR, | ||
1207 | .label = "GPC0", | ||
1208 | }, | ||
1209 | }, { | ||
1210 | .chip = { | ||
1211 | .base = S5PV210_GPC1(0), | ||
1212 | .ngpio = S5PV210_GPIO_C1_NR, | ||
1213 | .label = "GPC1", | ||
1214 | }, | ||
1215 | }, { | ||
1216 | .chip = { | ||
1217 | .base = S5PV210_GPD0(0), | ||
1218 | .ngpio = S5PV210_GPIO_D0_NR, | ||
1219 | .label = "GPD0", | ||
1220 | }, | ||
1221 | }, { | ||
1222 | .chip = { | ||
1223 | .base = S5PV210_GPD1(0), | ||
1224 | .ngpio = S5PV210_GPIO_D1_NR, | ||
1225 | .label = "GPD1", | ||
1226 | }, | ||
1227 | }, { | ||
1228 | .chip = { | ||
1229 | .base = S5PV210_GPE0(0), | ||
1230 | .ngpio = S5PV210_GPIO_E0_NR, | ||
1231 | .label = "GPE0", | ||
1232 | }, | ||
1233 | }, { | ||
1234 | .chip = { | ||
1235 | .base = S5PV210_GPE1(0), | ||
1236 | .ngpio = S5PV210_GPIO_E1_NR, | ||
1237 | .label = "GPE1", | ||
1238 | }, | ||
1239 | }, { | ||
1240 | .chip = { | ||
1241 | .base = S5PV210_GPF0(0), | ||
1242 | .ngpio = S5PV210_GPIO_F0_NR, | ||
1243 | .label = "GPF0", | ||
1244 | }, | ||
1245 | }, { | ||
1246 | .chip = { | ||
1247 | .base = S5PV210_GPF1(0), | ||
1248 | .ngpio = S5PV210_GPIO_F1_NR, | ||
1249 | .label = "GPF1", | ||
1250 | }, | ||
1251 | }, { | ||
1252 | .chip = { | ||
1253 | .base = S5PV210_GPF2(0), | ||
1254 | .ngpio = S5PV210_GPIO_F2_NR, | ||
1255 | .label = "GPF2", | ||
1256 | }, | ||
1257 | }, { | ||
1258 | .chip = { | ||
1259 | .base = S5PV210_GPF3(0), | ||
1260 | .ngpio = S5PV210_GPIO_F3_NR, | ||
1261 | .label = "GPF3", | ||
1262 | }, | ||
1263 | }, { | ||
1264 | .chip = { | ||
1265 | .base = S5PV210_GPG0(0), | ||
1266 | .ngpio = S5PV210_GPIO_G0_NR, | ||
1267 | .label = "GPG0", | ||
1268 | }, | ||
1269 | }, { | ||
1270 | .chip = { | ||
1271 | .base = S5PV210_GPG1(0), | ||
1272 | .ngpio = S5PV210_GPIO_G1_NR, | ||
1273 | .label = "GPG1", | ||
1274 | }, | ||
1275 | }, { | ||
1276 | .chip = { | ||
1277 | .base = S5PV210_GPG2(0), | ||
1278 | .ngpio = S5PV210_GPIO_G2_NR, | ||
1279 | .label = "GPG2", | ||
1280 | }, | ||
1281 | }, { | ||
1282 | .chip = { | ||
1283 | .base = S5PV210_GPG3(0), | ||
1284 | .ngpio = S5PV210_GPIO_G3_NR, | ||
1285 | .label = "GPG3", | ||
1286 | }, | ||
1287 | }, { | ||
1288 | .chip = { | ||
1289 | .base = S5PV210_GPI(0), | ||
1290 | .ngpio = S5PV210_GPIO_I_NR, | ||
1291 | .label = "GPI", | ||
1292 | }, | ||
1293 | }, { | ||
1294 | .chip = { | ||
1295 | .base = S5PV210_GPJ0(0), | ||
1296 | .ngpio = S5PV210_GPIO_J0_NR, | ||
1297 | .label = "GPJ0", | ||
1298 | }, | ||
1299 | }, { | ||
1300 | .chip = { | ||
1301 | .base = S5PV210_GPJ1(0), | ||
1302 | .ngpio = S5PV210_GPIO_J1_NR, | ||
1303 | .label = "GPJ1", | ||
1304 | }, | ||
1305 | }, { | ||
1306 | .chip = { | ||
1307 | .base = S5PV210_GPJ2(0), | ||
1308 | .ngpio = S5PV210_GPIO_J2_NR, | ||
1309 | .label = "GPJ2", | ||
1310 | }, | ||
1311 | }, { | ||
1312 | .chip = { | ||
1313 | .base = S5PV210_GPJ3(0), | ||
1314 | .ngpio = S5PV210_GPIO_J3_NR, | ||
1315 | .label = "GPJ3", | ||
1316 | }, | ||
1317 | }, { | ||
1318 | .chip = { | ||
1319 | .base = S5PV210_GPJ4(0), | ||
1320 | .ngpio = S5PV210_GPIO_J4_NR, | ||
1321 | .label = "GPJ4", | ||
1322 | }, | ||
1323 | }, { | ||
1324 | .chip = { | ||
1325 | .base = S5PV210_MP01(0), | ||
1326 | .ngpio = S5PV210_GPIO_MP01_NR, | ||
1327 | .label = "MP01", | ||
1328 | }, | ||
1329 | }, { | ||
1330 | .chip = { | ||
1331 | .base = S5PV210_MP02(0), | ||
1332 | .ngpio = S5PV210_GPIO_MP02_NR, | ||
1333 | .label = "MP02", | ||
1334 | }, | ||
1335 | }, { | ||
1336 | .chip = { | ||
1337 | .base = S5PV210_MP03(0), | ||
1338 | .ngpio = S5PV210_GPIO_MP03_NR, | ||
1339 | .label = "MP03", | ||
1340 | }, | ||
1341 | }, { | ||
1342 | .chip = { | ||
1343 | .base = S5PV210_MP04(0), | ||
1344 | .ngpio = S5PV210_GPIO_MP04_NR, | ||
1345 | .label = "MP04", | ||
1346 | }, | ||
1347 | }, { | ||
1348 | .chip = { | ||
1349 | .base = S5PV210_MP05(0), | ||
1350 | .ngpio = S5PV210_GPIO_MP05_NR, | ||
1351 | .label = "MP05", | ||
1352 | }, | ||
1353 | }, { | ||
1354 | .base = (S5P_VA_GPIO + 0xC00), | ||
1355 | .irq_base = IRQ_EINT(0), | ||
1356 | .chip = { | ||
1357 | .base = S5PV210_GPH0(0), | ||
1358 | .ngpio = S5PV210_GPIO_H0_NR, | ||
1359 | .label = "GPH0", | ||
1360 | .to_irq = samsung_gpiolib_to_irq, | ||
1361 | }, | ||
1362 | }, { | ||
1363 | .base = (S5P_VA_GPIO + 0xC20), | ||
1364 | .irq_base = IRQ_EINT(8), | ||
1365 | .chip = { | ||
1366 | .base = S5PV210_GPH1(0), | ||
1367 | .ngpio = S5PV210_GPIO_H1_NR, | ||
1368 | .label = "GPH1", | ||
1369 | .to_irq = samsung_gpiolib_to_irq, | ||
1370 | }, | ||
1371 | }, { | ||
1372 | .base = (S5P_VA_GPIO + 0xC40), | ||
1373 | .irq_base = IRQ_EINT(16), | ||
1374 | .chip = { | ||
1375 | .base = S5PV210_GPH2(0), | ||
1376 | .ngpio = S5PV210_GPIO_H2_NR, | ||
1377 | .label = "GPH2", | ||
1378 | .to_irq = samsung_gpiolib_to_irq, | ||
1379 | }, | ||
1380 | }, { | ||
1381 | .base = (S5P_VA_GPIO + 0xC60), | ||
1382 | .irq_base = IRQ_EINT(24), | ||
1383 | .chip = { | ||
1384 | .base = S5PV210_GPH3(0), | ||
1385 | .ngpio = S5PV210_GPIO_H3_NR, | ||
1386 | .label = "GPH3", | ||
1387 | .to_irq = samsung_gpiolib_to_irq, | ||
1388 | }, | ||
1389 | }, | ||
1390 | #endif | ||
1391 | }; | ||
1392 | |||
1393 | /* TODO: cleanup soc_is_* */ | 1172 | /* TODO: cleanup soc_is_* */ |
1394 | static __init int samsung_gpiolib_init(void) | 1173 | static __init int samsung_gpiolib_init(void) |
1395 | { | 1174 | { |
1396 | struct samsung_gpio_chip *chip; | ||
1397 | int i, nr_chips; | ||
1398 | int group = 0; | ||
1399 | |||
1400 | /* | 1175 | /* |
1401 | * Currently there are two drivers that can provide GPIO support for | 1176 | * Currently there are two drivers that can provide GPIO support for |
1402 | * Samsung SoCs. For device tree enabled platforms, the new | 1177 | * Samsung SoCs. For device tree enabled platforms, the new |
@@ -1420,21 +1195,6 @@ static __init int samsung_gpiolib_init(void) | |||
1420 | S3C64XX_VA_GPIO); | 1195 | S3C64XX_VA_GPIO); |
1421 | samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, | 1196 | samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, |
1422 | ARRAY_SIZE(s3c64xx_gpios_4bit2)); | 1197 | ARRAY_SIZE(s3c64xx_gpios_4bit2)); |
1423 | } else if (soc_is_s5pv210()) { | ||
1424 | group = 0; | ||
1425 | chip = s5pv210_gpios_4bit; | ||
1426 | nr_chips = ARRAY_SIZE(s5pv210_gpios_4bit); | ||
1427 | |||
1428 | for (i = 0; i < nr_chips; i++, chip++) { | ||
1429 | if (!chip->config) { | ||
1430 | chip->config = &samsung_gpio_cfgs[3]; | ||
1431 | chip->group = group++; | ||
1432 | } | ||
1433 | } | ||
1434 | samsung_gpiolib_add_4bit_chips(s5pv210_gpios_4bit, nr_chips, S5P_VA_GPIO); | ||
1435 | #if defined(CONFIG_CPU_S5PV210) && defined(CONFIG_S5P_GPIO_INT) | ||
1436 | s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR); | ||
1437 | #endif | ||
1438 | } else { | 1198 | } else { |
1439 | WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n"); | 1199 | WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n"); |
1440 | return -ENODEV; | 1200 | return -ENODEV; |