diff options
Diffstat (limited to 'drivers/gpio/gpio-davinci.c')
-rw-r--r-- | drivers/gpio/gpio-davinci.c | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index df0d59570a84..3d000169285d 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c | |||
@@ -313,10 +313,16 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) | |||
313 | return -ENODEV; | 313 | return -ENODEV; |
314 | } | 314 | } |
315 | 315 | ||
316 | static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger) | 316 | static int gpio_irq_type_unbanked(struct irq_data *data, unsigned trigger) |
317 | { | 317 | { |
318 | struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); | 318 | struct davinci_gpio_controller *d; |
319 | u32 mask = (u32) irq_data_get_irq_handler_data(d); | 319 | struct davinci_gpio_regs __iomem *g; |
320 | struct davinci_soc_info *soc_info = &davinci_soc_info; | ||
321 | u32 mask; | ||
322 | |||
323 | d = (struct davinci_gpio_controller *)data->handler_data; | ||
324 | g = (struct davinci_gpio_regs __iomem *)d->regs; | ||
325 | mask = __gpio_mask(data->irq - soc_info->gpio_irq); | ||
320 | 326 | ||
321 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) | 327 | if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
322 | return -EINVAL; | 328 | return -EINVAL; |
@@ -380,7 +386,7 @@ static int __init davinci_gpio_irq_setup(void) | |||
380 | * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs. | 386 | * IRQ mux conflicts; gpio_irq_type_unbanked() is only for GPIOs. |
381 | */ | 387 | */ |
382 | if (soc_info->gpio_unbanked) { | 388 | if (soc_info->gpio_unbanked) { |
383 | static struct irq_chip gpio_irqchip_unbanked; | 389 | static struct irq_chip_type gpio_unbanked; |
384 | 390 | ||
385 | /* pass "bank 0" GPIO IRQs to AINTC */ | 391 | /* pass "bank 0" GPIO IRQs to AINTC */ |
386 | chips[0].chip.to_irq = gpio_to_irq_unbanked; | 392 | chips[0].chip.to_irq = gpio_to_irq_unbanked; |
@@ -388,9 +394,10 @@ static int __init davinci_gpio_irq_setup(void) | |||
388 | 394 | ||
389 | /* AINTC handles mask/unmask; GPIO handles triggering */ | 395 | /* AINTC handles mask/unmask; GPIO handles triggering */ |
390 | irq = bank_irq; | 396 | irq = bank_irq; |
391 | gpio_irqchip_unbanked = *irq_get_chip(irq); | 397 | gpio_unbanked = *container_of(irq_get_chip(irq), |
392 | gpio_irqchip_unbanked.name = "GPIO-AINTC"; | 398 | struct irq_chip_type, chip); |
393 | gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked; | 399 | gpio_unbanked.chip.name = "GPIO-AINTC"; |
400 | gpio_unbanked.chip.irq_set_type = gpio_irq_type_unbanked; | ||
394 | 401 | ||
395 | /* default trigger: both edges */ | 402 | /* default trigger: both edges */ |
396 | g = gpio2regs(0); | 403 | g = gpio2regs(0); |
@@ -399,9 +406,8 @@ static int __init davinci_gpio_irq_setup(void) | |||
399 | 406 | ||
400 | /* set the direct IRQs up to use that irqchip */ | 407 | /* set the direct IRQs up to use that irqchip */ |
401 | for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) { | 408 | for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) { |
402 | irq_set_chip(irq, &gpio_irqchip_unbanked); | 409 | irq_set_chip(irq, &gpio_unbanked.chip); |
403 | irq_set_handler_data(irq, (void *)__gpio_mask(gpio)); | 410 | irq_set_handler_data(irq, &chips[gpio / 32]); |
404 | irq_set_chip_data(irq, (__force void *)g); | ||
405 | irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH); | 411 | irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH); |
406 | } | 412 | } |
407 | 413 | ||