diff options
Diffstat (limited to 'drivers/dma/mv_xor.h')
-rw-r--r-- | drivers/dma/mv_xor.h | 62 |
1 files changed, 29 insertions, 33 deletions
diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h index d0749229c875..78edc7e44569 100644 --- a/drivers/dma/mv_xor.h +++ b/drivers/dma/mv_xor.h | |||
@@ -23,17 +23,22 @@ | |||
23 | #include <linux/dmaengine.h> | 23 | #include <linux/dmaengine.h> |
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | 25 | ||
26 | #define USE_TIMER | ||
27 | #define MV_XOR_POOL_SIZE PAGE_SIZE | 26 | #define MV_XOR_POOL_SIZE PAGE_SIZE |
28 | #define MV_XOR_SLOT_SIZE 64 | 27 | #define MV_XOR_SLOT_SIZE 64 |
29 | #define MV_XOR_THRESHOLD 1 | 28 | #define MV_XOR_THRESHOLD 1 |
30 | #define MV_XOR_MAX_CHANNELS 2 | 29 | #define MV_XOR_MAX_CHANNELS 2 |
31 | 30 | ||
31 | #define MV_XOR_MIN_BYTE_COUNT SZ_128 | ||
32 | #define MV_XOR_MAX_BYTE_COUNT (SZ_16M - 1) | ||
33 | |||
32 | /* Values for the XOR_CONFIG register */ | 34 | /* Values for the XOR_CONFIG register */ |
33 | #define XOR_OPERATION_MODE_XOR 0 | 35 | #define XOR_OPERATION_MODE_XOR 0 |
34 | #define XOR_OPERATION_MODE_MEMCPY 2 | 36 | #define XOR_OPERATION_MODE_MEMCPY 2 |
35 | #define XOR_DESCRIPTOR_SWAP BIT(14) | 37 | #define XOR_DESCRIPTOR_SWAP BIT(14) |
36 | 38 | ||
39 | #define XOR_DESC_DMA_OWNED BIT(31) | ||
40 | #define XOR_DESC_EOD_INT_EN BIT(31) | ||
41 | |||
37 | #define XOR_CURR_DESC(chan) (chan->mmr_high_base + 0x10 + (chan->idx * 4)) | 42 | #define XOR_CURR_DESC(chan) (chan->mmr_high_base + 0x10 + (chan->idx * 4)) |
38 | #define XOR_NEXT_DESC(chan) (chan->mmr_high_base + 0x00 + (chan->idx * 4)) | 43 | #define XOR_NEXT_DESC(chan) (chan->mmr_high_base + 0x00 + (chan->idx * 4)) |
39 | #define XOR_BYTE_COUNT(chan) (chan->mmr_high_base + 0x20 + (chan->idx * 4)) | 44 | #define XOR_BYTE_COUNT(chan) (chan->mmr_high_base + 0x20 + (chan->idx * 4)) |
@@ -48,7 +53,24 @@ | |||
48 | #define XOR_INTR_MASK(chan) (chan->mmr_base + 0x40) | 53 | #define XOR_INTR_MASK(chan) (chan->mmr_base + 0x40) |
49 | #define XOR_ERROR_CAUSE(chan) (chan->mmr_base + 0x50) | 54 | #define XOR_ERROR_CAUSE(chan) (chan->mmr_base + 0x50) |
50 | #define XOR_ERROR_ADDR(chan) (chan->mmr_base + 0x60) | 55 | #define XOR_ERROR_ADDR(chan) (chan->mmr_base + 0x60) |
51 | #define XOR_INTR_MASK_VALUE 0x3F5 | 56 | |
57 | #define XOR_INT_END_OF_DESC BIT(0) | ||
58 | #define XOR_INT_END_OF_CHAIN BIT(1) | ||
59 | #define XOR_INT_STOPPED BIT(2) | ||
60 | #define XOR_INT_PAUSED BIT(3) | ||
61 | #define XOR_INT_ERR_DECODE BIT(4) | ||
62 | #define XOR_INT_ERR_RDPROT BIT(5) | ||
63 | #define XOR_INT_ERR_WRPROT BIT(6) | ||
64 | #define XOR_INT_ERR_OWN BIT(7) | ||
65 | #define XOR_INT_ERR_PAR BIT(8) | ||
66 | #define XOR_INT_ERR_MBUS BIT(9) | ||
67 | |||
68 | #define XOR_INTR_ERRORS (XOR_INT_ERR_DECODE | XOR_INT_ERR_RDPROT | \ | ||
69 | XOR_INT_ERR_WRPROT | XOR_INT_ERR_OWN | \ | ||
70 | XOR_INT_ERR_PAR | XOR_INT_ERR_MBUS) | ||
71 | |||
72 | #define XOR_INTR_MASK_VALUE (XOR_INT_END_OF_DESC | XOR_INT_END_OF_CHAIN | \ | ||
73 | XOR_INT_STOPPED | XOR_INTR_ERRORS) | ||
52 | 74 | ||
53 | #define WINDOW_BASE(w) (0x50 + ((w) << 2)) | 75 | #define WINDOW_BASE(w) (0x50 + ((w) << 2)) |
54 | #define WINDOW_SIZE(w) (0x70 + ((w) << 2)) | 76 | #define WINDOW_SIZE(w) (0x70 + ((w) << 2)) |
@@ -97,10 +119,9 @@ struct mv_xor_chan { | |||
97 | struct list_head all_slots; | 119 | struct list_head all_slots; |
98 | int slots_allocated; | 120 | int slots_allocated; |
99 | struct tasklet_struct irq_tasklet; | 121 | struct tasklet_struct irq_tasklet; |
100 | #ifdef USE_TIMER | 122 | char dummy_src[MV_XOR_MIN_BYTE_COUNT]; |
101 | unsigned long cleanup_time; | 123 | char dummy_dst[MV_XOR_MIN_BYTE_COUNT]; |
102 | u32 current_on_last_cleanup; | 124 | dma_addr_t dummy_src_addr, dummy_dst_addr; |
103 | #endif | ||
104 | }; | 125 | }; |
105 | 126 | ||
106 | /** | 127 | /** |
@@ -110,16 +131,10 @@ struct mv_xor_chan { | |||
110 | * @completed_node: node on the mv_xor_chan.completed_slots list | 131 | * @completed_node: node on the mv_xor_chan.completed_slots list |
111 | * @hw_desc: virtual address of the hardware descriptor chain | 132 | * @hw_desc: virtual address of the hardware descriptor chain |
112 | * @phys: hardware address of the hardware descriptor chain | 133 | * @phys: hardware address of the hardware descriptor chain |
113 | * @group_head: first operation in a transaction | 134 | * @slot_used: slot in use or not |
114 | * @slot_cnt: total slots used in an transaction (group of operations) | ||
115 | * @slots_per_op: number of slots per operation | ||
116 | * @idx: pool index | 135 | * @idx: pool index |
117 | * @unmap_src_cnt: number of xor sources | ||
118 | * @unmap_len: transaction bytecount | ||
119 | * @tx_list: list of slots that make up a multi-descriptor transaction | 136 | * @tx_list: list of slots that make up a multi-descriptor transaction |
120 | * @async_tx: support for the async_tx api | 137 | * @async_tx: support for the async_tx api |
121 | * @xor_check_result: result of zero sum | ||
122 | * @crc32_result: result crc calculation | ||
123 | */ | 138 | */ |
124 | struct mv_xor_desc_slot { | 139 | struct mv_xor_desc_slot { |
125 | struct list_head slot_node; | 140 | struct list_head slot_node; |
@@ -127,23 +142,9 @@ struct mv_xor_desc_slot { | |||
127 | struct list_head completed_node; | 142 | struct list_head completed_node; |
128 | enum dma_transaction_type type; | 143 | enum dma_transaction_type type; |
129 | void *hw_desc; | 144 | void *hw_desc; |
130 | struct mv_xor_desc_slot *group_head; | 145 | u16 slot_used; |
131 | u16 slot_cnt; | ||
132 | u16 slots_per_op; | ||
133 | u16 idx; | 146 | u16 idx; |
134 | u16 unmap_src_cnt; | ||
135 | u32 value; | ||
136 | size_t unmap_len; | ||
137 | struct list_head tx_list; | ||
138 | struct dma_async_tx_descriptor async_tx; | 147 | struct dma_async_tx_descriptor async_tx; |
139 | union { | ||
140 | u32 *xor_check_result; | ||
141 | u32 *crc32_result; | ||
142 | }; | ||
143 | #ifdef USE_TIMER | ||
144 | unsigned long arrival_time; | ||
145 | struct timer_list timeout; | ||
146 | #endif | ||
147 | }; | 148 | }; |
148 | 149 | ||
149 | /* | 150 | /* |
@@ -189,9 +190,4 @@ struct mv_xor_desc { | |||
189 | #define mv_hw_desc_slot_idx(hw_desc, idx) \ | 190 | #define mv_hw_desc_slot_idx(hw_desc, idx) \ |
190 | ((void *)(((unsigned long)hw_desc) + ((idx) << 5))) | 191 | ((void *)(((unsigned long)hw_desc) + ((idx) << 5))) |
191 | 192 | ||
192 | #define MV_XOR_MIN_BYTE_COUNT (128) | ||
193 | #define XOR_MAX_BYTE_COUNT ((16 * 1024 * 1024) - 1) | ||
194 | #define MV_XOR_MAX_BYTE_COUNT XOR_MAX_BYTE_COUNT | ||
195 | |||
196 | |||
197 | #endif | 193 | #endif |