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Diffstat (limited to 'drivers/dma/ioat/dma.h')
-rw-r--r--drivers/dma/ioat/dma.h53
1 files changed, 51 insertions, 2 deletions
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index 53a4cbb78f47..54fb7b9ff9aa 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -39,6 +39,7 @@
39#define to_ioat_desc(lh) container_of(lh, struct ioat_desc_sw, node) 39#define to_ioat_desc(lh) container_of(lh, struct ioat_desc_sw, node)
40#define tx_to_ioat_desc(tx) container_of(tx, struct ioat_desc_sw, txd) 40#define tx_to_ioat_desc(tx) container_of(tx, struct ioat_desc_sw, txd)
41#define to_dev(ioat_chan) (&(ioat_chan)->device->pdev->dev) 41#define to_dev(ioat_chan) (&(ioat_chan)->device->pdev->dev)
42#define to_pdev(ioat_chan) ((ioat_chan)->device->pdev)
42 43
43#define chan_num(ch) ((int)((ch)->reg_base - (ch)->device->reg_base) / 0x80) 44#define chan_num(ch) ((int)((ch)->reg_base - (ch)->device->reg_base) / 0x80)
44 45
@@ -48,6 +49,14 @@
48 */ 49 */
49#define NULL_DESC_BUFFER_SIZE 1 50#define NULL_DESC_BUFFER_SIZE 1
50 51
52enum ioat_irq_mode {
53 IOAT_NOIRQ = 0,
54 IOAT_MSIX,
55 IOAT_MSIX_SINGLE,
56 IOAT_MSI,
57 IOAT_INTX
58};
59
51/** 60/**
52 * struct ioatdma_device - internal representation of a IOAT device 61 * struct ioatdma_device - internal representation of a IOAT device
53 * @pdev: PCI-Express device 62 * @pdev: PCI-Express device
@@ -72,11 +81,16 @@ struct ioatdma_device {
72 void __iomem *reg_base; 81 void __iomem *reg_base;
73 struct pci_pool *dma_pool; 82 struct pci_pool *dma_pool;
74 struct pci_pool *completion_pool; 83 struct pci_pool *completion_pool;
84#define MAX_SED_POOLS 5
85 struct dma_pool *sed_hw_pool[MAX_SED_POOLS];
86 struct kmem_cache *sed_pool;
75 struct dma_device common; 87 struct dma_device common;
76 u8 version; 88 u8 version;
77 struct msix_entry msix_entries[4]; 89 struct msix_entry msix_entries[4];
78 struct ioat_chan_common *idx[4]; 90 struct ioat_chan_common *idx[4];
79 struct dca_provider *dca; 91 struct dca_provider *dca;
92 enum ioat_irq_mode irq_mode;
93 u32 cap;
80 void (*intr_quirk)(struct ioatdma_device *device); 94 void (*intr_quirk)(struct ioatdma_device *device);
81 int (*enumerate_channels)(struct ioatdma_device *device); 95 int (*enumerate_channels)(struct ioatdma_device *device);
82 int (*reset_hw)(struct ioat_chan_common *chan); 96 int (*reset_hw)(struct ioat_chan_common *chan);
@@ -131,6 +145,20 @@ struct ioat_dma_chan {
131 u16 active; 145 u16 active;
132}; 146};
133 147
148/**
149 * struct ioat_sed_ent - wrapper around super extended hardware descriptor
150 * @hw: hardware SED
151 * @sed_dma: dma address for the SED
152 * @list: list member
153 * @parent: point to the dma descriptor that's the parent
154 */
155struct ioat_sed_ent {
156 struct ioat_sed_raw_descriptor *hw;
157 dma_addr_t dma;
158 struct ioat_ring_ent *parent;
159 unsigned int hw_pool;
160};
161
134static inline struct ioat_chan_common *to_chan_common(struct dma_chan *c) 162static inline struct ioat_chan_common *to_chan_common(struct dma_chan *c)
135{ 163{
136 return container_of(c, struct ioat_chan_common, common); 164 return container_of(c, struct ioat_chan_common, common);
@@ -179,7 +207,7 @@ __dump_desc_dbg(struct ioat_chan_common *chan, struct ioat_dma_descriptor *hw,
179 struct device *dev = to_dev(chan); 207 struct device *dev = to_dev(chan);
180 208
181 dev_dbg(dev, "desc[%d]: (%#llx->%#llx) cookie: %d flags: %#x" 209 dev_dbg(dev, "desc[%d]: (%#llx->%#llx) cookie: %d flags: %#x"
182 " ctl: %#x (op: %d int_en: %d compl: %d)\n", id, 210 " ctl: %#10.8x (op: %#x int_en: %d compl: %d)\n", id,
183 (unsigned long long) tx->phys, 211 (unsigned long long) tx->phys,
184 (unsigned long long) hw->next, tx->cookie, tx->flags, 212 (unsigned long long) hw->next, tx->cookie, tx->flags,
185 hw->ctl, hw->ctl_f.op, hw->ctl_f.int_en, hw->ctl_f.compl_write); 213 hw->ctl, hw->ctl_f.op, hw->ctl_f.int_en, hw->ctl_f.compl_write);
@@ -201,7 +229,7 @@ ioat_chan_by_index(struct ioatdma_device *device, int index)
201 return device->idx[index]; 229 return device->idx[index];
202} 230}
203 231
204static inline u64 ioat_chansts(struct ioat_chan_common *chan) 232static inline u64 ioat_chansts_32(struct ioat_chan_common *chan)
205{ 233{
206 u8 ver = chan->device->version; 234 u8 ver = chan->device->version;
207 u64 status; 235 u64 status;
@@ -218,6 +246,26 @@ static inline u64 ioat_chansts(struct ioat_chan_common *chan)
218 return status; 246 return status;
219} 247}
220 248
249#if BITS_PER_LONG == 64
250
251static inline u64 ioat_chansts(struct ioat_chan_common *chan)
252{
253 u8 ver = chan->device->version;
254 u64 status;
255
256 /* With IOAT v3.3 the status register is 64bit. */
257 if (ver >= IOAT_VER_3_3)
258 status = readq(chan->reg_base + IOAT_CHANSTS_OFFSET(ver));
259 else
260 status = ioat_chansts_32(chan);
261
262 return status;
263}
264
265#else
266#define ioat_chansts ioat_chansts_32
267#endif
268
221static inline void ioat_start(struct ioat_chan_common *chan) 269static inline void ioat_start(struct ioat_chan_common *chan)
222{ 270{
223 u8 ver = chan->device->version; 271 u8 ver = chan->device->version;
@@ -321,6 +369,7 @@ bool ioat_cleanup_preamble(struct ioat_chan_common *chan,
321 dma_addr_t *phys_complete); 369 dma_addr_t *phys_complete);
322void ioat_kobject_add(struct ioatdma_device *device, struct kobj_type *type); 370void ioat_kobject_add(struct ioatdma_device *device, struct kobj_type *type);
323void ioat_kobject_del(struct ioatdma_device *device); 371void ioat_kobject_del(struct ioatdma_device *device);
372int ioat_dma_setup_interrupts(struct ioatdma_device *device);
324extern const struct sysfs_ops ioat_sysfs_ops; 373extern const struct sysfs_ops ioat_sysfs_ops;
325extern struct ioat_sysfs_entry ioat_version_attr; 374extern struct ioat_sysfs_entry ioat_version_attr;
326extern struct ioat_sysfs_entry ioat_cap_attr; 375extern struct ioat_sysfs_entry ioat_cap_attr;