diff options
Diffstat (limited to 'drivers/dma/fsldma.h')
-rw-r--r-- | drivers/dma/fsldma.h | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h index d56e83599825..239c20c84382 100644 --- a/drivers/dma/fsldma.h +++ b/drivers/dma/fsldma.h | |||
@@ -134,12 +134,36 @@ struct fsldma_device { | |||
134 | #define FSL_DMA_CHAN_PAUSE_EXT 0x00001000 | 134 | #define FSL_DMA_CHAN_PAUSE_EXT 0x00001000 |
135 | #define FSL_DMA_CHAN_START_EXT 0x00002000 | 135 | #define FSL_DMA_CHAN_START_EXT 0x00002000 |
136 | 136 | ||
137 | #ifdef CONFIG_PM | ||
138 | struct fsldma_chan_regs_save { | ||
139 | u32 mr; | ||
140 | }; | ||
141 | |||
142 | enum fsldma_pm_state { | ||
143 | RUNNING = 0, | ||
144 | SUSPENDED, | ||
145 | }; | ||
146 | #endif | ||
147 | |||
137 | struct fsldma_chan { | 148 | struct fsldma_chan { |
138 | char name[8]; /* Channel name */ | 149 | char name[8]; /* Channel name */ |
139 | struct fsldma_chan_regs __iomem *regs; | 150 | struct fsldma_chan_regs __iomem *regs; |
140 | spinlock_t desc_lock; /* Descriptor operation lock */ | 151 | spinlock_t desc_lock; /* Descriptor operation lock */ |
141 | struct list_head ld_pending; /* Link descriptors queue */ | 152 | /* |
142 | struct list_head ld_running; /* Link descriptors queue */ | 153 | * Descriptors which are queued to run, but have not yet been |
154 | * submitted to the hardware for execution | ||
155 | */ | ||
156 | struct list_head ld_pending; | ||
157 | /* | ||
158 | * Descriptors which are currently being executed by the hardware | ||
159 | */ | ||
160 | struct list_head ld_running; | ||
161 | /* | ||
162 | * Descriptors which have finished execution by the hardware. These | ||
163 | * descriptors have already had their cleanup actions run. They are | ||
164 | * waiting for the ACK bit to be set by the async_tx API. | ||
165 | */ | ||
166 | struct list_head ld_completed; /* Link descriptors queue */ | ||
143 | struct dma_chan common; /* DMA common channel */ | 167 | struct dma_chan common; /* DMA common channel */ |
144 | struct dma_pool *desc_pool; /* Descriptors pool */ | 168 | struct dma_pool *desc_pool; /* Descriptors pool */ |
145 | struct device *dev; /* Channel device */ | 169 | struct device *dev; /* Channel device */ |
@@ -148,6 +172,10 @@ struct fsldma_chan { | |||
148 | struct tasklet_struct tasklet; | 172 | struct tasklet_struct tasklet; |
149 | u32 feature; | 173 | u32 feature; |
150 | bool idle; /* DMA controller is idle */ | 174 | bool idle; /* DMA controller is idle */ |
175 | #ifdef CONFIG_PM | ||
176 | struct fsldma_chan_regs_save regs_save; | ||
177 | enum fsldma_pm_state pm_state; | ||
178 | #endif | ||
151 | 179 | ||
152 | void (*toggle_ext_pause)(struct fsldma_chan *fsl_chan, int enable); | 180 | void (*toggle_ext_pause)(struct fsldma_chan *fsl_chan, int enable); |
153 | void (*toggle_ext_start)(struct fsldma_chan *fsl_chan, int enable); | 181 | void (*toggle_ext_start)(struct fsldma_chan *fsl_chan, int enable); |