1 files changed, 70 insertions, 83 deletions

diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index e88588d8ecd3..fd22dd36985f 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -1690,7 +1690,7 @@ static u32 coh901318_get_bytes_left(struct dma_chan *chan)
  * Pauses a transfer without losing data. Enables power save.
  * Use this function in conjunction with coh901318_resume.
  */
-static void coh901318_pause(struct dma_chan *chan)
+static int coh901318_pause(struct dma_chan *chan)
 {
         u32 val;
         unsigned long flags;
@@ -1730,12 +1730,13 @@ static void coh901318_pause(struct dma_chan *chan)
         enable_powersave(cohc);
 
         spin_unlock_irqrestore(&cohc->lock, flags);
+        return 0;
 }
 
 /* Resumes a transfer that has been stopped via 300_dma_stop(..).
    Power save is handled.
 */
-static void coh901318_resume(struct dma_chan *chan)
+static int coh901318_resume(struct dma_chan *chan)
 {
         u32 val;
         unsigned long flags;
@@ -1760,6 +1761,7 @@ static void coh901318_resume(struct dma_chan *chan)
         }
 
         spin_unlock_irqrestore(&cohc->lock, flags);
+        return 0;
 }
 
 bool coh901318_filter_id(struct dma_chan *chan, void *chan_id)
@@ -2114,6 +2116,57 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
         return IRQ_HANDLED;
 }
 
+static int coh901318_terminate_all(struct dma_chan *chan)
+{
+        unsigned long flags;
+        struct coh901318_chan *cohc = to_coh901318_chan(chan);
+        struct coh901318_desc *cohd;
+        void __iomem *virtbase = cohc->base->virtbase;
+
+        /* The remainder of this function terminates the transfer */
+        coh901318_pause(chan);
+        spin_lock_irqsave(&cohc->lock, flags);
+
+        /* Clear any pending BE or TC interrupt */
+        if (cohc->id < 32) {
+                writel(1 << cohc->id, virtbase + COH901318_BE_INT_CLEAR1);
+                writel(1 << cohc->id, virtbase + COH901318_TC_INT_CLEAR1);
+        } else {
+                writel(1 << (cohc->id - 32), virtbase +
+                       COH901318_BE_INT_CLEAR2);
+                writel(1 << (cohc->id - 32), virtbase +
+                       COH901318_TC_INT_CLEAR2);
+        }
+
+        enable_powersave(cohc);
+
+        while ((cohd = coh901318_first_active_get(cohc))) {
+                /* release the lli allocation*/
+                coh901318_lli_free(&cohc->base->pool, &cohd->lli);
+
+                /* return desc to free-list */
+                coh901318_desc_remove(cohd);
+                coh901318_desc_free(cohc, cohd);
+        }
+
+        while ((cohd = coh901318_first_queued(cohc))) {
+                /* release the lli allocation*/
+                coh901318_lli_free(&cohc->base->pool, &cohd->lli);
+
+                /* return desc to free-list */
+                coh901318_desc_remove(cohd);
+                coh901318_desc_free(cohc, cohd);
+        }
+
+
+        cohc->nbr_active_done = 0;
+        cohc->busy = 0;
+
+        spin_unlock_irqrestore(&cohc->lock, flags);
+
+        return 0;
+}
+
 static int coh901318_alloc_chan_resources(struct dma_chan *chan)
 {
         struct coh901318_chan   *cohc = to_coh901318_chan(chan);
@@ -2156,7 +2209,7 @@ coh901318_free_chan_resources(struct dma_chan *chan)
 
         spin_unlock_irqrestore(&cohc->lock, flags);
 
-        dmaengine_terminate_all(chan);
+        coh901318_terminate_all(chan);
 }
 
 
@@ -2461,8 +2514,8 @@ static const struct burst_table burst_sizes[] = {
         },
 };
 
-static void coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
-                        struct dma_slave_config *config)
+static int coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
+                                           struct dma_slave_config *config)
 {
         struct coh901318_chan *cohc = to_coh901318_chan(chan);
         dma_addr_t addr;
@@ -2482,7 +2535,7 @@ static void coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
                 maxburst = config->dst_maxburst;
         } else {
                 dev_err(COHC_2_DEV(cohc), "illegal channel mode\n");
-                return;
+                return -EINVAL;
         }
 
         dev_dbg(COHC_2_DEV(cohc), "configure channel for %d byte transfers\n",
@@ -2528,7 +2581,7 @@ static void coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
         default:
                 dev_err(COHC_2_DEV(cohc),
                         "bad runtimeconfig: alien address width\n");
-                return;
+                return -EINVAL;
         }
 
         ctrl |= burst_sizes[i].reg;
@@ -2538,84 +2591,12 @@ static void coh901318_dma_set_runtimeconfig(struct dma_chan *chan,
 
         cohc->addr = addr;
         cohc->ctrl = ctrl;
-}
-
-static int
-coh901318_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
-                  unsigned long arg)
-{
-        unsigned long flags;
-        struct coh901318_chan *cohc = to_coh901318_chan(chan);
-        struct coh901318_desc *cohd;
-        void __iomem *virtbase = cohc->base->virtbase;
-
-        if (cmd == DMA_SLAVE_CONFIG) {
-                struct dma_slave_config *config =
-                        (struct dma_slave_config *) arg;
-
-                coh901318_dma_set_runtimeconfig(chan, config);
-                return 0;
-          }
-
-        if (cmd == DMA_PAUSE) {
-                coh901318_pause(chan);
-                return 0;
-        }
-
-        if (cmd == DMA_RESUME) {
-                coh901318_resume(chan);
-                return 0;
-        }
-
-        if (cmd != DMA_TERMINATE_ALL)
-                return -ENXIO;
-
-        /* The remainder of this function terminates the transfer */
-        coh901318_pause(chan);
-        spin_lock_irqsave(&cohc->lock, flags);
-
-        /* Clear any pending BE or TC interrupt */
-        if (cohc->id < 32) {
-                writel(1 << cohc->id, virtbase + COH901318_BE_INT_CLEAR1);
-                writel(1 << cohc->id, virtbase + COH901318_TC_INT_CLEAR1);
-        } else {
-                writel(1 << (cohc->id - 32), virtbase +
-                       COH901318_BE_INT_CLEAR2);
-                writel(1 << (cohc->id - 32), virtbase +
-                       COH901318_TC_INT_CLEAR2);
-        }
-
-        enable_powersave(cohc);
-
-        while ((cohd = coh901318_first_active_get(cohc))) {
-                /* release the lli allocation*/
-                coh901318_lli_free(&cohc->base->pool, &cohd->lli);
-
-                /* return desc to free-list */
-                coh901318_desc_remove(cohd);
-                coh901318_desc_free(cohc, cohd);
-        }
-
-        while ((cohd = coh901318_first_queued(cohc))) {
-                /* release the lli allocation*/
-                coh901318_lli_free(&cohc->base->pool, &cohd->lli);
-
-                /* return desc to free-list */
-                coh901318_desc_remove(cohd);
-                coh901318_desc_free(cohc, cohd);
-        }
-
-
-        cohc->nbr_active_done = 0;
-        cohc->busy = 0;
-
-        spin_unlock_irqrestore(&cohc->lock, flags);
 
         return 0;
 }
 
-void coh901318_base_init(struct dma_device *dma, const int *pick_chans,
-                         struct coh901318_base *base)
+static void coh901318_base_init(struct dma_device *dma, const int *pick_chans,
+                                struct coh901318_base *base)
 {
         int chans_i;
         int i = 0;
@@ -2717,7 +2698,10 @@ static int __init coh901318_probe(struct platform_device *pdev)
         base->dma_slave.device_prep_slave_sg = coh901318_prep_slave_sg;
         base->dma_slave.device_tx_status = coh901318_tx_status;
         base->dma_slave.device_issue_pending = coh901318_issue_pending;
-        base->dma_slave.device_control = coh901318_control;
+        base->dma_slave.device_config = coh901318_dma_set_runtimeconfig;
+        base->dma_slave.device_pause = coh901318_pause;
+        base->dma_slave.device_resume = coh901318_resume;
+        base->dma_slave.device_terminate_all = coh901318_terminate_all;
         base->dma_slave.dev = &pdev->dev;
 
         err = dma_async_device_register(&base->dma_slave);
@@ -2737,7 +2721,10 @@ static int __init coh901318_probe(struct platform_device *pdev)
         base->dma_memcpy.device_prep_dma_memcpy = coh901318_prep_memcpy;
         base->dma_memcpy.device_tx_status = coh901318_tx_status;
         base->dma_memcpy.device_issue_pending = coh901318_issue_pending;
-        base->dma_memcpy.device_control = coh901318_control;
+        base->dma_memcpy.device_config = coh901318_dma_set_runtimeconfig;
+        base->dma_memcpy.device_pause = coh901318_pause;
+        base->dma_memcpy.device_resume = coh901318_resume;
+        base->dma_memcpy.device_terminate_all = coh901318_terminate_all;
         base->dma_memcpy.dev = &pdev->dev;
         /*
          * This controller can only access address at even 32bit boundaries,