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-rw-r--r--drivers/crypto/Kconfig93
1 files changed, 71 insertions, 22 deletions
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index ea0b3863ad0f..e0b25de1e339 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -74,6 +74,8 @@ config ZCRYPT
74 + PCI-X Cryptographic Coprocessor (PCIXCC) 74 + PCI-X Cryptographic Coprocessor (PCIXCC)
75 + Crypto Express2 Coprocessor (CEX2C) 75 + Crypto Express2 Coprocessor (CEX2C)
76 + Crypto Express2 Accelerator (CEX2A) 76 + Crypto Express2 Accelerator (CEX2A)
77 + Crypto Express3 Coprocessor (CEX3C)
78 + Crypto Express3 Accelerator (CEX3A)
77 79
78config ZCRYPT_MONOLITHIC 80config ZCRYPT_MONOLITHIC
79 bool "Monolithic zcrypt module" 81 bool "Monolithic zcrypt module"
@@ -91,6 +93,8 @@ config CRYPTO_SHA1_S390
91 This is the s390 hardware accelerated implementation of the 93 This is the s390 hardware accelerated implementation of the
92 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 94 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
93 95
96 It is available as of z990.
97
94config CRYPTO_SHA256_S390 98config CRYPTO_SHA256_S390
95 tristate "SHA256 digest algorithm" 99 tristate "SHA256 digest algorithm"
96 depends on S390 100 depends on S390
@@ -99,8 +103,7 @@ config CRYPTO_SHA256_S390
99 This is the s390 hardware accelerated implementation of the 103 This is the s390 hardware accelerated implementation of the
100 SHA256 secure hash standard (DFIPS 180-2). 104 SHA256 secure hash standard (DFIPS 180-2).
101 105
102 This version of SHA implements a 256 bit hash with 128 bits of 106 It is available as of z9.
103 security against collision attacks.
104 107
105config CRYPTO_SHA512_S390 108config CRYPTO_SHA512_S390
106 tristate "SHA384 and SHA512 digest algorithm" 109 tristate "SHA384 and SHA512 digest algorithm"
@@ -110,10 +113,7 @@ config CRYPTO_SHA512_S390
110 This is the s390 hardware accelerated implementation of the 113 This is the s390 hardware accelerated implementation of the
111 SHA512 secure hash standard. 114 SHA512 secure hash standard.
112 115
113 This version of SHA implements a 512 bit hash with 256 bits of 116 It is available as of z10.
114 security against collision attacks. The code also includes SHA-384,
115 a 384 bit hash with 192 bits of security against collision attacks.
116
117 117
118config CRYPTO_DES_S390 118config CRYPTO_DES_S390
119 tristate "DES and Triple DES cipher algorithms" 119 tristate "DES and Triple DES cipher algorithms"
@@ -121,9 +121,12 @@ config CRYPTO_DES_S390
121 select CRYPTO_ALGAPI 121 select CRYPTO_ALGAPI
122 select CRYPTO_BLKCIPHER 122 select CRYPTO_BLKCIPHER
123 help 123 help
124 This us the s390 hardware accelerated implementation of the 124 This is the s390 hardware accelerated implementation of the
125 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 125 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
126 126
127 As of z990 the ECB and CBC mode are hardware accelerated.
128 As of z196 the CTR mode is hardware accelerated.
129
127config CRYPTO_AES_S390 130config CRYPTO_AES_S390
128 tristate "AES cipher algorithms" 131 tristate "AES cipher algorithms"
129 depends on S390 132 depends on S390
@@ -131,20 +134,15 @@ config CRYPTO_AES_S390
131 select CRYPTO_BLKCIPHER 134 select CRYPTO_BLKCIPHER
132 help 135 help
133 This is the s390 hardware accelerated implementation of the 136 This is the s390 hardware accelerated implementation of the
134 AES cipher algorithms (FIPS-197). AES uses the Rijndael 137 AES cipher algorithms (FIPS-197).
135 algorithm.
136 138
137 Rijndael appears to be consistently a very good performer in 139 As of z9 the ECB and CBC modes are hardware accelerated
138 both hardware and software across a wide range of computing 140 for 128 bit keys.
139 environments regardless of its use in feedback or non-feedback 141 As of z10 the ECB and CBC modes are hardware accelerated
140 modes. Its key setup time is excellent, and its key agility is 142 for all AES key sizes.
141 good. Rijndael's very low memory requirements make it very well 143 As of z196 the CTR mode is hardware accelerated for all AES
142 suited for restricted-space environments, in which it also 144 key sizes and XTS mode is hardware accelerated for 256 and
143 demonstrates excellent performance. Rijndael's operations are 145 512 bit keys.
144 among the easiest to defend against power and timing attacks.
145
146 On s390 the System z9-109 currently only supports the key size
147 of 128 bit.
148 146
149config S390_PRNG 147config S390_PRNG
150 tristate "Pseudo random number generator device driver" 148 tristate "Pseudo random number generator device driver"
@@ -154,8 +152,20 @@ config S390_PRNG
154 Select this option if you want to use the s390 pseudo random number 152 Select this option if you want to use the s390 pseudo random number
155 generator. The PRNG is part of the cryptographic processor functions 153 generator. The PRNG is part of the cryptographic processor functions
156 and uses triple-DES to generate secure random numbers like the 154 and uses triple-DES to generate secure random numbers like the
157 ANSI X9.17 standard. The PRNG is usable via the char device 155 ANSI X9.17 standard. User-space programs access the
158 /dev/prandom. 156 pseudo-random-number device through the char device /dev/prandom.
157
158 It is available as of z9.
159
160config CRYPTO_GHASH_S390
161 tristate "GHASH digest algorithm"
162 depends on S390
163 select CRYPTO_HASH
164 help
165 This is the s390 hardware accelerated implementation of the
166 GHASH message digest algorithm for GCM (Galois/Counter Mode).
167
168 It is available as of z196.
159 169
160config CRYPTO_DEV_MV_CESA 170config CRYPTO_DEV_MV_CESA
161 tristate "Marvell's Cryptographic Engine" 171 tristate "Marvell's Cryptographic Engine"
@@ -172,6 +182,7 @@ config CRYPTO_DEV_MV_CESA
172 182
173config CRYPTO_DEV_NIAGARA2 183config CRYPTO_DEV_NIAGARA2
174 tristate "Niagara2 Stream Processing Unit driver" 184 tristate "Niagara2 Stream Processing Unit driver"
185 select CRYPTO_DES
175 select CRYPTO_ALGAPI 186 select CRYPTO_ALGAPI
176 depends on SPARC64 187 depends on SPARC64
177 help 188 help
@@ -199,6 +210,8 @@ config CRYPTO_DEV_HIFN_795X_RNG
199 Select this option if you want to enable the random number generator 210 Select this option if you want to enable the random number generator
200 on the HIFN 795x crypto adapters. 211 on the HIFN 795x crypto adapters.
201 212
213source drivers/crypto/caam/Kconfig
214
202config CRYPTO_DEV_TALITOS 215config CRYPTO_DEV_TALITOS
203 tristate "Talitos Freescale Security Engine (SEC)" 216 tristate "Talitos Freescale Security Engine (SEC)"
204 select CRYPTO_ALGAPI 217 select CRYPTO_ALGAPI
@@ -243,4 +256,40 @@ config CRYPTO_DEV_OMAP_SHAM
243 OMAP processors have SHA1/MD5 hw accelerator. Select this if you 256 OMAP processors have SHA1/MD5 hw accelerator. Select this if you
244 want to use the OMAP module for SHA1/MD5 algorithms. 257 want to use the OMAP module for SHA1/MD5 algorithms.
245 258
259config CRYPTO_DEV_OMAP_AES
260 tristate "Support for OMAP AES hw engine"
261 depends on ARCH_OMAP2 || ARCH_OMAP3
262 select CRYPTO_AES
263 help
264 OMAP processors have AES module accelerator. Select this if you
265 want to use the OMAP module for AES algorithms.
266
267config CRYPTO_DEV_PICOXCELL
268 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
269 depends on ARCH_PICOXCELL
270 select CRYPTO_AES
271 select CRYPTO_AUTHENC
272 select CRYPTO_ALGAPI
273 select CRYPTO_DES
274 select CRYPTO_CBC
275 select CRYPTO_ECB
276 select CRYPTO_SEQIV
277 help
278 This option enables support for the hardware offload engines in the
279 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
280 and for 3gpp Layer 2 ciphering support.
281
282 Saying m here will build a module named pipcoxcell_crypto.
283
284config CRYPTO_DEV_S5P
285 tristate "Support for Samsung S5PV210 crypto accelerator"
286 depends on ARCH_S5PV210
287 select CRYPTO_AES
288 select CRYPTO_ALGAPI
289 select CRYPTO_BLKCIPHER
290 help
291 This option allows you to have support for S5P crypto acceleration.
292 Select this to offload Samsung S5PV210 or S5PC110 from AES
293 algorithms execution.
294
246endif # CRYPTO_HW 295endif # CRYPTO_HW