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-rw-r--r--drivers/cpufreq/cpufreq-cpu0.c16
-rw-r--r--drivers/cpufreq/cpufreq_governor.c6
-rw-r--r--drivers/cpufreq/intel_pstate.c34
3 files changed, 33 insertions, 23 deletions
diff --git a/drivers/cpufreq/cpufreq-cpu0.c b/drivers/cpufreq/cpufreq-cpu0.c
index 1bf6bbac3e03..09b9129c7bd3 100644
--- a/drivers/cpufreq/cpufreq-cpu0.c
+++ b/drivers/cpufreq/cpufreq-cpu0.c
@@ -130,7 +130,7 @@ static int cpu0_cpufreq_probe(struct platform_device *pdev)
130 return -ENOENT; 130 return -ENOENT;
131 } 131 }
132 132
133 cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0"); 133 cpu_reg = regulator_get_optional(cpu_dev, "cpu0");
134 if (IS_ERR(cpu_reg)) { 134 if (IS_ERR(cpu_reg)) {
135 /* 135 /*
136 * If cpu0 regulator supply node is present, but regulator is 136 * If cpu0 regulator supply node is present, but regulator is
@@ -145,23 +145,23 @@ static int cpu0_cpufreq_probe(struct platform_device *pdev)
145 PTR_ERR(cpu_reg)); 145 PTR_ERR(cpu_reg));
146 } 146 }
147 147
148 cpu_clk = devm_clk_get(cpu_dev, NULL); 148 cpu_clk = clk_get(cpu_dev, NULL);
149 if (IS_ERR(cpu_clk)) { 149 if (IS_ERR(cpu_clk)) {
150 ret = PTR_ERR(cpu_clk); 150 ret = PTR_ERR(cpu_clk);
151 pr_err("failed to get cpu0 clock: %d\n", ret); 151 pr_err("failed to get cpu0 clock: %d\n", ret);
152 goto out_put_node; 152 goto out_put_reg;
153 } 153 }
154 154
155 ret = of_init_opp_table(cpu_dev); 155 ret = of_init_opp_table(cpu_dev);
156 if (ret) { 156 if (ret) {
157 pr_err("failed to init OPP table: %d\n", ret); 157 pr_err("failed to init OPP table: %d\n", ret);
158 goto out_put_node; 158 goto out_put_clk;
159 } 159 }
160 160
161 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table); 161 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
162 if (ret) { 162 if (ret) {
163 pr_err("failed to init cpufreq table: %d\n", ret); 163 pr_err("failed to init cpufreq table: %d\n", ret);
164 goto out_put_node; 164 goto out_put_clk;
165 } 165 }
166 166
167 of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance); 167 of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
@@ -216,6 +216,12 @@ static int cpu0_cpufreq_probe(struct platform_device *pdev)
216 216
217out_free_table: 217out_free_table:
218 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table); 218 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
219out_put_clk:
220 if (!IS_ERR(cpu_clk))
221 clk_put(cpu_clk);
222out_put_reg:
223 if (!IS_ERR(cpu_reg))
224 regulator_put(cpu_reg);
219out_put_node: 225out_put_node:
220 of_node_put(np); 226 of_node_put(np);
221 return ret; 227 return ret;
diff --git a/drivers/cpufreq/cpufreq_governor.c b/drivers/cpufreq/cpufreq_governor.c
index ba43991ba98a..e1c6433b16e0 100644
--- a/drivers/cpufreq/cpufreq_governor.c
+++ b/drivers/cpufreq/cpufreq_governor.c
@@ -366,6 +366,11 @@ int cpufreq_governor_dbs(struct cpufreq_policy *policy,
366 break; 366 break;
367 367
368 case CPUFREQ_GOV_LIMITS: 368 case CPUFREQ_GOV_LIMITS:
369 mutex_lock(&dbs_data->mutex);
370 if (!cpu_cdbs->cur_policy) {
371 mutex_unlock(&dbs_data->mutex);
372 break;
373 }
369 mutex_lock(&cpu_cdbs->timer_mutex); 374 mutex_lock(&cpu_cdbs->timer_mutex);
370 if (policy->max < cpu_cdbs->cur_policy->cur) 375 if (policy->max < cpu_cdbs->cur_policy->cur)
371 __cpufreq_driver_target(cpu_cdbs->cur_policy, 376 __cpufreq_driver_target(cpu_cdbs->cur_policy,
@@ -375,6 +380,7 @@ int cpufreq_governor_dbs(struct cpufreq_policy *policy,
375 policy->min, CPUFREQ_RELATION_L); 380 policy->min, CPUFREQ_RELATION_L);
376 dbs_check_cpu(dbs_data, cpu); 381 dbs_check_cpu(dbs_data, cpu);
377 mutex_unlock(&cpu_cdbs->timer_mutex); 382 mutex_unlock(&cpu_cdbs->timer_mutex);
383 mutex_unlock(&dbs_data->mutex);
378 break; 384 break;
379 } 385 }
380 return 0; 386 return 0;
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 099967302bf2..eab8ccfe6beb 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -37,6 +37,7 @@
37#define BYT_RATIOS 0x66a 37#define BYT_RATIOS 0x66a
38#define BYT_VIDS 0x66b 38#define BYT_VIDS 0x66b
39#define BYT_TURBO_RATIOS 0x66c 39#define BYT_TURBO_RATIOS 0x66c
40#define BYT_TURBO_VIDS 0x66d
40 41
41 42
42#define FRAC_BITS 6 43#define FRAC_BITS 6
@@ -70,8 +71,9 @@ struct pstate_data {
70}; 71};
71 72
72struct vid_data { 73struct vid_data {
73 int32_t min; 74 int min;
74 int32_t max; 75 int max;
76 int turbo;
75 int32_t ratio; 77 int32_t ratio;
76}; 78};
77 79
@@ -359,14 +361,14 @@ static int byt_get_min_pstate(void)
359{ 361{
360 u64 value; 362 u64 value;
361 rdmsrl(BYT_RATIOS, value); 363 rdmsrl(BYT_RATIOS, value);
362 return (value >> 8) & 0xFF; 364 return (value >> 8) & 0x3F;
363} 365}
364 366
365static int byt_get_max_pstate(void) 367static int byt_get_max_pstate(void)
366{ 368{
367 u64 value; 369 u64 value;
368 rdmsrl(BYT_RATIOS, value); 370 rdmsrl(BYT_RATIOS, value);
369 return (value >> 16) & 0xFF; 371 return (value >> 16) & 0x3F;
370} 372}
371 373
372static int byt_get_turbo_pstate(void) 374static int byt_get_turbo_pstate(void)
@@ -393,6 +395,9 @@ static void byt_set_pstate(struct cpudata *cpudata, int pstate)
393 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max); 395 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
394 vid = fp_toint(vid_fp); 396 vid = fp_toint(vid_fp);
395 397
398 if (pstate > cpudata->pstate.max_pstate)
399 vid = cpudata->vid.turbo;
400
396 val |= vid; 401 val |= vid;
397 402
398 wrmsrl(MSR_IA32_PERF_CTL, val); 403 wrmsrl(MSR_IA32_PERF_CTL, val);
@@ -402,13 +407,17 @@ static void byt_get_vid(struct cpudata *cpudata)
402{ 407{
403 u64 value; 408 u64 value;
404 409
410
405 rdmsrl(BYT_VIDS, value); 411 rdmsrl(BYT_VIDS, value);
406 cpudata->vid.min = int_tofp((value >> 8) & 0x7f); 412 cpudata->vid.min = int_tofp((value >> 8) & 0x3f);
407 cpudata->vid.max = int_tofp((value >> 16) & 0x7f); 413 cpudata->vid.max = int_tofp((value >> 16) & 0x3f);
408 cpudata->vid.ratio = div_fp( 414 cpudata->vid.ratio = div_fp(
409 cpudata->vid.max - cpudata->vid.min, 415 cpudata->vid.max - cpudata->vid.min,
410 int_tofp(cpudata->pstate.max_pstate - 416 int_tofp(cpudata->pstate.max_pstate -
411 cpudata->pstate.min_pstate)); 417 cpudata->pstate.min_pstate));
418
419 rdmsrl(BYT_TURBO_VIDS, value);
420 cpudata->vid.turbo = value & 0x7f;
412} 421}
413 422
414 423
@@ -545,12 +554,7 @@ static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
545 554
546 if (pstate_funcs.get_vid) 555 if (pstate_funcs.get_vid)
547 pstate_funcs.get_vid(cpu); 556 pstate_funcs.get_vid(cpu);
548 557 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
549 /*
550 * goto max pstate so we don't slow up boot if we are built-in if we are
551 * a module we will take care of it during normal operation
552 */
553 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
554} 558}
555 559
556static inline void intel_pstate_calc_busy(struct cpudata *cpu, 560static inline void intel_pstate_calc_busy(struct cpudata *cpu,
@@ -695,11 +699,6 @@ static int intel_pstate_init_cpu(unsigned int cpunum)
695 cpu = all_cpu_data[cpunum]; 699 cpu = all_cpu_data[cpunum];
696 700
697 intel_pstate_get_cpu_pstates(cpu); 701 intel_pstate_get_cpu_pstates(cpu);
698 if (!cpu->pstate.current_pstate) {
699 all_cpu_data[cpunum] = NULL;
700 kfree(cpu);
701 return -ENODATA;
702 }
703 702
704 cpu->cpu = cpunum; 703 cpu->cpu = cpunum;
705 704
@@ -710,7 +709,6 @@ static int intel_pstate_init_cpu(unsigned int cpunum)
710 cpu->timer.expires = jiffies + HZ/100; 709 cpu->timer.expires = jiffies + HZ/100;
711 intel_pstate_busy_pid_reset(cpu); 710 intel_pstate_busy_pid_reset(cpu);
712 intel_pstate_sample(cpu); 711 intel_pstate_sample(cpu);
713 intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate);
714 712
715 add_timer_on(&cpu->timer, cpunum); 713 add_timer_on(&cpu->timer, cpunum);
716 714