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-rw-r--r--drivers/clocksource/Kconfig5
-rw-r--r--drivers/clocksource/Makefile2
-rw-r--r--drivers/clocksource/acpi_pm.c6
-rw-r--r--drivers/clocksource/cyclone.c10
-rw-r--r--drivers/clocksource/i8253.c88
-rw-r--r--drivers/clocksource/mmio.c73
-rw-r--r--drivers/clocksource/sh_cmt.c56
-rw-r--r--drivers/clocksource/sh_mtu2.c10
-rw-r--r--drivers/clocksource/sh_tmu.c29
-rw-r--r--drivers/clocksource/tcb_clksrc.c4
10 files changed, 217 insertions, 66 deletions
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
new file mode 100644
index 000000000000..96c921910469
--- /dev/null
+++ b/drivers/clocksource/Kconfig
@@ -0,0 +1,5 @@
1config CLKSRC_I8253
2 bool
3
4config CLKSRC_MMIO
5 bool
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index be61ece6330b..b995942a5060 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -6,3 +6,5 @@ obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += cs5535-clockevt.o
6obj-$(CONFIG_SH_TIMER_CMT) += sh_cmt.o 6obj-$(CONFIG_SH_TIMER_CMT) += sh_cmt.o
7obj-$(CONFIG_SH_TIMER_MTU2) += sh_mtu2.o 7obj-$(CONFIG_SH_TIMER_MTU2) += sh_mtu2.o
8obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o 8obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o
9obj-$(CONFIG_CLKSRC_I8253) += i8253.o
10obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c
index cfb0f5278415..effe7974aa9a 100644
--- a/drivers/clocksource/acpi_pm.c
+++ b/drivers/clocksource/acpi_pm.c
@@ -202,17 +202,21 @@ static int __init init_acpi_pm_clocksource(void)
202 printk(KERN_INFO "PM-Timer had inconsistent results:" 202 printk(KERN_INFO "PM-Timer had inconsistent results:"
203 " 0x%#llx, 0x%#llx - aborting.\n", 203 " 0x%#llx, 0x%#llx - aborting.\n",
204 value1, value2); 204 value1, value2);
205 pmtmr_ioport = 0;
205 return -EINVAL; 206 return -EINVAL;
206 } 207 }
207 if (i == ACPI_PM_READ_CHECKS) { 208 if (i == ACPI_PM_READ_CHECKS) {
208 printk(KERN_INFO "PM-Timer failed consistency check " 209 printk(KERN_INFO "PM-Timer failed consistency check "
209 " (0x%#llx) - aborting.\n", value1); 210 " (0x%#llx) - aborting.\n", value1);
211 pmtmr_ioport = 0;
210 return -ENODEV; 212 return -ENODEV;
211 } 213 }
212 } 214 }
213 215
214 if (verify_pmtmr_rate() != 0) 216 if (verify_pmtmr_rate() != 0){
217 pmtmr_ioport = 0;
215 return -ENODEV; 218 return -ENODEV;
219 }
216 220
217 return clocksource_register_hz(&clocksource_acpi_pm, 221 return clocksource_register_hz(&clocksource_acpi_pm,
218 PMTMR_TICKS_PER_SEC); 222 PMTMR_TICKS_PER_SEC);
diff --git a/drivers/clocksource/cyclone.c b/drivers/clocksource/cyclone.c
index 64e528e8bfa6..72f811f73e9c 100644
--- a/drivers/clocksource/cyclone.c
+++ b/drivers/clocksource/cyclone.c
@@ -29,8 +29,6 @@ static struct clocksource clocksource_cyclone = {
29 .rating = 250, 29 .rating = 250,
30 .read = read_cyclone, 30 .read = read_cyclone,
31 .mask = CYCLONE_TIMER_MASK, 31 .mask = CYCLONE_TIMER_MASK,
32 .mult = 10,
33 .shift = 0,
34 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 32 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
35}; 33};
36 34
@@ -108,12 +106,8 @@ static int __init init_cyclone_clocksource(void)
108 } 106 }
109 cyclone_ptr = cyclone_timer; 107 cyclone_ptr = cyclone_timer;
110 108
111 /* sort out mult/shift values: */ 109 return clocksource_register_hz(&clocksource_cyclone,
112 clocksource_cyclone.shift = 22; 110 CYCLONE_TIMER_FREQ);
113 clocksource_cyclone.mult = clocksource_hz2mult(CYCLONE_TIMER_FREQ,
114 clocksource_cyclone.shift);
115
116 return clocksource_register(&clocksource_cyclone);
117} 111}
118 112
119arch_initcall(init_cyclone_clocksource); 113arch_initcall(init_cyclone_clocksource);
diff --git a/drivers/clocksource/i8253.c b/drivers/clocksource/i8253.c
new file mode 100644
index 000000000000..225c1761b372
--- /dev/null
+++ b/drivers/clocksource/i8253.c
@@ -0,0 +1,88 @@
1/*
2 * i8253 PIT clocksource
3 */
4#include <linux/clocksource.h>
5#include <linux/init.h>
6#include <linux/io.h>
7#include <linux/spinlock.h>
8#include <linux/timex.h>
9
10#include <asm/i8253.h>
11
12/*
13 * Since the PIT overflows every tick, its not very useful
14 * to just read by itself. So use jiffies to emulate a free
15 * running counter:
16 */
17static cycle_t i8253_read(struct clocksource *cs)
18{
19 static int old_count;
20 static u32 old_jifs;
21 unsigned long flags;
22 int count;
23 u32 jifs;
24
25 raw_spin_lock_irqsave(&i8253_lock, flags);
26 /*
27 * Although our caller may have the read side of xtime_lock,
28 * this is now a seqlock, and we are cheating in this routine
29 * by having side effects on state that we cannot undo if
30 * there is a collision on the seqlock and our caller has to
31 * retry. (Namely, old_jifs and old_count.) So we must treat
32 * jiffies as volatile despite the lock. We read jiffies
33 * before latching the timer count to guarantee that although
34 * the jiffies value might be older than the count (that is,
35 * the counter may underflow between the last point where
36 * jiffies was incremented and the point where we latch the
37 * count), it cannot be newer.
38 */
39 jifs = jiffies;
40 outb_pit(0x00, PIT_MODE); /* latch the count ASAP */
41 count = inb_pit(PIT_CH0); /* read the latched count */
42 count |= inb_pit(PIT_CH0) << 8;
43
44 /* VIA686a test code... reset the latch if count > max + 1 */
45 if (count > LATCH) {
46 outb_pit(0x34, PIT_MODE);
47 outb_pit(PIT_LATCH & 0xff, PIT_CH0);
48 outb_pit(PIT_LATCH >> 8, PIT_CH0);
49 count = PIT_LATCH - 1;
50 }
51
52 /*
53 * It's possible for count to appear to go the wrong way for a
54 * couple of reasons:
55 *
56 * 1. The timer counter underflows, but we haven't handled the
57 * resulting interrupt and incremented jiffies yet.
58 * 2. Hardware problem with the timer, not giving us continuous time,
59 * the counter does small "jumps" upwards on some Pentium systems,
60 * (see c't 95/10 page 335 for Neptun bug.)
61 *
62 * Previous attempts to handle these cases intelligently were
63 * buggy, so we just do the simple thing now.
64 */
65 if (count > old_count && jifs == old_jifs)
66 count = old_count;
67
68 old_count = count;
69 old_jifs = jifs;
70
71 raw_spin_unlock_irqrestore(&i8253_lock, flags);
72
73 count = (PIT_LATCH - 1) - count;
74
75 return (cycle_t)(jifs * PIT_LATCH) + count;
76}
77
78static struct clocksource i8253_cs = {
79 .name = "pit",
80 .rating = 110,
81 .read = i8253_read,
82 .mask = CLOCKSOURCE_MASK(32),
83};
84
85int __init clocksource_i8253_init(void)
86{
87 return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
88}
diff --git a/drivers/clocksource/mmio.c b/drivers/clocksource/mmio.c
new file mode 100644
index 000000000000..c0e25125a55e
--- /dev/null
+++ b/drivers/clocksource/mmio.c
@@ -0,0 +1,73 @@
1/*
2 * Generic MMIO clocksource support
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include <linux/clocksource.h>
9#include <linux/errno.h>
10#include <linux/init.h>
11#include <linux/slab.h>
12
13struct clocksource_mmio {
14 void __iomem *reg;
15 struct clocksource clksrc;
16};
17
18static inline struct clocksource_mmio *to_mmio_clksrc(struct clocksource *c)
19{
20 return container_of(c, struct clocksource_mmio, clksrc);
21}
22
23cycle_t clocksource_mmio_readl_up(struct clocksource *c)
24{
25 return readl_relaxed(to_mmio_clksrc(c)->reg);
26}
27
28cycle_t clocksource_mmio_readl_down(struct clocksource *c)
29{
30 return ~readl_relaxed(to_mmio_clksrc(c)->reg);
31}
32
33cycle_t clocksource_mmio_readw_up(struct clocksource *c)
34{
35 return readw_relaxed(to_mmio_clksrc(c)->reg);
36}
37
38cycle_t clocksource_mmio_readw_down(struct clocksource *c)
39{
40 return ~(unsigned)readw_relaxed(to_mmio_clksrc(c)->reg);
41}
42
43/**
44 * clocksource_mmio_init - Initialize a simple mmio based clocksource
45 * @base: Virtual address of the clock readout register
46 * @name: Name of the clocksource
47 * @hz: Frequency of the clocksource in Hz
48 * @rating: Rating of the clocksource
49 * @bits: Number of valid bits
50 * @read: One of clocksource_mmio_read*() above
51 */
52int __init clocksource_mmio_init(void __iomem *base, const char *name,
53 unsigned long hz, int rating, unsigned bits,
54 cycle_t (*read)(struct clocksource *))
55{
56 struct clocksource_mmio *cs;
57
58 if (bits > 32 || bits < 16)
59 return -EINVAL;
60
61 cs = kzalloc(sizeof(struct clocksource_mmio), GFP_KERNEL);
62 if (!cs)
63 return -ENOMEM;
64
65 cs->reg = base;
66 cs->clksrc.name = name;
67 cs->clksrc.rating = rating;
68 cs->clksrc.read = read;
69 cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
70 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
71
72 return clocksource_register_hz(&cs->clksrc, hz);
73}
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index 717305d30444..dc7c033ef587 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -283,16 +283,21 @@ static void sh_cmt_clock_event_program_verify(struct sh_cmt_priv *p,
283 } while (delay); 283 } while (delay);
284} 284}
285 285
286static void sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta) 286static void __sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta)
287{ 287{
288 unsigned long flags;
289
290 if (delta > p->max_match_value) 288 if (delta > p->max_match_value)
291 dev_warn(&p->pdev->dev, "delta out of range\n"); 289 dev_warn(&p->pdev->dev, "delta out of range\n");
292 290
293 spin_lock_irqsave(&p->lock, flags);
294 p->next_match_value = delta; 291 p->next_match_value = delta;
295 sh_cmt_clock_event_program_verify(p, 0); 292 sh_cmt_clock_event_program_verify(p, 0);
293}
294
295static void sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta)
296{
297 unsigned long flags;
298
299 spin_lock_irqsave(&p->lock, flags);
300 __sh_cmt_set_next(p, delta);
296 spin_unlock_irqrestore(&p->lock, flags); 301 spin_unlock_irqrestore(&p->lock, flags);
297} 302}
298 303
@@ -308,7 +313,7 @@ static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id)
308 * isr before we end up here. 313 * isr before we end up here.
309 */ 314 */
310 if (p->flags & FLAG_CLOCKSOURCE) 315 if (p->flags & FLAG_CLOCKSOURCE)
311 p->total_cycles += p->match_value; 316 p->total_cycles += p->match_value + 1;
312 317
313 if (!(p->flags & FLAG_REPROGRAM)) 318 if (!(p->flags & FLAG_REPROGRAM))
314 p->next_match_value = p->max_match_value; 319 p->next_match_value = p->max_match_value;
@@ -359,7 +364,7 @@ static int sh_cmt_start(struct sh_cmt_priv *p, unsigned long flag)
359 364
360 /* setup timeout if no clockevent */ 365 /* setup timeout if no clockevent */
361 if ((flag == FLAG_CLOCKSOURCE) && (!(p->flags & FLAG_CLOCKEVENT))) 366 if ((flag == FLAG_CLOCKSOURCE) && (!(p->flags & FLAG_CLOCKEVENT)))
362 sh_cmt_set_next(p, p->max_match_value); 367 __sh_cmt_set_next(p, p->max_match_value);
363 out: 368 out:
364 spin_unlock_irqrestore(&p->lock, flags); 369 spin_unlock_irqrestore(&p->lock, flags);
365 370
@@ -381,7 +386,7 @@ static void sh_cmt_stop(struct sh_cmt_priv *p, unsigned long flag)
381 386
382 /* adjust the timeout to maximum if only clocksource left */ 387 /* adjust the timeout to maximum if only clocksource left */
383 if ((flag == FLAG_CLOCKEVENT) && (p->flags & FLAG_CLOCKSOURCE)) 388 if ((flag == FLAG_CLOCKEVENT) && (p->flags & FLAG_CLOCKSOURCE))
384 sh_cmt_set_next(p, p->max_match_value); 389 __sh_cmt_set_next(p, p->max_match_value);
385 390
386 spin_unlock_irqrestore(&p->lock, flags); 391 spin_unlock_irqrestore(&p->lock, flags);
387} 392}
@@ -403,7 +408,7 @@ static cycle_t sh_cmt_clocksource_read(struct clocksource *cs)
403 raw = sh_cmt_get_counter(p, &has_wrapped); 408 raw = sh_cmt_get_counter(p, &has_wrapped);
404 409
405 if (unlikely(has_wrapped)) 410 if (unlikely(has_wrapped))
406 raw += p->match_value; 411 raw += p->match_value + 1;
407 spin_unlock_irqrestore(&p->lock, flags); 412 spin_unlock_irqrestore(&p->lock, flags);
408 413
409 return value + raw; 414 return value + raw;
@@ -411,11 +416,15 @@ static cycle_t sh_cmt_clocksource_read(struct clocksource *cs)
411 416
412static int sh_cmt_clocksource_enable(struct clocksource *cs) 417static int sh_cmt_clocksource_enable(struct clocksource *cs)
413{ 418{
419 int ret;
414 struct sh_cmt_priv *p = cs_to_sh_cmt(cs); 420 struct sh_cmt_priv *p = cs_to_sh_cmt(cs);
415 421
416 p->total_cycles = 0; 422 p->total_cycles = 0;
417 423
418 return sh_cmt_start(p, FLAG_CLOCKSOURCE); 424 ret = sh_cmt_start(p, FLAG_CLOCKSOURCE);
425 if (!ret)
426 __clocksource_updatefreq_hz(cs, p->rate);
427 return ret;
419} 428}
420 429
421static void sh_cmt_clocksource_disable(struct clocksource *cs) 430static void sh_cmt_clocksource_disable(struct clocksource *cs)
@@ -443,19 +452,10 @@ static int sh_cmt_register_clocksource(struct sh_cmt_priv *p,
443 cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8); 452 cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
444 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; 453 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
445 454
446 /* clk_get_rate() needs an enabled clock */
447 clk_enable(p->clk);
448 p->rate = clk_get_rate(p->clk) / (p->width == 16) ? 512 : 8;
449 clk_disable(p->clk);
450
451 /* TODO: calculate good shift from rate and counter bit width */
452 cs->shift = 0;
453 cs->mult = clocksource_hz2mult(p->rate, cs->shift);
454
455 dev_info(&p->pdev->dev, "used as clock source\n"); 455 dev_info(&p->pdev->dev, "used as clock source\n");
456 456
457 clocksource_register(cs); 457 /* Register with dummy 1 Hz value, gets updated in ->enable() */
458 458 clocksource_register_hz(cs, 1);
459 return 0; 459 return 0;
460} 460}
461 461
@@ -478,7 +478,7 @@ static void sh_cmt_clock_event_start(struct sh_cmt_priv *p, int periodic)
478 ced->min_delta_ns = clockevent_delta2ns(0x1f, ced); 478 ced->min_delta_ns = clockevent_delta2ns(0x1f, ced);
479 479
480 if (periodic) 480 if (periodic)
481 sh_cmt_set_next(p, (p->rate + HZ/2) / HZ); 481 sh_cmt_set_next(p, ((p->rate + HZ/2) / HZ) - 1);
482 else 482 else
483 sh_cmt_set_next(p, p->max_match_value); 483 sh_cmt_set_next(p, p->max_match_value);
484} 484}
@@ -523,9 +523,9 @@ static int sh_cmt_clock_event_next(unsigned long delta,
523 523
524 BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT); 524 BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT);
525 if (likely(p->flags & FLAG_IRQCONTEXT)) 525 if (likely(p->flags & FLAG_IRQCONTEXT))
526 p->next_match_value = delta; 526 p->next_match_value = delta - 1;
527 else 527 else
528 sh_cmt_set_next(p, delta); 528 sh_cmt_set_next(p, delta - 1);
529 529
530 return 0; 530 return 0;
531} 531}
@@ -616,13 +616,9 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
616 /* get hold of clock */ 616 /* get hold of clock */
617 p->clk = clk_get(&p->pdev->dev, "cmt_fck"); 617 p->clk = clk_get(&p->pdev->dev, "cmt_fck");
618 if (IS_ERR(p->clk)) { 618 if (IS_ERR(p->clk)) {
619 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); 619 dev_err(&p->pdev->dev, "cannot get clock\n");
620 p->clk = clk_get(&p->pdev->dev, cfg->clk); 620 ret = PTR_ERR(p->clk);
621 if (IS_ERR(p->clk)) { 621 goto err1;
622 dev_err(&p->pdev->dev, "cannot get clock\n");
623 ret = PTR_ERR(p->clk);
624 goto err1;
625 }
626 } 622 }
627 623
628 if (resource_size(res) == 6) { 624 if (resource_size(res) == 6) {
diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
index ef7a5be8a09f..40630cb98237 100644
--- a/drivers/clocksource/sh_mtu2.c
+++ b/drivers/clocksource/sh_mtu2.c
@@ -287,13 +287,9 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
287 /* get hold of clock */ 287 /* get hold of clock */
288 p->clk = clk_get(&p->pdev->dev, "mtu2_fck"); 288 p->clk = clk_get(&p->pdev->dev, "mtu2_fck");
289 if (IS_ERR(p->clk)) { 289 if (IS_ERR(p->clk)) {
290 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); 290 dev_err(&p->pdev->dev, "cannot get clock\n");
291 p->clk = clk_get(&p->pdev->dev, cfg->clk); 291 ret = PTR_ERR(p->clk);
292 if (IS_ERR(p->clk)) { 292 goto err1;
293 dev_err(&p->pdev->dev, "cannot get clock\n");
294 ret = PTR_ERR(p->clk);
295 goto err1;
296 }
297 } 293 }
298 294
299 return sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev), 295 return sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index de715901b82a..808135768617 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -199,8 +199,12 @@ static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
199static int sh_tmu_clocksource_enable(struct clocksource *cs) 199static int sh_tmu_clocksource_enable(struct clocksource *cs)
200{ 200{
201 struct sh_tmu_priv *p = cs_to_sh_tmu(cs); 201 struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
202 int ret;
202 203
203 return sh_tmu_enable(p); 204 ret = sh_tmu_enable(p);
205 if (!ret)
206 __clocksource_updatefreq_hz(cs, p->rate);
207 return ret;
204} 208}
205 209
206static void sh_tmu_clocksource_disable(struct clocksource *cs) 210static void sh_tmu_clocksource_disable(struct clocksource *cs)
@@ -221,17 +225,10 @@ static int sh_tmu_register_clocksource(struct sh_tmu_priv *p,
221 cs->mask = CLOCKSOURCE_MASK(32); 225 cs->mask = CLOCKSOURCE_MASK(32);
222 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; 226 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
223 227
224 /* clk_get_rate() needs an enabled clock */
225 clk_enable(p->clk);
226 /* channel will be configured at parent clock / 4 */
227 p->rate = clk_get_rate(p->clk) / 4;
228 clk_disable(p->clk);
229 /* TODO: calculate good shift from rate and counter bit width */
230 cs->shift = 10;
231 cs->mult = clocksource_hz2mult(p->rate, cs->shift);
232
233 dev_info(&p->pdev->dev, "used as clock source\n"); 228 dev_info(&p->pdev->dev, "used as clock source\n");
234 clocksource_register(cs); 229
230 /* Register with dummy 1 Hz value, gets updated in ->enable() */
231 clocksource_register_hz(cs, 1);
235 return 0; 232 return 0;
236} 233}
237 234
@@ -393,13 +390,9 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
393 /* get hold of clock */ 390 /* get hold of clock */
394 p->clk = clk_get(&p->pdev->dev, "tmu_fck"); 391 p->clk = clk_get(&p->pdev->dev, "tmu_fck");
395 if (IS_ERR(p->clk)) { 392 if (IS_ERR(p->clk)) {
396 dev_warn(&p->pdev->dev, "using deprecated clock lookup\n"); 393 dev_err(&p->pdev->dev, "cannot get clock\n");
397 p->clk = clk_get(&p->pdev->dev, cfg->clk); 394 ret = PTR_ERR(p->clk);
398 if (IS_ERR(p->clk)) { 395 goto err1;
399 dev_err(&p->pdev->dev, "cannot get clock\n");
400 ret = PTR_ERR(p->clk);
401 goto err1;
402 }
403 } 396 }
404 397
405 return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev), 398 return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 01b886e68822..79c47e88d5d1 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -196,9 +196,9 @@ static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
196 clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1; 196 clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
197 clkevt.clkevt.cpumask = cpumask_of(0); 197 clkevt.clkevt.cpumask = cpumask_of(0);
198 198
199 setup_irq(irq, &tc_irqaction);
200
201 clockevents_register_device(&clkevt.clkevt); 199 clockevents_register_device(&clkevt.clkevt);
200
201 setup_irq(irq, &tc_irqaction);
202} 202}
203 203
204#else /* !CONFIG_GENERIC_CLOCKEVENTS */ 204#else /* !CONFIG_GENERIC_CLOCKEVENTS */