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path: root/drivers/clocksource/sh_tmu.c
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Diffstat (limited to 'drivers/clocksource/sh_tmu.c')
-rw-r--r--drivers/clocksource/sh_tmu.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index 97f54b634be4..852b3f19a555 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -45,7 +45,7 @@ struct sh_tmu_priv {
45 struct clocksource cs; 45 struct clocksource cs;
46}; 46};
47 47
48static DEFINE_SPINLOCK(sh_tmu_lock); 48static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
49 49
50#define TSTR -1 /* shared register */ 50#define TSTR -1 /* shared register */
51#define TCOR 0 /* channel register */ 51#define TCOR 0 /* channel register */
@@ -95,7 +95,7 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
95 unsigned long flags, value; 95 unsigned long flags, value;
96 96
97 /* start stop register shared by multiple timer channels */ 97 /* start stop register shared by multiple timer channels */
98 spin_lock_irqsave(&sh_tmu_lock, flags); 98 raw_spin_lock_irqsave(&sh_tmu_lock, flags);
99 value = sh_tmu_read(p, TSTR); 99 value = sh_tmu_read(p, TSTR);
100 100
101 if (start) 101 if (start)
@@ -104,7 +104,7 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
104 value &= ~(1 << cfg->timer_bit); 104 value &= ~(1 << cfg->timer_bit);
105 105
106 sh_tmu_write(p, TSTR, value); 106 sh_tmu_write(p, TSTR, value);
107 spin_unlock_irqrestore(&sh_tmu_lock, flags); 107 raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
108} 108}
109 109
110static int sh_tmu_enable(struct sh_tmu_priv *p) 110static int sh_tmu_enable(struct sh_tmu_priv *p)