1 files changed, 22 insertions, 3 deletions

diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index ba99e3844106..e2c6ca0431d6 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -252,6 +252,9 @@
 #define CLK_RESET_CCLK_RUN_POLICY               2
 #define CLK_RESET_CCLK_BURST_POLICY_PLLX        8
 
+/* PLLM override registers */
+#define PMC_PLLM_WB0_OVERRIDE 0x1dc
+
 #ifdef CONFIG_PM_SLEEP
 static struct cpu_clk_suspend_context {
         u32 pllx_misc;
@@ -563,6 +566,18 @@ static struct tegra_clk_pll_params pll_c_params = {
         .lock_delay = 300,
 };
 
+static struct div_nmp pllm_nmp = {
+        .divn_shift = 8,
+        .divn_width = 10,
+        .override_divn_shift = 5,
+        .divm_shift = 0,
+        .divm_width = 5,
+        .override_divm_shift = 0,
+        .divp_shift = 20,
+        .divp_width = 3,
+        .override_divp_shift = 15,
+};
+
 static struct tegra_clk_pll_params pll_m_params = {
         .input_min = 2000000,
         .input_max = 31000000,
@@ -575,6 +590,9 @@ static struct tegra_clk_pll_params pll_m_params = {
         .lock_mask = PLL_BASE_LOCK,
         .lock_enable_bit_idx = PLL_MISC_LOCK_ENABLE,
         .lock_delay = 300,
+        .div_nmp = &pllm_nmp,
+        .pmc_divnm_reg = PMC_PLLM_WB0_OVERRIDE,
+        .pmc_divp_reg = PMC_PLLM_WB0_OVERRIDE,
 };
 
 static struct tegra_clk_pll_params pll_p_params = {
@@ -1223,7 +1241,7 @@ static void __init tegra30_pmc_clk_init(void)
 
         /* clk_out_2 */
         clk = clk_register_mux(NULL, "clk_out_2_mux", clk_out2_parents,
-                               ARRAY_SIZE(clk_out1_parents), 0,
+                               ARRAY_SIZE(clk_out2_parents), 0,
                                pmc_base + PMC_CLK_OUT_CNTRL, 14, 3, 0,
                                &clk_out_lock);
         clk = clk_register_gate(NULL, "clk_out_2", "clk_out_2_mux", 0,
@@ -1234,7 +1252,7 @@ static void __init tegra30_pmc_clk_init(void)
 
         /* clk_out_3 */
         clk = clk_register_mux(NULL, "clk_out_3_mux", clk_out3_parents,
-                               ARRAY_SIZE(clk_out1_parents), 0,
+                               ARRAY_SIZE(clk_out3_parents), 0,
                                pmc_base + PMC_CLK_OUT_CNTRL, 22, 3, 0,
                                &clk_out_lock);
         clk = clk_register_gate(NULL, "clk_out_3", "clk_out_3_mux", 0,
@@ -1954,7 +1972,7 @@ static const struct of_device_id pmc_match[] __initconst = {
         {},
 };
 
-void __init tegra30_clock_init(struct device_node *np)
+static void __init tegra30_clock_init(struct device_node *np)
 {
         struct device_node *node;
         int i;
@@ -2005,3 +2023,4 @@ void __init tegra30_clock_init(struct device_node *np)
 
         tegra_cpu_car_ops = &tegra30_cpu_car_ops;
 }
+CLK_OF_DECLARE(tegra30, "nvidia,tegra30-car", tegra30_clock_init);