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Diffstat (limited to 'drivers/char/xilinx_hwicap/xilinx_hwicap.h')
-rw-r--r--drivers/char/xilinx_hwicap/xilinx_hwicap.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.h b/drivers/char/xilinx_hwicap/xilinx_hwicap.h
index 405fee7e189b..1f9c8b082dbe 100644
--- a/drivers/char/xilinx_hwicap/xilinx_hwicap.h
+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.h
@@ -65,10 +65,27 @@ struct hwicap_drvdata {
65}; 65};
66 66
67struct hwicap_driver_config { 67struct hwicap_driver_config {
68 /* Read configuration data given by size into the data buffer.
69 Return 0 if successful. */
68 int (*get_configuration)(struct hwicap_drvdata *drvdata, u32 *data, 70 int (*get_configuration)(struct hwicap_drvdata *drvdata, u32 *data,
69 u32 size); 71 u32 size);
72 /* Write configuration data given by size from the data buffer.
73 Return 0 if successful. */
70 int (*set_configuration)(struct hwicap_drvdata *drvdata, u32 *data, 74 int (*set_configuration)(struct hwicap_drvdata *drvdata, u32 *data,
71 u32 size); 75 u32 size);
76 /* Get the status register, bit pattern given by:
77 * D8 - 0 = configuration error
78 * D7 - 1 = alignment found
79 * D6 - 1 = readback in progress
80 * D5 - 0 = abort in progress
81 * D4 - Always 1
82 * D3 - Always 1
83 * D2 - Always 1
84 * D1 - Always 1
85 * D0 - 1 = operation completed
86 */
87 u32 (*get_status)(struct hwicap_drvdata *drvdata);
88 /* Reset the hw */
72 void (*reset)(struct hwicap_drvdata *drvdata); 89 void (*reset)(struct hwicap_drvdata *drvdata);
73}; 90};
74 91
@@ -163,6 +180,13 @@ struct config_registers {
163/* Constant to use for CRC check when CRC has been disabled */ 180/* Constant to use for CRC check when CRC has been disabled */
164#define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL 181#define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL
165 182
183/* Meanings of the bits returned by get_status */
184#define XHI_SR_CFGERR_N_MASK 0x00000100 /* Config Error Mask */
185#define XHI_SR_DALIGN_MASK 0x00000080 /* Data Alignment Mask */
186#define XHI_SR_RIP_MASK 0x00000040 /* Read back Mask */
187#define XHI_SR_IN_ABORT_N_MASK 0x00000020 /* Select Map Abort Mask */
188#define XHI_SR_DONE_MASK 0x00000001 /* Done bit Mask */
189
166/** 190/**
167 * hwicap_type_1_read - Generates a Type 1 read packet header. 191 * hwicap_type_1_read - Generates a Type 1 read packet header.
168 * @reg: is the address of the register to be read back. 192 * @reg: is the address of the register to be read back.