diff options
Diffstat (limited to 'drivers/char/drm/savage_bci.c')
-rw-r--r-- | drivers/char/drm/savage_bci.c | 81 |
1 files changed, 45 insertions, 36 deletions
diff --git a/drivers/char/drm/savage_bci.c b/drivers/char/drm/savage_bci.c index 6d10515795cc..0d426deeefec 100644 --- a/drivers/char/drm/savage_bci.c +++ b/drivers/char/drm/savage_bci.c | |||
@@ -533,16 +533,32 @@ static void savage_fake_dma_flush(drm_savage_private_t * dev_priv) | |||
533 | dev_priv->first_dma_page = dev_priv->current_dma_page = 0; | 533 | dev_priv->first_dma_page = dev_priv->current_dma_page = 0; |
534 | } | 534 | } |
535 | 535 | ||
536 | int savage_driver_load(drm_device_t *dev, unsigned long chipset) | ||
537 | { | ||
538 | drm_savage_private_t *dev_priv; | ||
539 | |||
540 | dev_priv = drm_alloc(sizeof(drm_savage_private_t), DRM_MEM_DRIVER); | ||
541 | if (dev_priv == NULL) | ||
542 | return DRM_ERR(ENOMEM); | ||
543 | |||
544 | memset(dev_priv, 0, sizeof(drm_savage_private_t)); | ||
545 | dev->dev_private = (void *)dev_priv; | ||
546 | |||
547 | dev_priv->chipset = (enum savage_family)chipset; | ||
548 | |||
549 | return 0; | ||
550 | } | ||
551 | |||
552 | |||
536 | /* | 553 | /* |
537 | * Initalize mappings. On Savage4 and SavageIX the alignment | 554 | * Initalize mappings. On Savage4 and SavageIX the alignment |
538 | * and size of the aperture is not suitable for automatic MTRR setup | 555 | * and size of the aperture is not suitable for automatic MTRR setup |
539 | * in drm_addmap. Therefore we do it manually before the maps are | 556 | * in drm_addmap. Therefore we add them manually before the maps are |
540 | * initialized. We also need to take care of deleting the MTRRs in | 557 | * initialized, and tear them down on last close. |
541 | * postcleanup. | ||
542 | */ | 558 | */ |
543 | int savage_preinit(drm_device_t * dev, unsigned long chipset) | 559 | int savage_driver_firstopen(drm_device_t *dev) |
544 | { | 560 | { |
545 | drm_savage_private_t *dev_priv; | 561 | drm_savage_private_t *dev_priv = dev->dev_private; |
546 | unsigned long mmio_base, fb_base, fb_size, aperture_base; | 562 | unsigned long mmio_base, fb_base, fb_size, aperture_base; |
547 | /* fb_rsrc and aper_rsrc aren't really used currently, but still exist | 563 | /* fb_rsrc and aper_rsrc aren't really used currently, but still exist |
548 | * in case we decide we need information on the BAR for BSD in the | 564 | * in case we decide we need information on the BAR for BSD in the |
@@ -551,14 +567,6 @@ int savage_preinit(drm_device_t * dev, unsigned long chipset) | |||
551 | unsigned int fb_rsrc, aper_rsrc; | 567 | unsigned int fb_rsrc, aper_rsrc; |
552 | int ret = 0; | 568 | int ret = 0; |
553 | 569 | ||
554 | dev_priv = drm_alloc(sizeof(drm_savage_private_t), DRM_MEM_DRIVER); | ||
555 | if (dev_priv == NULL) | ||
556 | return DRM_ERR(ENOMEM); | ||
557 | |||
558 | memset(dev_priv, 0, sizeof(drm_savage_private_t)); | ||
559 | dev->dev_private = (void *)dev_priv; | ||
560 | dev_priv->chipset = (enum savage_family)chipset; | ||
561 | |||
562 | dev_priv->mtrr[0].handle = -1; | 570 | dev_priv->mtrr[0].handle = -1; |
563 | dev_priv->mtrr[1].handle = -1; | 571 | dev_priv->mtrr[1].handle = -1; |
564 | dev_priv->mtrr[2].handle = -1; | 572 | dev_priv->mtrr[2].handle = -1; |
@@ -576,26 +584,24 @@ int savage_preinit(drm_device_t * dev, unsigned long chipset) | |||
576 | dev_priv->mtrr[0].base = fb_base; | 584 | dev_priv->mtrr[0].base = fb_base; |
577 | dev_priv->mtrr[0].size = 0x01000000; | 585 | dev_priv->mtrr[0].size = 0x01000000; |
578 | dev_priv->mtrr[0].handle = | 586 | dev_priv->mtrr[0].handle = |
579 | mtrr_add(dev_priv->mtrr[0].base, | 587 | drm_mtrr_add(dev_priv->mtrr[0].base, |
580 | dev_priv->mtrr[0].size, MTRR_TYPE_WRCOMB, | 588 | dev_priv->mtrr[0].size, DRM_MTRR_WC); |
581 | 1); | ||
582 | dev_priv->mtrr[1].base = fb_base + 0x02000000; | 589 | dev_priv->mtrr[1].base = fb_base + 0x02000000; |
583 | dev_priv->mtrr[1].size = 0x02000000; | 590 | dev_priv->mtrr[1].size = 0x02000000; |
584 | dev_priv->mtrr[1].handle = | 591 | dev_priv->mtrr[1].handle = |
585 | mtrr_add(dev_priv->mtrr[1].base, | 592 | drm_mtrr_add(dev_priv->mtrr[1].base, |
586 | dev_priv->mtrr[1].size, MTRR_TYPE_WRCOMB, | 593 | dev_priv->mtrr[1].size, DRM_MTRR_WC); |
587 | 1); | ||
588 | dev_priv->mtrr[2].base = fb_base + 0x04000000; | 594 | dev_priv->mtrr[2].base = fb_base + 0x04000000; |
589 | dev_priv->mtrr[2].size = 0x04000000; | 595 | dev_priv->mtrr[2].size = 0x04000000; |
590 | dev_priv->mtrr[2].handle = | 596 | dev_priv->mtrr[2].handle = |
591 | mtrr_add(dev_priv->mtrr[2].base, | 597 | drm_mtrr_add(dev_priv->mtrr[2].base, |
592 | dev_priv->mtrr[2].size, MTRR_TYPE_WRCOMB, | 598 | dev_priv->mtrr[2].size, DRM_MTRR_WC); |
593 | 1); | ||
594 | } else { | 599 | } else { |
595 | DRM_ERROR("strange pci_resource_len %08lx\n", | 600 | DRM_ERROR("strange pci_resource_len %08lx\n", |
596 | drm_get_resource_len(dev, 0)); | 601 | drm_get_resource_len(dev, 0)); |
597 | } | 602 | } |
598 | } else if (chipset != S3_SUPERSAVAGE && chipset != S3_SAVAGE2000) { | 603 | } else if (dev_priv->chipset != S3_SUPERSAVAGE && |
604 | dev_priv->chipset != S3_SAVAGE2000) { | ||
599 | mmio_base = drm_get_resource_start(dev, 0); | 605 | mmio_base = drm_get_resource_start(dev, 0); |
600 | fb_rsrc = 1; | 606 | fb_rsrc = 1; |
601 | fb_base = drm_get_resource_start(dev, 1); | 607 | fb_base = drm_get_resource_start(dev, 1); |
@@ -609,9 +615,8 @@ int savage_preinit(drm_device_t * dev, unsigned long chipset) | |||
609 | dev_priv->mtrr[0].base = fb_base; | 615 | dev_priv->mtrr[0].base = fb_base; |
610 | dev_priv->mtrr[0].size = 0x08000000; | 616 | dev_priv->mtrr[0].size = 0x08000000; |
611 | dev_priv->mtrr[0].handle = | 617 | dev_priv->mtrr[0].handle = |
612 | mtrr_add(dev_priv->mtrr[0].base, | 618 | drm_mtrr_add(dev_priv->mtrr[0].base, |
613 | dev_priv->mtrr[0].size, MTRR_TYPE_WRCOMB, | 619 | dev_priv->mtrr[0].size, DRM_MTRR_WC); |
614 | 1); | ||
615 | } else { | 620 | } else { |
616 | DRM_ERROR("strange pci_resource_len %08lx\n", | 621 | DRM_ERROR("strange pci_resource_len %08lx\n", |
617 | drm_get_resource_len(dev, 1)); | 622 | drm_get_resource_len(dev, 1)); |
@@ -648,16 +653,21 @@ int savage_preinit(drm_device_t * dev, unsigned long chipset) | |||
648 | /* | 653 | /* |
649 | * Delete MTRRs and free device-private data. | 654 | * Delete MTRRs and free device-private data. |
650 | */ | 655 | */ |
651 | int savage_postcleanup(drm_device_t * dev) | 656 | void savage_driver_lastclose(drm_device_t *dev) |
652 | { | 657 | { |
653 | drm_savage_private_t *dev_priv = dev->dev_private; | 658 | drm_savage_private_t *dev_priv = dev->dev_private; |
654 | int i; | 659 | int i; |
655 | 660 | ||
656 | for (i = 0; i < 3; ++i) | 661 | for (i = 0; i < 3; ++i) |
657 | if (dev_priv->mtrr[i].handle >= 0) | 662 | if (dev_priv->mtrr[i].handle >= 0) |
658 | mtrr_del(dev_priv->mtrr[i].handle, | 663 | drm_mtrr_del(dev_priv->mtrr[i].handle, |
659 | dev_priv->mtrr[i].base, | 664 | dev_priv->mtrr[i].base, |
660 | dev_priv->mtrr[i].size); | 665 | dev_priv->mtrr[i].size, DRM_MTRR_WC); |
666 | } | ||
667 | |||
668 | int savage_driver_unload(drm_device_t *dev) | ||
669 | { | ||
670 | drm_savage_private_t *dev_priv = dev->dev_private; | ||
661 | 671 | ||
662 | drm_free(dev_priv, sizeof(drm_savage_private_t), DRM_MEM_DRIVER); | 672 | drm_free(dev_priv, sizeof(drm_savage_private_t), DRM_MEM_DRIVER); |
663 | 673 | ||
@@ -994,8 +1004,7 @@ static int savage_bci_event_wait(DRM_IOCTL_ARGS) | |||
994 | * DMA buffer management | 1004 | * DMA buffer management |
995 | */ | 1005 | */ |
996 | 1006 | ||
997 | static int savage_bci_get_buffers(DRMFILE filp, drm_device_t * dev, | 1007 | static int savage_bci_get_buffers(DRMFILE filp, drm_device_t *dev, drm_dma_t *d) |
998 | drm_dma_t * d) | ||
999 | { | 1008 | { |
1000 | drm_buf_t *buf; | 1009 | drm_buf_t *buf; |
1001 | int i; | 1010 | int i; |
@@ -1057,7 +1066,7 @@ int savage_bci_buffers(DRM_IOCTL_ARGS) | |||
1057 | return ret; | 1066 | return ret; |
1058 | } | 1067 | } |
1059 | 1068 | ||
1060 | void savage_reclaim_buffers(drm_device_t * dev, DRMFILE filp) | 1069 | void savage_reclaim_buffers(drm_device_t *dev, DRMFILE filp) |
1061 | { | 1070 | { |
1062 | drm_device_dma_t *dma = dev->dma; | 1071 | drm_device_dma_t *dma = dev->dma; |
1063 | drm_savage_private_t *dev_priv = dev->dev_private; | 1072 | drm_savage_private_t *dev_priv = dev->dev_private; |
@@ -1090,10 +1099,10 @@ void savage_reclaim_buffers(drm_device_t * dev, DRMFILE filp) | |||
1090 | } | 1099 | } |
1091 | 1100 | ||
1092 | drm_ioctl_desc_t savage_ioctls[] = { | 1101 | drm_ioctl_desc_t savage_ioctls[] = { |
1093 | [DRM_IOCTL_NR(DRM_SAVAGE_BCI_INIT)] = {savage_bci_init, 1, 1}, | 1102 | [DRM_IOCTL_NR(DRM_SAVAGE_BCI_INIT)] = {savage_bci_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY}, |
1094 | [DRM_IOCTL_NR(DRM_SAVAGE_BCI_CMDBUF)] = {savage_bci_cmdbuf, 1, 0}, | 1103 | [DRM_IOCTL_NR(DRM_SAVAGE_BCI_CMDBUF)] = {savage_bci_cmdbuf, DRM_AUTH}, |
1095 | [DRM_IOCTL_NR(DRM_SAVAGE_BCI_EVENT_EMIT)] = {savage_bci_event_emit, 1, 0}, | 1104 | [DRM_IOCTL_NR(DRM_SAVAGE_BCI_EVENT_EMIT)] = {savage_bci_event_emit, DRM_AUTH}, |
1096 | [DRM_IOCTL_NR(DRM_SAVAGE_BCI_EVENT_WAIT)] = {savage_bci_event_wait, 1, 0}, | 1105 | [DRM_IOCTL_NR(DRM_SAVAGE_BCI_EVENT_WAIT)] = {savage_bci_event_wait, DRM_AUTH}, |
1097 | }; | 1106 | }; |
1098 | 1107 | ||
1099 | int savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls); | 1108 | int savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls); |