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path: root/drivers/ata/pata_hpt3x2n.c
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Diffstat (limited to 'drivers/ata/pata_hpt3x2n.c')
-rw-r--r--drivers/ata/pata_hpt3x2n.c85
1 files changed, 20 insertions, 65 deletions
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index 9f1c084f846f..d5c9fd7b82bb 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -148,7 +148,7 @@ static int hpt3x2n_cable_detect(struct ata_port *ap)
148 * Reset the hardware and state machine, 148 * Reset the hardware and state machine,
149 */ 149 */
150 150
151static int hpt3xn_pre_reset(struct ata_link *link, unsigned long deadline) 151static int hpt3x2n_pre_reset(struct ata_link *link, unsigned long deadline)
152{ 152{
153 struct ata_port *ap = link->ap; 153 struct ata_port *ap = link->ap;
154 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 154 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -156,19 +156,7 @@ static int hpt3xn_pre_reset(struct ata_link *link, unsigned long deadline)
156 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37); 156 pci_write_config_byte(pdev, 0x50 + 4 * ap->port_no, 0x37);
157 udelay(100); 157 udelay(100);
158 158
159 return ata_std_prereset(link, deadline); 159 return ata_sff_prereset(link, deadline);
160}
161
162/**
163 * hpt3x2n_error_handler - probe the hpt3x2n bus
164 * @ap: ATA port to reset
165 *
166 * Perform the probe reset handling for the 3x2N
167 */
168
169static void hpt3x2n_error_handler(struct ata_port *ap)
170{
171 ata_bmdma_drive_eh(ap, hpt3xn_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
172} 160}
173 161
174/** 162/**
@@ -320,7 +308,7 @@ static int hpt3x2n_use_dpll(struct ata_port *ap, int writing)
320 return 0; 308 return 0;
321} 309}
322 310
323static unsigned int hpt3x2n_qc_issue_prot(struct ata_queued_cmd *qc) 311static unsigned int hpt3x2n_qc_issue(struct ata_queued_cmd *qc)
324{ 312{
325 struct ata_taskfile *tf = &qc->tf; 313 struct ata_taskfile *tf = &qc->tf;
326 struct ata_port *ap = qc->ap; 314 struct ata_port *ap = qc->ap;
@@ -335,25 +323,11 @@ static unsigned int hpt3x2n_qc_issue_prot(struct ata_queued_cmd *qc)
335 hpt3x2n_set_clock(ap, 0x23); 323 hpt3x2n_set_clock(ap, 0x23);
336 } 324 }
337 } 325 }
338 return ata_qc_issue_prot(qc); 326 return ata_sff_qc_issue(qc);
339} 327}
340 328
341static struct scsi_host_template hpt3x2n_sht = { 329static struct scsi_host_template hpt3x2n_sht = {
342 .module = THIS_MODULE, 330 ATA_BMDMA_SHT(DRV_NAME),
343 .name = DRV_NAME,
344 .ioctl = ata_scsi_ioctl,
345 .queuecommand = ata_scsi_queuecmd,
346 .can_queue = ATA_DEF_QUEUE,
347 .this_id = ATA_SHT_THIS_ID,
348 .sg_tablesize = LIBATA_MAX_PRD,
349 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
350 .emulated = ATA_SHT_EMULATED,
351 .use_clustering = ATA_SHT_USE_CLUSTERING,
352 .proc_name = DRV_NAME,
353 .dma_boundary = ATA_DMA_BOUNDARY,
354 .slave_configure = ata_scsi_slave_config,
355 .slave_destroy = ata_scsi_slave_destroy,
356 .bios_param = ata_std_bios_param,
357}; 331};
358 332
359/* 333/*
@@ -361,37 +335,15 @@ static struct scsi_host_template hpt3x2n_sht = {
361 */ 335 */
362 336
363static struct ata_port_operations hpt3x2n_port_ops = { 337static struct ata_port_operations hpt3x2n_port_ops = {
364 .set_piomode = hpt3x2n_set_piomode, 338 .inherits = &ata_bmdma_port_ops,
365 .set_dmamode = hpt3x2n_set_dmamode,
366 .mode_filter = ata_pci_default_filter,
367
368 .tf_load = ata_tf_load,
369 .tf_read = ata_tf_read,
370 .check_status = ata_check_status,
371 .exec_command = ata_exec_command,
372 .dev_select = ata_std_dev_select,
373
374 .freeze = ata_bmdma_freeze,
375 .thaw = ata_bmdma_thaw,
376 .error_handler = hpt3x2n_error_handler,
377 .post_internal_cmd = ata_bmdma_post_internal_cmd,
378 .cable_detect = hpt3x2n_cable_detect,
379 339
380 .bmdma_setup = ata_bmdma_setup,
381 .bmdma_start = ata_bmdma_start,
382 .bmdma_stop = hpt3x2n_bmdma_stop, 340 .bmdma_stop = hpt3x2n_bmdma_stop,
383 .bmdma_status = ata_bmdma_status, 341 .qc_issue = hpt3x2n_qc_issue,
384
385 .qc_prep = ata_qc_prep,
386 .qc_issue = hpt3x2n_qc_issue_prot,
387
388 .data_xfer = ata_data_xfer,
389
390 .irq_handler = ata_interrupt,
391 .irq_clear = ata_bmdma_irq_clear,
392 .irq_on = ata_irq_on,
393 342
394 .port_start = ata_sff_port_start, 343 .cable_detect = hpt3x2n_cable_detect,
344 .set_piomode = hpt3x2n_set_piomode,
345 .set_dmamode = hpt3x2n_set_dmamode,
346 .prereset = hpt3x2n_pre_reset,
395}; 347};
396 348
397/** 349/**
@@ -488,15 +440,13 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
488{ 440{
489 /* HPT372N and friends - UDMA133 */ 441 /* HPT372N and friends - UDMA133 */
490 static const struct ata_port_info info = { 442 static const struct ata_port_info info = {
491 .sht = &hpt3x2n_sht,
492 .flags = ATA_FLAG_SLAVE_POSS, 443 .flags = ATA_FLAG_SLAVE_POSS,
493 .pio_mask = 0x1f, 444 .pio_mask = 0x1f,
494 .mwdma_mask = 0x07, 445 .mwdma_mask = 0x07,
495 .udma_mask = ATA_UDMA6, 446 .udma_mask = ATA_UDMA6,
496 .port_ops = &hpt3x2n_port_ops 447 .port_ops = &hpt3x2n_port_ops
497 }; 448 };
498 struct ata_port_info port = info; 449 const struct ata_port_info *ppi[] = { &info, NULL };
499 const struct ata_port_info *ppi[] = { &port, NULL };
500 450
501 u8 irqmask; 451 u8 irqmask;
502 u32 class_rev; 452 u32 class_rev;
@@ -505,6 +455,12 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
505 unsigned int f_low, f_high; 455 unsigned int f_low, f_high;
506 int adjust; 456 int adjust;
507 unsigned long iobase = pci_resource_start(dev, 4); 457 unsigned long iobase = pci_resource_start(dev, 4);
458 void *hpriv = NULL;
459 int rc;
460
461 rc = pcim_enable_device(dev);
462 if (rc)
463 return rc;
508 464
509 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 465 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
510 class_rev &= 0xFF; 466 class_rev &= 0xFF;
@@ -586,9 +542,8 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
586 pci_mhz); 542 pci_mhz);
587 /* Set our private data up. We only need a few flags so we use 543 /* Set our private data up. We only need a few flags so we use
588 it directly */ 544 it directly */
589 port.private_data = NULL;
590 if (pci_mhz > 60) { 545 if (pci_mhz > 60) {
591 port.private_data = (void *)PCI66; 546 hpriv = (void *)PCI66;
592 /* 547 /*
593 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in 548 * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in
594 * the MISC. register to stretch the UltraDMA Tss timing. 549 * the MISC. register to stretch the UltraDMA Tss timing.
@@ -599,7 +554,7 @@ static int hpt3x2n_init_one(struct pci_dev *dev, const struct pci_device_id *id)
599 } 554 }
600 555
601 /* Now kick off ATA set up */ 556 /* Now kick off ATA set up */
602 return ata_pci_init_one(dev, ppi); 557 return ata_pci_sff_init_one(dev, ppi, &hpt3x2n_sht, hpriv);
603} 558}
604 559
605static const struct pci_device_id hpt3x2n[] = { 560static const struct pci_device_id hpt3x2n[] = {